• A-D conversion techniques • Open sys-
tems • Inductance meter • 16-Channel
running lights • Sound effects generator.

RF INDUCTANCE METER

J. Bareford

It is a downright shame not to be able to use many of your inductors
simply because their value is not known. First in a new series of
budget test equipment for the home constructor, the RF inductance
meter leaves coloured bands and unfamiliar codes on
high-frequency inductors for what they are, and gives a reliable
indication of inductance as well as relative Q (quality) factor on an
analogue scale. The usable range extends from about 50 nH to 4 mH.

The present inductance meter is intended
for high-frequency inductors, and for this
reason it is based on a measuring method
rather different from that of the digital
inductance meter described in Ref. 1.

The principle adopted here is applying
a known frequency to an L-C tuned circuit
of which the inductance, L, is unknown,
and the capacitance, C, is variable but cali-
brated. At a certain value of C, the tuned
circuit resonates, which is detected by
means of a signal rectifier. The value of C
required to achieve resonance at the
known test frequency provides a measure
of the inductance, which can be read off as
the relative setting of the variable capaci-
tor. The resultant voltage across the L-C
combination provides a measure of the
relative loaded Q (quality) factor of the
inductor under test: the higher the Q fac-
tor, the higher the resonance voltage.

Circuit description

The circuit diagram of Fig. 1 may conveni-
ently be divided into five functional parts.

To begin with, there are two clock os-
cillators. One, a 7.5 MHz oscillator is set

up around quartz crystal X2 and low-
power Schottky inverter Ns. The other, set
up around Ni and Xi, oscillates at
24 MHz, or about VlO times 7.5 MHz. The
ratio of VlO ensures the correct scale fac-
tors for the ranges of the instrument.

The second functional part of the cir-
cuit is formed by dividers IC2 and IC3.
Circuit IC2, a Type 74HCT390 dual decade
counter, is driven by the 24 MHz clock
signal, and supplies 2.4 MHz (divide-by-
10) at output QA1, and 240 kHz (divide-
by-100) at output QA2. The second
divider, IC3, is a decade counter Type
74HCT4017. It is driven by the 7.5 MHz
clock signal, and su pplie s 750 kHz
(divide-by-10) at the CARRY OUT (CD)

Five HCMOS bus drivers and associ-
ated double L-C band-pass filters form the
third functional block. Impedance match-
ing resistors are fitted between the buffers
and the filter inputs. Each band-pass filter
is accurately tuned to its input signal fre-
quency to prevent the inductor under test
resonating at an harmonic of the test fre-
quency, which would cause too low in-
ductance values to be indicated.

The fourth block is formed by range
selector Si and wideband push-pull am-
plifier T1-T2. The available ranges and as-
sociated multipliers are shown inset in the
circuit diagram, and on the front panel of
the instrument.

The last functional block consists of the
inductor under test, Lx, and the signal rec-
tifier, D4-C34. The high signal levels used
for testing inductors allow a fairly simple
rectifier to be used in combination with a
common 100 pA moving-coil meter. Mi.
Lx is made to resonate with the aid of
tuning capacitor C33 which is shunted by
trimmer C32 for calibrating the instru-

The 5 V regulated power supply
around ICs is entirely conventional. Per-
missible unregulated input voltages from
a mains adapter lie between 9 V and 12 V.
Current consumption is about 190 mA, so
that a 250 mA mains adapter may be used.

Construction

Anyone with some experience in elec-
tronic construction should be able to build
the inductance meter without undue
problems. This is mainly by virtue of the
double-sided printed -circuit board shown
in Fig. 2, which helps to obviate awkward
problems with stray inductance, shielding

The PCB has a large copper surface at
the component side to ensure proper
screening and decoupling (remember that
relatively high signal frequencies are in-
volved). Component terminals inserted in
a PCB hole without a white overlay spot
are soldered direct to the ground surface
at the component side.

Start the construction with fitting the
resistors, inductors and diodes. Next, fit
the capacitors in the filter sections at the
centre of the board. Mount the transistors,
trimmer C32 (two pitches are allowed; be
careful not to overheat the device), and
regulator ICs (bolt this direct on to the
board).

Do not use sockets for the integrated
circuits. Study the orientation of the chips,
insert them, and solder the following pins
direct to the ground plane at the compo-

ICi: pins 3, 7 and 9;

Fig. 1 . Circuit diagram ot the ind .ictance meter for high-frequency colls.

ICa: pins 13, lland 7;

IC 2 : pins 12, 2, and 7;

IC4: pins 1, 10 and 19.

Then fit the remainder of the components.
Do not attempt to solder the enclosures of
the quartz crystals to ground, and be sure
to use a PCB-moutil rotary switch — panel-
mount types with wires result in too much
stray inductance.

The tuning capacitor is a 500 pF mica
or PTFE foil type as used in inexpensive
MW and SW radios. Mount it at the track
side of the board, and use short wires to
reach the solder islands (the maximum
wire length is about 15 mm). If the tuning
capacitor has a separate ground terminal,
this must be connected to the grounded
solder spot also. The photograph of Fig. 5
shows the completed board.

The inductance meter is housed in an
ivory white, steel sheet enclosure Type
LC850 from Elbomec/Telet. The front and
rear panels are made of aluminium. Two
side brackets with rows of holes are pro-
vided to enable circuit boards mounted in
the enclosure to be removed without the
need of having to disassemble the box
completely.

The front-panel foil for this project is
not available ready-made, but its true-size
lay-out is given in Fig. 3. Copy the draw-
ing and use it to drill and cut the holes in
the front panel of the enclosure. Do not
spoil the appearance of the instrument by
using the screws provided to secure the
aluminium front panel. Instead, use
double-sided tape or glue.

Use 20 mm long PCB spacers to mount

the completed PCB on to a U-shaped
aluminium support bracket (see Fig. 4).

Now fit the moving-coil meter into its
front panel clearance, and determine how
much space you want to leave between the
rear of the meter and the components on
the PCB. Insert the support bracket with
the PCB on it between the side bars, and
shift it forward until the holes in the sup-
port bracket align with the holes in the
side brackets of the enclosure. Depending

on the mounting depth of your panel
meter, the fifth or sixth hole from the front
of the side brackets should be used. Now
mount the front panel and pass the spind-
les of the range switch and the tuning
capacitor through the relevant holes.
Determine the length of the spindles re-
quired to fit the knobs, and remove the
front panel. Use a vice to cut the spindles
to the required length.

Mount the power LED in a holder. In-

Parts list

Resistors:

Ri;Ri2-1kO
R2 = 68C2
RS-R7 > 470
RsjRii » 4700
RsiRio ■ 303
Ri3 « 330

Capacitors:

All ceramic capacitors are 5-mm pitch

Ci m 33p ceramic

Cj;C3 :C4 ;Ci6 = 68p ceramic

C5;Ce;Cs » 1 0Op ceramic

C7 * 4p7 ceramic

Cs - 6p8 ceramic

Cio;Cn;Ci4 = 330p ceramic

Ci2= 15p ceramic

C13 * 22p ceramic

Ci5;Ci7;Cie • InO ceramic

Ci6 « 47p ceramic

C2o:C22;C24 = 3n3 ceramic

C21 » 150p ceramic

C23 « 220p ceramic

C25;C27;C29 « 1 0n ceramic

C26 » 470p ceramic

C28 - 680p ceramic

C3o;C3i;C3e;C37;C38;C4o - lOOn

C32 « 60p trimmer

C33 - 500p mica-toil tuning capacitor

C34;C35 = lOn

C39 >= 4p7; 6 V; tantalum

C4i «1pO: 63 V; radial

C42 . 470p; 25 V; radial

Semiconductors:

D1-D4.1N4148
D5- 1N4001
Ti -BC140-10
T2-BCI 60-10

ICt . 74LS04 (do not use HC or HCT ver-

IC2 - 74HCT390
IC3.74HCT4017
IC4 = 74HCT244
ICs - 7805

Inductors:

All inductors are axial types

Li;L2= IpHO

L3;L4 . 3pH3

Ls;Le= 10 pH

L7;L8 = 33 pH

U;lio- 100 pH

Miscellaneous:

Si « 5-way, single-pole rotary switch for
PCB mounting.

XI » 24 MHz quartz crystal (3rd overtone;
30 pF parallel resonance).

X2 = 7.5 MHz quartz crystal (fundamental
frequency: 30 pF parallel resonance).

Mi = 100 pA moving-coil meter.

Collet Knob with pointer (for range switch).
Collet knob with double pointer (for tuning
capacitor).

Solid spindle coupling for tuning capacitor.
Mains adaptor chassis socket.

Enclosure: Telet/Elbomec Type LC850.

Telet srl • Via deirintagliatore. 4 • 401 38 Bo-
logna • Italy. Telephone: +39 51 534908.
Fax: +39 51 538717.

PCB Type 8901 19

stall the ON/OFF switch and the two black,
insulated wander sockets on to the front
panel, then wire these components. The
wires between the wander sockets and the
PCB terminals marked Lx must be relative-
ly thick, and as short as possible. Do not
twist them!

The final assembly and the connecting
of wires to the terminal posts on the PCB
is straightforward. The rear panel is
drilled to accept a mains adaptor socket as

11.21

used on portable cassette recorders and
calculators. Be sure to observe correct po-

Practical use

Any inductance measurement must start
in the range for the highest inductance
values (range switch position 5 in the cir-
cuit diagram), i.e., using the lowest test
frequency. Do not switch up from the low-
value ranges to the high-value ranges —
this is likely to cause false readings owing
to the inductor resonating at a harmonic
frequency.

Start in the xlOO pH range, and turn
C 33 until the meter deflects. Switch to a
lower range if the meter does not deflect.
Operate C 33 again until a sharp peak is
observed.

The first three ranges, xlOO pH, xlO pH
and xl pH, use scale 'A' (4.0-40) of the
tuning control. The next range, xlOO nH,
uses scale 'B' (3.3-38). The lowest range,
xlO nH, is only suitable for comparative
inductance measurements, since the inter-
nal capacitance and inductance of the in-
strument are significant at 24 MHz. The
calibration of the lower half of scale 'B' is,
therefore, unlikely to be valid for accurate
measurements, but still allows com-
parative tests to be carried out on batches
of inductors. Similarly, the maximum
meter indication provides a relative, not
an absolute, indication of the Q factor in
all ranges.

Calibration

The meter is fairly simple to calibrate.
Connect an inductor whose value is accur-
ately known. If you are unable to obtain a
reference inductor, use a ready-made
choke with a tolerance of 5% (e.g., Cirkit's
FL4 series). A value near the maximum
indication within a range must be chosen,
so that the tuning capacitor is set to mini-

mum capacitance. This ensures the largest
effect of the parallel capacitance formed
by trimmer C32. Connect a choke of
220 pH or 390 pH (scale 'A', range
xlO pH), and set the tuning capacitor as
accurately as possible to indication '22' or
'40' respectively. Carefully adjust trim-
mer C32 for maximum meter deflection.
Connect other, but similarly selected, in-
ductors, and repeat the adjustment for the
three highest ranges until an acceptable
compromise is reached as regards accu-
racy of the scale. It should be noted that
the resolution and repeatability so
achieved depend on the accuracy at which
the tuning scale has been reproduced.

Finally, some moving-coil meters have
such a low internal resistance as to require
an external series resistance to be fitted to

prevent the needle hitting the right end of
the scale when a high-Q inductor is being
tested. The value of the series resistor, if
required, must be determined experimen-
tally.

Reference:

1. "Self-inductance meter”. Elektor India,
October 1988.

THE DIGITAL MODEL TRAIN - PART 7

by T. Wigmore

The seventh part in the series deals with the circuit
description of the main unit in the Elektor Electronics
Digital Train System. The construction and testing will
be the subject of next month's instalment.

The main unit consists essentially of a sin-
gle-board processor system based on a Z80
as shown in Fig. 47. This processor was
chosen not only for its very low price, but
also because the special Z80 peripheral
chips (I’lo - parallel input/output - and
ctc - counter timer control) make it possi-
ble to use the powerful Z80 interrupt struc-
ture without the need of additional logic.

Since the train system requires a number of
asynchronous processes to be carried out
more or less simultaneously, this is a very
worthwhile aspect.

Apart from the standard Z80 design,
consisting of the processor proper, memo-
ries and a ctc for general timing functions,
the unit also contains various l/o struc-

Reading of the locomotive controls is

carried out by an analogue-to-digital (a-d)

converter that has 16 multiplexed ana- The main unit also has a serial output

logue inputs. The results of the a-d conver- tive addresses are read on to a separate bus to the booster. The serial signals (binary
sions and the position of the function via a diode matrix. This matrix may be coded trinary data) are generated by a spe-

switches associated with the locomotive considered a primitive 16-byte manual cial function ic. One timer of the ctc is

controls are read via a i‘io port. Set iocomo- access memory (mam), which has the used as the clock for the serial-signal gen-
erator, so that the baud
rate may be adjusted
with the aid of software.
This is necessary, be-
■se switching instruc-
tions for signals and
turnouts (points) need
to be sent at higher
speeds than the locomo-
tive control commands.

Finally, th> . e is a bi-
directiona' • 'rial (semi
duplex) Ri.__,2 interface,
but this does not make
it necessary for the train
system to be controlled
via a computer: the unit
is perfectly suitable for
stand-alone operation.
However, the RS232
interface makes the sys-
tem considerably more
versatile.

Circuit diagram

The 5-V supply at the
top left in the circuit
diagram of Fig. 48 is a
standard design, except
for D36. This diode
ensures that the current
through the keyboard

Main features •

• independent control of up to 81

• accepts up to 16 manual controls

• controls up to 324 turnouts (points)
and signals (648 solenoids)

• manual control of turnouts (paints)
via keyboards

• stand-alone or computer-controlled
operation via RS232 interface

• integral interface for monitoring
signals via the track

• compatible with Marklin Digital

• low-cost Z80 microprocessor;

2.46 MHz, 8 K ROM; 8 K ram

• excellent price/performance ratio

advantage that no knowledge of program-
ming is required to set the addresses. The
setting may be carried out with the aid of
diodes, dil (dual-in-line) switches or
thumbwheel switches.

The keyboards are connected to the Z80
bus via a 20-way connector and the key-
board interface. The 20-way connector
indicates that, in contrast to the Marklin
system, the keyboards are driven in paral-
lel. Miirklin's serial keyboard drive
requires a microprocessor for each key-
board. Since our keyboards do not need a
microprocessor, the relevant circuits have
remained fairly simple. The cost of this is,
of course, a 20-way connector between the
main unit and the keyboards but, since
keyboards are normally located next to the
main unit anyway, that is hardly a disad-

11.23

i.eds (taken from V tt via Kis) does not
load smoothing capacitor C25. This is nec-
essary, because this current may be quite
substantial (several amperes) if a large
number of keyboards is used. This is also
the reason that D38-D41 are heavy-duty
types.

The supply for the RS232 drivers in
IC10 is provided by ICi5 and ICis. These
components are necessary even if the
RS232 interface is not used, because two
gates in IC10, N2 and Ns, are used for driv-
ing the booster. The input voltages for ICts
and ICift (+20 V and -20 V respectively) are
derived from the booster circuit.

The serial control data are encoded by
IC27. Inputs D1-D4 are driven via electron-
ic switches ES1-ES4, These four bits form
the address section of the control data and
are defined in three-state logic, that is, they
are T, '0' or 'undecided'.

The data section, D5-D9, functions with
binary logic and is, therefore, connected
direct to the outputs of IC17. Output latch-
es ICl7 and IC23 ensure that the serial data
remain stable during transmission. As
soon as the address part of a data byte is
placed into IC23, the start instruction for
serial transmission (te) is given via N6.

The clock for IC27 is derived from the
second timer in the CTC, IC12, to enable the
speed of the serial transmission via the
software. The clock is divided by two in
FF3 to obtain a 50% duty factor, which is
necessary for the correct operation of IC27.

The clock pulses to IC27 are counted by
the CTC. After 200 pulses, a data byte is
transmitted twice and an interrupt is gen-
erated. The interrupt routine prepares the
next data byte to be transmitted and starts
the next transmission cycle.

The output signal of IC27, which
swings between 0 V and 5 V is amplified
and made symmetric (±12 V) by N5. Since
the signal is inverted by this gate, it is
inverted again by N2 and then passed to
the booster via Rel and K17.

Output Q6 of 107 is used to drive relay
Ret. When the relay is not energized, the
output of the unit, and that of the booster,
is high-impedance, so that no voltage is
applied to the track.

The oscillator, N11-N12, is followed by
binary scaler ICs, whose output QA deliv-
ers the 2.45 MHz system clock. This fre-
quency was chosen, because it enables
both the baud rate of the RS232 interface
and the various frequencies for the serial
transmitter to be derived from it. Output
QC provides a 614 kHz signal that is used
as the clock for the a-d converter.

The circuit around the CPU (central pro-
cessing unit), IC4, the Pto, IC3, and the crc,
IC12, is entirely standard and will not be
discussed here.

The address decoding for the memories
is carried out by IC28. This circuit splits the
addressable memory locations of up to 64
kbyte into eight pages of 8 kbyte each.
Page 0 (0000-1 FFFH) contains the control
program for the system, which is available
as an eprom, coded ESS572 (see the
Readers services page towards the back of

11.24

Fig. 48. Circuit diagram of the i

this issue. The eprom contains unallocated
space that may be used for any future
extensions of the program.

The ram is contained on page 2 (4000H
-5 FFFh) and this page is also largely
unused. The system uses 2 kbyte, a further
2 kbyte is reserved for possible future
extensions and 4 kbyte is available for
downloading of user programs that are
actuated via special RS232 commands.
Table 5 shows the memory mapping.

The l/o addresses that are available on
outputs A0-A7 of the CPU during read or
write instructions are decoded by IC7.
Here again, some space is not used and 32
l/o addresses are reserved for possible
future extensions. See also Table 6.

The locomotive addressing is carried
out via ICs and IC6, Up to 16 selections
may be made: S0-S15. If a selection signal
is made active, that is, T, the relevant lines
LA0-LA7 (LA= locomotive address) that
are connected to the selection line via a
diode will also go high. Lines without a
diode are held low ('0') by a pull-down
resistor (contained in array R6).

The locomotive addresses, which are in
BCD (binary-coded decimal) format, are
read via buffer ICl. The reason that ICl is a
bidirectional buffer although the locomo-
tive addresses can only be read by the
diode matrix is that in future a select-and-
display board may be used for the locomo-
tive addressing.

At the relevant locomotive control, the
address is set via the RS232 interface and
written to the display board via ICl. This
ensures that the display at all times shows
to what address a given control is set. The
practical implementation of the diode
matrix will be described in next month's
instalment.

At the same time the locomotive
address is read, the position of the function
controls is read into bistables FFi and FF2,
one of the 16 analogue inputs of the a-d
converter is selected and a conversion is
started. The analogue input, address at
A0-A3, is taken to the converter via the
address-latch-enable signal at pin 32. The
conversion start signal is available at pin
16.

When the end-of-conversion
signal (eoc at pin 13) becomes
active, the converted signal is
applied to the pio. Five bits are
used: four for the speed and one
for the direction. The remaining
two inputs of gate A of the no,
PA5 and PA6, are used to read the
position of the function switches.

Gate B of the pio is used for
the start/ stop line (also the boost-
er overload signal line), the inter-
face for the monitors and the
RS232 interface. The output lines
are buffered.

Gates Nio and Nis ensure the
provision of adequate current to
the (relatively) capacitive load
presented by the monitor bus.

Gates N3 and N4 adapt the
logic 0-5 V level to the ±12 V
RS232 level. Gate Ni does the
opposite for incoming RS232 sig-
nals.

Control of the RS232 is entire-
ly via software and will be dealt
with in detail in a forthcoming
article in this series.

Integral test program

Testing of the board is facilitated
by the test routines incorporated
in the system program. The most
important of these is the service
loop. This is actuated when the
power is switched on while the
go switch is (kept) depressed. As
long as Si is closed, the service
loop will remain active. During
sustained testing it is, therefore,
advisable to short-circuit the

The service routine places vlf
( very low frequency) square wave
signals on the various output
ports. These signals may be
checked with a multimeter. Also,
a yellow led (D35) flashes in a
1 Hz rhythm and the LEDS on the
keyboards will be driven sequen-
tially. The service routine is dis-
abled by opening Si.

If the booster was connected
(which is not required during ser-
vice checks), it may be necessary
to press stop key S2 briefly to
actuate the service loop.

A standard multimeter (ana-
logue: Ri = 20 kQ/V or digital)
and an oscilloscope or frequency
meter are required for testing and
checking. If an oscilloscope or fre-
quency meter is not available, not
all recommended test can be car-
ried out, which results in a some-
what greater uncertainty factor.
However, if the construction has
been carried out carefully, there is
not much risk of anything going
wrong, particularly not since the
circuit has no calibration points
whatsoever.

Table 5. Memory mapping

Table 6. Input/output mapping

11.26 elektori

PRACTICAL FILTER DESIGN - PART 9

by H. Baggott

Following last month's discussion of Chebishev filters with a
ripple of 0.1 dB in the pass band, this month’s article
deals with Chebishev networks with a 0.5 dB ripple. These
have an even steeper cut-off profile than the 0.1 dB types but,
as explained last month, the ringing becomes more pronounced.

As in previous articles, five tables are
given that contain all the information for
the calculation of Chebishev filters with a
0.5 dB ripple in the pass band. As was the
case with Table 11. Table 15 can not be
used for the computation of an even-order
section with equal input and output
impedances. For tt sections, the table is
valid for a ratio of 2:1, whereas for T sec-
tions the ratio is 1:2. It all depends on
which resistance is used as a reference.

The specific properties of the 0.5 dB
Chebishev filter are again shown most
clearly by the characteristics in Fig. 47, 48
and 49. The ripple is very evident in
Fig. 47, although it should be borne in
mind that the left-hand part of the scale
has been ‘stretched’. Things are therefore
not as bad as they may seem: it is only
when the ripple exceeds I dB that opera-
tion becomes troublesome.

The cut-off profile is steep: the attenua-

tion of a fourth-order filter at 24 is about
33 dB.

It is interesting to note that the number
of ‘rings' is the same as the order of the
filter.

The delay time characteristic in Fig. 48
shows why the Chebishev filter is not suit-
able for use in phase linear (audio) appli-
cations.

The step response in Fig. 49 shows the
ringing, which is comparable to that in

Chebishev filters with a 0.5 dB

ripple. Table 16. Standardized component values for passive low-pass sections with negligible source impedance.

11.27

Table. 17. Standardized component values for active filters with single
feedback path.

Fig. 44.

A worked example

This time we give only one example, but it has two possible
solutions.

Design an active band-pass filter with a a -3 dB bandwidth
extending from 1 1.5 kHz to 12.5 kHz. The attenuation at 8 kHz
and 18 kHz must be not smaller than 40 dB.

Fig. 47. Gain vs frequency characteristics of Chebishev filters with a 0.5 dB
ripple.

The aim is to keep the circuit as simple as possible. Since no
mention was made of the permitted ripple in the pass band, we
choose a 0.5 dB Chebishev section, because this has the best
cut-off profile.

First, we calculate the centre frequency. / c :

A = V(/i/h) = "-"O Hz.

Next, we must ascertain the complementary frequencies for
the -40 dB points to obtain the steepest cut-off combination.

The lower frequency (8 kHz) is complemented by a frequen-

f 2 = 1 1990^ / xooo = 17.970 Hz.

The higher frequency (18 kHz) is complemented by a fre-
quency of:

/,= I1990 2 /I8000 = 7987 Hz.

The optimum combination is. therefore. 8000 Hz and
17970 Hz. although the differences are so small that we could
use either combination. The -40 dB bandwidth is. therefore.
1 7970 -8000 = 9970 Hz.

From the characteristics we must determine how this band-
width may be achieved with the smallest number of sections.

Fig. 48. Delay time vs frequency characteristics of Chebishev filters with a
0.5 dB ripple.

Fig. 49. Step response of Chebishev filters with a 0.5 dB ripple.

1.28 Gle

Fig. 50. A second-order active band-pass filter with only one opamp Fig. 51. The same filter as in Fig. 50, but configured as a two-stage double

per stage. At higher Qs, as in the worked example, problems soon opamp circuit.

occur.

For this, we take the ratio of the band-
width at -40 dB and that at -3 dB:

9970: 1000 = 9.97.

Using this value in Fig. 47, the attenu-
ation of a second-order filter is seen to be
about 42 dB, amply meeting the require-

In the first instance, an opamp with
multiple feedback paths as in Fig. 30 (Part
5) is chosen. Two of these must be cas-
caded as in Fig. 50 to obtain a second-
order filter.

Before the component values can be
calculated, the poles must be ascertained
from Table 14:

-a = 0.502;

±P = 0.7278.

The Q factor of the filter must be:

Q= 11990/1000= 11.99.

The calculations to arrive at the centre
frequency, Q value, amplification, and so
on, can then be carried out, resulting in:

C = 0.7817

C s =23.89

D = 1.022

/sa =1 1,731 Hz

/ sb =12,254 Hz
A sa = 1.444
A sb = 1.444

The component values are then calcu-
lated with the aid of the formulas given in
Part 5. The value of the capacitor is taken
as 4.7 nF.

First stage:

R, =47.76 M2
R 2 = 60.48 a
R 3 = 137.9 kQ

Second stage:

R, =45.72 M2
R 2 = 57.89 J2
R 3 = 132 M2

In practice, this circuit will function,
but the Q of each stage is fairly high.
Moreover, the voltage attenuation at the
inputs is high enough to cause hum and
noise problems unless the highest quality
opamps are used.

To obviate these difficulties, a two-
stage section based on Fig. 31 (Part 5) as
shown in Fig. 51 may be used. This circuit
is able to cope with the high Qs.

The calculations to arrive at the centre
frequency, Q value, amplification, and so
on, remain as for Fig. 50, but the compo-
nent values will have to be recalculated.

First stage:

R, =95.51 M2
R 2 = 248.1 M2
R 3 = R 4 = 2.887 M2

Second stage:

R, = 91.44 M2
R 2 = 237.5 M2
R 3 = R 4 = 2.763 k£2

There is no noticeable attenuation at
the inputs of this network. It is, however,
necessary that the components used are
close tolerance types (1%), otherwise the
characteristics of the practical filter will
not be identical to those of the calculated
network.

Correction to Part 8

The two circuits shown below were omit-
ted from the top of Table 13 in Part 8.
Sorry!

O ~ O

r

Analogue Touch Sensors

Analogue touch sensors that use surface
chemistry and surface electronics for input
via visual display units (vdus) have been
developed by John McGavin & Co.

The sensors consist of two conductive
coatings applied to a substrate of polyester
or polycarbonate.The faces are separated
by clear dielectric spacer dots and are
brought into electrical contact only when
actuated by the pressure of a finger.

ll-gCT HOmCS SCENE

Simulator for Satellite Signals

A simulator that does a job similar to
those used to train aircraft pilots has been
developed by stc to check on the accuracy
of Global Positioning Systems (gps) used
worldwide for navigating both civil and
military craft on land, sea and in the air.

The company says that its STR2700 simu-
lator will contribute to still more accurate
navigation from satellite signals.

Global Positioning Systems relay on
signals from 18-21 special navigational
satellites in orbit around the earth, of
which the average user can ‘see’ up to five
at any given moment.

COMPUTER-CONTROLLED TELETEXT
SYSTEM

A. Clapp

The experimental system described allows the loading into a
personal computer of Teletext pages, including the ones that are not
normally accessible on a domestic TV set equipped with a Teletext
decoder.

Fig. 1 . Block diagram of the experimental system.

Teletext has been incorporated with tele-
vision throughout Europe since the mid
seventies, with the first published specifi-
cation jointly issued in September 1976 by
the BBC, IBA and BREMA. This initial spe-
cification permitted the production of do-
mestic TV sets with Teletext. The
specification has continued to develop
over the years, and additional facilities
have become available.

Teletext 'Level-2' provided multi-lan-
guage text, and a wider range of display
attributes that may be non-spacing. There
is a wider range of colours and an ex-
tended mosaic pictorial set.

'Level-3' introduced dynamically re-
defined character sets (DRCS) permitting
the display of non-Roman characters, for
example Arabic or Chinese. Pictorial
graphic characters may also be defined,
allowing the composition of improved il-
lustrations for the text compared with ear-
lier levels.

'Level-4' includes full geometric
graphics, and requires computing power
to generate the display from a sequence of
drawing instructions. This permits
graphic displays as good as the highest
resolution mode of the BBC-B computer.
This level offers a colour palette of over
250,000 shades.

'Level-5' is full-definition still pictures,
permitting an image of a better quality
than achievable from a video camera. It
has no losses due to modulating on to a

carrier, and no noise added to the picture
during transmission.

Also possible within the system at any
level is Telesoftware, which is normally
seen as a BASIC listing for BBC compu-
ters. It can however be machine code for
any computer, and encrypted to limit ac-

Levels 4 and 5 exist as specifications,
although level 4 was transmitted by the
IBA as long ago as 1981. There appear to
be no TV sets able to handle these levels,
and until the editors of ceefax and oracle
use it, the extra cost would not be worth
while. Given the TV producers' liking for
computer graphics on everything from
weather maps to pop videos, hopefully
they will come very soon.

Hidden pages

The specification for Teletext is wider
than apparent from the familiar remote
control handset. Page numbers, for

example, are chosen from a key pad with
digits 0 to 9. A displayed page has 24 lines.
Less known is the fact that the system can
accept key numbers in hexadecimal. This
means that page numbers such as 10F
could be transmitted and never seen by a
home TV set. This permits pages to be
transmitted to specially equipped recei-
vers only. The system can transmit
32 rows, 8 of which will not be displayed.
Three of these are in fact defined: two are
used to simplify and speed up related
page selection, and the third carries sys-
tem information including date, time,
channel and, when permitted, a program
definition field to enable video recorders
to be switched automatically to recording
by TV programme rather than time.

The key point is that the specifications
and capabilities of Teletext are improving
constantly, and an embedded design can
not be altered to make use of these devel-
opments. In the case of hidden pages and
rows, it may be that the originators do not

11.30 ele

Fig. 2. Circuit diagram of the Teletext decoder card. The monochrome video output is optional, and intended for debugging purposes.

want to make the information generally The first is the SAA5231 Video Inter- (Enhanced Computer-Controlled Teletext
available. face Processor (VIP2), an analogue IC that Chip), is the really clever one. It takes the

The Teletext decoder described here requires quite a few passive components stream of serial Teletext data, and ana-

can access all definable pages and rows, to be attached to make it work (see Fig. 1). lyses it. When a new' page header arrives,

and make them available to a personal The video processor takes a composite the information is compared with that of

computer (PC) for analysis. The design is video signal from the TV set, and ident- the internal registers. If the new header

split into three units, two of which will be ifies those lines carrying Teletext informa- identifies a requested page, it is stored to

described in detail in this article. These tion. These are subsequently transferred an area in the attached RAM. The decoder
two units are a Teletext decoder and a to the digital Teletext decoder IC is capable of doing this for 4 unrelated

data and control interface connected to a SAA5243. The data clock is recovered pages, and holding the latest update of 4

PC's RS232 port. The third unit in the pro- from the Teletext data stream by the VIP2, Teletext pages at any one time,
posed system is a TV tuner. The block and passed to the decoder IC. The 6 MHz The ECCTC also controls the display
diagram of the system is shown in Fig. 1. clock that runs the system is also gener- function of Teletext. Under the control of
ated by the VIP2. The 13.875 MHz is internal registers, one page in RAM is con-

The decoder divided by two and phase-locked to the verted to a displayed page. The video sig-

Teletext data to become the data clock, nal is available as RGB TTL levels with

Philips Components (formerly Mullard in Most of the resistors and capacitors separate sync and blanking. A mono-
the UK) have long produced a family of around the VIP2 chip are required to ex- chrome signal is also available.

ICs for Teletext, and most TV sets use tract and phase-control the Teletext data The third function of the ECCTC is the
them. The present decoder is based on fwo and clock. one that makes it the choice for this pro-

ICs from this family. The second IC, the SAA5243 ECCTC ject: the SAA5243 is designed to work on

11.31

a computer network, in this case the Phil-
ips I 2 C bus. This is basically a two-wire
networking system specifically designed
for consumer electronics. Each I 2 C bus
compatible IC has a unique address built
in, and a set of communication protocols
to use. The IC monitors the network, and
recognises when it is being talked to. In
response to certain commands it interacts
with the sending device on the bus.

In the present circuit there are only two
devices on the I 2 C bus: the decoder and the
microprocessor. A connector is provided
on the decoder board to make the connec-
tion to other I 2 C devices possible if ex-
perimentation is desired.

The operation of the ECCTC chip and
the I 2 C bus is relatively complex. By con-
trast, the hardware required to implement
the decoder chip in an I 2 C environment is
remarkably simple. The I ! C bus has strict
protocols, and the timings must be ad-
hered to. The ECCTC has several registers
that have to be loaded correctly before
anything will happen. At power-up there
is little evidence of life from the device,
and the display will not even have sync,
let alone a default page of Teletext.

It is common for complex devices to be
controlled via a piece of software called a
device driver. With such a driver, the user
has available a set of high-level com-
mands that allow all the functions to be
performed without the need of detailed
knowledge of that particular function. A
full discussion of the operation of the
ECCTC and the I 2 C bus is so detailed as
to exceed the scope of this article. Soft-
ware is available to drive the decoder
card, and extract from the transmission
any byte, row or page of Teletext. Readers
wishing to know how this is done in detail
are referred to the Application Notes men-
tioned at the end of this article.

The third essential 1C is a 4-to-2 line
converter that connects the Teletext
decoder the I 2 C network. The 4 lines go to
the external processor that transmits data
and clock up and down one pair, and re-
ceives data and clock back from the
decoder.

A composite video output is available
on the decoder board to display mono-
chrome Teletext direct from the decoder.
The video output is useful for debugging
the system because switching between
grabbed pages is instantaneous while
transfer via the bus takes about 8 seconds.
The few additional low-cost components
needed to implement the video output
seem worthwhile even if the facility is
rarely used. They can be omitted, how-
ever, from the circuit without affecting the
rest of the operation.

The composite video is taken from a
Rediffusion tuner unit that can be used to
drive the decoder card direct. The video
output from a VCR should also prove all
right. The decoder has a link that alters the
input level required to drive the card. In
the event of the source not supplying
enough signal, a buffer may be required
to connect the video source to the decoder
card. Use of a tuner unit based on a SAW

(.surface acoustic wave) filter is well worth
considering. Teletext is particularly sensi-
tive to phase distortions, and SAW filters
are a considerable improvement over L-C
IF circuits.

The ECCTC chip has 8 channels, of
which 4 are capable of grabbing a page of
Teletext as it is received. The operator se-
lects the channel to be current from 0 to 3.
The required page for the current channel
is selected, and that channel will continu-
ously grab the updates for that page, even
when the current channel is changed. The
only exception occurs during page trans-
fers to the host computer. The status line,
row 25, must be examined to determine
when the required page has been re-
ceived. When a new page is requested, the
old one is cleared, including the status
line. This is then examined repeatedly
until the new page received is signalled.
The new page is then transferred in ASCII
to the host computer, which has to do the
graphics code conversion.

The use of the other 4 ECCTC channels
is detailed below.

Downloading Teletext
pages on a PC

The function of the controller card is to
respond to instructions received on the
RS232 link to a PC, and to return Teletext
information to a host computer. All the
timing and protocol requirements needed
to transfer information on the I 2 C bus are
handled by an 8051 -based controller card
(Fig. 3).

Commands from the host computer are
in the form of a single letter defining the
requirement, followed by a qualifying

Rhhh examine row in hex

A/j/i examine row in text

Ch channel select

Phhh page select

D display page

H print page

F tile on disk

T timed page

ESC exit program

Table 1 . Commands for the IBM PC control
program.

number. Available commands are listed
in Table 1. Page selection, for example, is
made by the host PC sending the letter p
followed by a 3-figure page number. The
controller card then transmits the com-
mand to the Teletext decoder card. The
controller repeatedly examines the status
line in the decoder until the requested
page is received. The page is subsequently
transferred from decoder memory, via the
RS232 interface, to the PC, which allows
the page to be stored on disk, or to be
printed.

The commands allow the full capa-
bilities of the decoder to be available to the
host PC, while keeping traffic on the
RS232 interface to a minimum. To allow a
wide variety of computers to be used, the
bit rate has been set fairly low at 1200/s.
This means that a page of Teletext takes
about eight seconds to transfer. Pages are
repeated roughly every 20 seconds on
Teletext, so a selected page takes about 30
seconds to receive from request.

Channel selection allows 1 of the 8
channels to be selected as currently at-
tached to the interface. The current chan-
nel is also the one used to form the on-card

monochrome display, if used. As already
discussed, ECCTC channels 0 through 3
are Teletext pages of the form seen on the
TV screen. Channels 4 through 7 are ex-
tensions of the first 4 pages. Commands
such as D (display) and H (hard copy;
print) use the currently selected channel
as the source of data. Page selection can
only be achieved for channels 0 through 3.

The controller transfers pages as
blocks of 24 rows of 40 characters. The
embedded commands of Teletext are
removed, and the 7-bit code is extended to
8 bits to allow for direct representation of
graphics.

The choice of graphic characters to use
may pose a problem in that there is no
standard for Teletext graphics. The author
used an Okidata-80 as well as an Epson
MX-80F/T printer. Both of these have a
character set that includes all Teletext
shapes. Unfortunately, the codes are dif-
ferent for each printer. The IBM clone
used was fitted with a Hercules type
monochrome display adapter. This has
very few graphic characters, so only an
approximation of Teletext shapes is
possible. To allow the use of two printers,
the control card has the option of two
translations of the Teletext page. Each will

result in a print-out that is an accurate
black-and-white copy on the appropriate
printer. The display has only 6 graphic
characters that are similar enough to use.
Since there are 64 Teletext graphics char-
acters, the host computer translates the
graphics character into 1 of the 6 which is
most appropriate. The resultant displayed
page is in fact better than one would ex-
pect. Since the quality of this display is a
function of the host computer configura-
tion, users should be able to write their
own graphics translation routines to
maximize the fidelity of the repre-
sentation. The commands that transfer

text do so with all colour information
removed. If the computer is capable of
colour, the hex transfer command must be
used to ensure that the decoder supplies
unaltered data for translation into a for-
mat suitable for the display used. An ac-
curate monochrome display is always
available from the decoder card. Pages
saved to disk are in the printer format, and
can be printed out at any time for an exact

Users who have other printers will
need to make modifications to permit a
true copy. Provided the printer is capable
of producing the Teletext graphics set, one
of the approaches will work. If the
graphics of the printer are ROM-based,
the character codes supplied by the RS232
interface card must be translated into ap-
propriate printer codes. This will be a one-
to-one translation carried out with the aid
of a look-up table which a number of PC
communications programs, such as Pro-
comm, have available. If the printer is a
type with a RAM-based character set,
such as the Epson FX-80 or compatible,
the best approach is to reprogram it to
emulate an Epson MX-80F/T.

Since the purpose of the present
decoder is to permit examination of the
data without pre-conceptions, and allow
non-ASCII data to be read, two other
transfer modes are available.

The first of these allows transfers of a
specified row in ASCII with graphics
modified as with the full-page mode. The
other transfers a specified row in hexade-
cimal format as it' appears in memory,
allowing the host PC to process a page of
unmodified data.

These two options can be demon-
strated quickly by examining channel 4:
three lines will contain data; one has plain
ASCII text, one Hamming-modified num-
bers relating to the ASCII text, and the
third contains plain hexadecimal data
containing status infirmation on the trans-
mission, including time, date and chan-

PC interface card

The RS232 interface and controller card
shown in Fig. 3 is based on the 8051 micro-
controller from Intel. The 128 bytes of in-
ternal RAM are sufficient to hold all
information for control and temporarily
program data. An external EPROM ad-
dressed by a latch Type 74LS373 holds the
machine code that forms the control pro-
gram. The UART (universal asynchron-
ous receiver/transmitter) in the 8051
coupled to Newport Components' single
5 V RS232 interface chip Type NM232CD
result in a simple, yet reliable, RS232 link.
The NM232CD has an on-board ±15 V
converter.

Practical use of the system

Having built the decoder and the inter-
face, you are in a position to get more out
of Teletext than from a standard televi-
sion-based system. The ability to save

Fig. 4. Some more sample print-outs of
Teletext pages downloaded with the pro-
posed system.

pages to disk and edit them creates the
ability to build up a database. All weather
charts, for instance, over a certain period
could be collected if meteorology is a
hobby.

The BBC transmits computer programs
via Teletext, and these are available with
the present system. Once pages can be
transferred to disk, it becomes possible to
save an entire magazine. One bn disk, ac-
cess to pages is much faster than waiting
for the page to come up in the trans-

mission. This is particularly true if a sub-
page is requested. A sub-page can be spe-
cified by selecting the required page, and
setting the time-page option to the sub-
page number, i.e., timed page 0003 for
sub-page 3 to display this only.

For a first challenge of beating the
hiders of information, users may like to
consider the Televox page, currently on
page 777 of ITV on HTV and presumably
elsewhere. This is an interactive page
where a subscriber can control the display
of information via voice control on the
telephone. On first entry to the service, the
user is given a timed page number to set
his Teletext to. Then information is sent as
a timed page transmission, immediately
followed by a blank screen on a non-timed
page. The effect is that if the timed page is
not set, the pages appear for only a frac-
tion of a second and can not, therefore, be
read. The odds of guessing the correct
page are small, and as subscribers log on
and off it changes.

For further reading:

1. Broadcast Teletext Specification, Septem-
ber 1986. BBC, IBA, BREMA.

2. Level-4 Enhanced UK Teletext. R.H. Vi-
vian, IBA UK.

3. Enhanced Computer-Controlled Teletext
Circuit SAA5243. Philips Components
Technical Publication 255.

4. World System Teletext Specification.

11.34.

UHF CHANNEL TRAP

J. Bareford

Powerful repeaters for
cellular radio and paging
systems, or a strong local
UHF TV transmitter, can
wreak havoc with the
reception of your favourite
TV channel. This is usually
caused by excessive field
strength and resultant
intermodulation in the
aerial booster or the UHF
input stages of the TV set.
Cancel the interference
once and for all with this
simple two-component
notch that covers the
entire UHF TV band.

Ghost pictures, moir£ effects, poor syn-
chronization, colour corruption, picture
inversion and even complete receiver de-
tuning are but a few of the awkward prob-
lems suffered by TV owners having their
own roof-mounted aerial installation, but
unfortunate enough to live close to a
transmitter site with UHF stations on it.

Problems may arise almost overnight
when you find that a particular TV chan-
nel suddenly has a lot of interference on
it, or is simply replaced by an moving
pattern with accompanying buzz on the
sound channel. On investigating the mat-
ter, it may be found that a UHF cellular
radio repeater has been installed recently
on a nearby elevated building. The strong
signal in the 600 or 900 MHz band blocks
the preamplifier in your aerial booster or
TV set, or, more precisely: the d.c. setting
of the preamplifier is shifted to the extent
that the stage acts as a mixer or even a
demodulator or frequency multiplier (va-
ractor effect).

Similar problems may occur if a strong
TV signal blocks reception of a relatively
weak programme on a nearby channel.

30 decibel down

Receiver overloading may be prevented
by suppressing the strong, unwanted
component in the input frequency spec-
trum. The present circuit does this with
the aid of a series L-C filter that can be
tuned to the interfering frequency. The
filter acts as a high-Q notch, offering a
suppression of more than 30 dB at the res-
onance frequency.

As shown in the drawing of Fig. 1, the
inductor is a length of 1 mm dia. silver-

11.35

plated wire connected to a 5.5 pF PTFE
foil trimmer (colour code grey. Philips
Components). The stator terminal of the
trimmer is bent forward and soldered to
the inductor, while two rotor terminals
are soldered direct to ground. This L-C
combination covers most of the UHF TV
frequency range (approx. 470-870 MHz),
and gives far better results than, for in-
stance, a quarter-wavelength coax stub.

The trap is housed in a screened enclo-
sure made from sheet metal (tin-plate or
brass). Coax sockets enable the trap to be
installed in the cable leading to the input
of the aerial booster. Do not fit the trap
between the output of the booster and the
input of the TV set — it has no effect there
because the interference is caused in the
booster!

One socket on the trap may be replaced
by a coax plug to enable the unit to be
plugged direct on to the output of the
coupling/ filter unit, if used.

Alignment is simple: tune to the TV
channel you want to watch, and adjust the
trimmer until the picture is free from in-,
terference. The adjustment is fairly critical
due to the high Q factor of the L-C filter. If
there is more than one source of inter-
ference, each of these must be suppressed
with its own trap, tuned to the relevant
frequency.

Alternatively, if you want to block out
a particular TV channel permanently

whose reception is otherwise all right less one acts on a number of channels :

(cable networks), adjust the trap for maxi- ultaneously, which is not likely to O'

mum suppression. The TV channel will on a cable TV system.

vanish into noise as you reach the channel

frequency. Remember that each channel

to be suppressed needs its own trap, un-

Kxtended coverage for
BBC TV Europe

BBC TV Europe is a simultaneous relay
of the BBC- 1 service broadcast in Britain,
with BBC-2 programming replacing feature
films and purchased material, to give the
European viewer an 18-hour per day service
of the best of the BBC at the same time it is
seen in the UK.

Satellite transmissions of BBC TV Eu-
rope began in June 1987, following an agree-
ment between the Danish Telephone
Companies and the BBC. The service was
extended to Norway later in 1987 and to
Sweden in 1988. As of April 1st of this year.
BBC TV Europe is transmitted from an cast-
spot transponder of the Intelsat-VFI I at 27.5
degrees West.

From its start in 1987, BBC TV Europe
has steadily attracted more viewers, and now
reaches over a quarter of a million house-
holds via the Scandinavian cable networks.
The use of the east-spot transponder, how-
ever, allows direct-to-home reception also if
a dish of 1 .2 m or larger is used.

BBC TV Europe, like the BBC in the UK,
does not carry advertising. Therefore the sig-
nal is scrambled and the cost recovered by
making a charge to cable companies or direct
to home viewers. The SAVE decoder re-
quired is available through local agents from
Sat-Tel.

BBC Enterprises Limited • Woodlands

ELECTRONICS SCENE

• 80 Wood Lane • LONDON W12 OTT.
Telephone: (01 743 5588). Fax: (01 749)
0538.

Intel unveils industry's
first EISA chip set

Intel's 82350 EISA bus chip set consists
of two system board devices that provide
100% compatibility with the EISA bus. In
addition, Intel is supplying a bus master de-
vice for add-in cards, and a bus buffer device
that integrates system board glue logic. In-
cluded in the new chip set are the 82357
Integrated System Peripheral (ISP) and the
82358 EISA bus controller (EBC).which rec-
ognizes and works with both the 32-bit 386
and i486 processors.

Intel also plans to provide the 83252 EBB
for those manufacturers seeking higher inte-
gration for the system board. The EBB con-
tains buffering logic for any one of three
modes, including address, data and parity
control, replacing as many as 17 TTL com-
ponents. Though not strictly required for
EISA compatibility, the EBB will help sys-
tem designers meet critical EISA timing de-

Intel Corporation (UK) Ltd • SWIN-
DON. Telephone: (0793) 696000.

Eutelsat participates in
Olympus communications
experiments

Eutelsat. the European Telecommunica-
tions Satellite Organization, and operator of
four Eutelsat- 1 telecomms satellites, is an
active participant in the definition, applica-
tion and assessment of the communications
experiments to be conducted on the recently
launched Olympus experimental communi-
cations satellite.

Eutelsat has proposed 22 experiments to
the European Space Agency (ESA) to be
conducted on Olympus. A total of 17 arc for
the 20/30 GHz payload, four for the
12/14 GHz specialised payload and one for
the DBS payload. These experiments will
include teleseminars, news gathering, data
distribution to microterminals. SS-TDMA
and narrowcasting. The first experiments are
expected to start in mid-October.

Eutelsat • Vanessa O'Connor • Tour
Montparnasse 33, avenue du Maine •
75755 Paris Cedex 15 • FRANCE. Tele-
phone: +33 (I) 45384747. Fax: +33 (1)
45383700.

1 1 .36 elektor i

SCIENCE & TECHNOLOGY

Advanced implant system for vlsi fabrication

by Bill Pressdee, BSc, CEng, M1EE

In the last two decades, integrated circuit
technology has invaded most areas of
business, consumer products and manufac-
turing. Its growth has indeed been phe-
nomenal and almost exponential with the
element density: nearly quadrupling every
two years. This has been the result of sev-
eral revolutions in the development of
semiconductor devices. These have moved
on from transistor-transistor logic (ttl), to
emitter-coupled logic (ecl), to negative
metal-oxide semiconductors (nmos), and
in the last few years to complementary
metal-oxide semiconductors (CMOS), in
which very large scale integrated (VLSI)
chips of one-quarter or one-half million
elements are not uncommon.

A similar story can be told
of the growth of memory de-
vices up to the most recent bi-
polar types, including dyna-
mic random access memories
(drams) of up to 16 Mbit capa-
city and above. As the circuit
density has grown more com-
pact, the semiconductor manu-
facturing techniques have
become increasingly sophisti-
cated to meet the requirements
of precision in fabrication and
reliability in operation.

The fabrication of a VLSI
chip, measuring a few tens of
millimetres on a silicon sub-
strate is a complicated affair.

The vlsi is a complex three-
dimensional device, the strata
of which are built up by a
series of processes involving
several chemical substances
and a series of photolithographic masks
that define the patterns to be transferred to
the wafer as photoresist.

Fabrication process

A pattern is fixed, generally by ultraviolet
radiation, the unfixed portion being subse-
quently etched away to allow deposition
on the substrate. Precise alignment of the
mask appropriate to each stage of the fab-
rication is paramount, as is the cleanliness
of process operations. Careful attention
must be paid to the temperatures of depo-
sition and annealing to minimize the out-
diffusion of impurities from their layers.

The predeposition diffusion process is

one in which a product lot of wafers -
loaded into a slotted quartz wafer carrier
and introduced into an open-end high tem-
perature furnace tube - is subjected to a
flow of dopant transported along the tube
by a carrier gas. This is often nitrogen
mixed with oxygen, which permits the
impurity to reach the wafer surface as an
oxide.

This process has now largely been
replaced by ion implantation. By acceler-
ating a beam of ionized impurity atoms in
a vacuum to strike the wafer surface, the
ion implantation technique enables a pre-
cise quantity of impurities to be intro-
duced into the substrate. The impurities

PI9000 FARADAY DESIGN

Diagram of the Faraday region of the PI-9000 implanter

may be inserted selectively in areas where
there is an absence of surface masking
material. They can be prevented locally
from reaching the substrate by photoresist
or a thermal oxide layer of sufficient den-

An ion implanter needs to generate a
high current level of the required ion type
to reduce processing time. The ions may
be produced by any method that endows
the atoms with sufficient energy to sur-
mount the ionization threshold, generally
by collision between high energy free
electrons and atoms of the gas. A radio
frequency plasma can be created by an
electron field between a hot filament cath-

ode and an anode, and confined by a per-
manent magnet.

The passage of the atoms through the
plasma enables the ions so produced to be
accelerated into a beam. This beam is sha-
ped and introduced into the target chamber
where it performs a raster scan of the
mounted wafer. The beam power and ion
dose must be carefully controlled to corre-
spond to the depth of implant required.

Greater flexibility

The precision implanter (PI)-9000 was in-
troduced in September 1985 and brought a
new dimension to ion implanters in the
context of precision, reliability and
throughput. The design of the
machine took account of the
progress of VLSI towards CMOS
devices and also chips contain-
ing both cmos and bi-polar
devices.

The fabrication of an ad-
vanced cmos device may re-
quire as many as 1 1 implants,
four of which would be at high
dosage. On the other hand, the
vlsi design may require shal-
low junctions with boron
implants of 10 keV, although
such thin gate oxides are a
potential source of damage
caused by charging effects.

These and other considera-
tions pointed to the need in the
PI-9000 for flexibility to ac-
commodate rapid changes in
dose, energy and implant spe-
cies. With beam currents of up
to 30 mA and a voltage range
of 10 to 180 keV, the machine can handle
virtually any implant requirement.

At the time of the PI-9000's introduc-
tion. the implanters of even modes't cur-
rent capabilities were subjecting wafers to
high power and high charge densities,
causing damage to photoresist and oxide
layers. However, even with three times as
high a beam current as other implanters,
the 9000 generates less than one-third the
pulse power and charge density, while the
photoresist integrity is ensured over its full
power specification and beyond. The scan-
ning system spreads the power over a
large area and incorporates very high scan
speeds. The ultimate wafer temperature is

11.37

further reduced by a water-cooled planar
heat sink.

The system uses a Freeman source with
an extraction voltage of up to 50 kV, de-
celerating to 20 kV for analysis, and a
multi-gap post accelerator that is very tol-
erant of high pressure transients. Accurate
dose control is provided by monitoring the
DC current falling on the beam stop when
the wheel is out of the beam.

Control of the scanning system is inde-
pendent of beam current, making dose and
dose measurement exempt from the effects
of neutralization, secondary electrons
associated with wafers, and electrons from
the electron flood gun, which is turned off
during beam monitoring. The Faraday
region also includes a beam profiler for
measuring beam shape and position that
can be used prior to each implant.

Fewer breakages

The PI-9000 was the first implanter to
introduce planar wafer holding, in which
the centrifugal force of the spinning wheel
holds the wafers in contact with the heat
sinks. Its other advantages include:

• better cooling;

• greater uniformity:

• reduced contamination and wafer
breakage

• the ability to implant over the whole
wafer area.

During photoresist implants, the cham-
ber pressure rises owing to the out-gassing
of hydrogen from the photoresist material.
One of two cryopumps fitted is used to
pump the post-accelerator region, making

More Automation for Klectronics
Manufacturing

Reduced manufacturing times and costs
are in prospect for electronics companies
as a result of a new computer integrated
manufacturing (CIM) software package
from Racal-Redac.

Nowadays, most electronics designers
use computer-aided engineering (cae) and
computer-aided design (cad) systems to
engineer and lay out their printed-circuit
boards (pcbs). The output of such systems,
a finished pcb layout, is usually provided
via a pen plotter or photoplotter in the
form of hard-copy artwork.

However, there are two major areas of
inefficiency in using hard-copy artwork to
set up a pcb manufacturing process.
Firstly, the generation and necessary pho-
tographic duplication of the artwork is
costly and time consuming. Secondly, the
pcb design produced on the cad system
may not meet the constraints on board
shape and complexity imposed by the
manufacturing process. This will lead to

it very stable electrically even at high
out-gassing rates. By careful design of
the temperature control system, the
wafer temperatures are kept at below
40 °C.

The system processes wafers up to
150 mm in batches of 25. loaded on to
the vertical processing wheel.
Automatic loading is via a cassette-to-
cassette handling system that allows up
to five cassettes containing 25 wafers to
be placed in the vacuum load lock.
Clean room access to the PI-9000 is
limited to the load lock chamber and the
light-pen-operated video control screen.

Other measures to ensure a clean
wafer environment include: sputtering
traps; dedicated resolving apertures to
reduce cross-contamination; and wafer
paddles to remove major sources of con-
tamination and particles. The system
maintenance requirements are low;
hardware and software are modular in
design; full diagnostics, maintenance
prompts and self-calibration routines are
provided.

Superior wafer handling

The new PI-9200, introduced just over a
year ago, is substantially the same as the
PI-9000, but has several new hardware
and software features and an upgraded
performance as a result of three years of
operational experience with the earlier
machine. The new model includes fea-
tures incorporated as upgrade kits for
the 9000 to improve system reliability,
made possible by careful failure moni-

ELECTRONICS SCENE

costly reworking of the original design,
and possibly to a great deal of wasted
effort in trying to set up a manufacturing
process for an impossible design.

Racal-Redac's ‘Visula CAM (computer-
aided manufacturing)' consists of a series
of programs that allow pcb designs to be
taken directly from its Visula Plus
cae/cad system (or from non-Redac sys-
tems via the standard Gerber transfer for-
mat), optimized for the manufacturing
process and used to automatically program
today's high-technology manufacturing
tools such as auto-assembly machines and
automatic test equipment.

The most innovative aspect of Visula
cam is its variety of post-processing inter-
faces. These interfaces allow a pcb design
to be post-processed into a data format
that can be used to drive the tools used in
pcb manufacturing directly.

toring and analysis.

The handling system has been
redesigned to take wafers up to 200 mm,
the wheel batch size has been reduced to
17, although throughput exceeds that for
150 mm wafers on the 9000. The
implanter has a higher performance
source and the load lock chamber has
been redesigned to reduce gas flow turbu-
lence and particulates, as have the gas
vent and pump-down ports.

Internal parts that analysis has shown
to be particulate-generating have been
eliminated and the particulate level has
been further reduced by a new cleaning
routine for the load lock and the wheel
chambers.

A new control computer has been in-
troduced and the software response times
have been improved considerably, while
the data collection capacity has been
enhanced. The new Autobeam software
enables the process engineer to specify
any number of recipes to meet the needs
of special devices. Each is identified by a
simple code number. All the engineer has
to do is to specify the number and load
the cassette; the Autobeam then takes
control of the fabrication.

The Precision Implanter is designed and
produced by Applied Materials • Implant
Division • Foundry Lane • HORSHAM
RH13 5PY • England • Telephone (0403)
53316.

Electroplating pcbs with Copper

A high-speed acid-copper process that
offers excellent deposit distribution for
pcbs has been introduced by PMD
Chemicals. 'Procirc 971' offers a current
density of 20-80 A/ft 2 (1. 8-7.4 A/m 2 ) to
make it possible to plate board types selec-
tively that previously could be plated only
at relatively low current densities.

The process is suitable for closely
packed surface-mount boards; boards that
have large areas of ground plane together
with isolated tracks; and boards that have
a large variation in plating area from side
to side. It will plate down holes with a 6: 1
depth-to-diameter ratio and give an even
coating on surfaces and holes.

‘Procirc 970' is a similar solution spe-
cifically intended for multilayer boards. It
offers the same quality of deposit but
improves the depth-to-diameter ratio to
20:1 while still giving nearly even deposit
thickness ratios. Its operating current den-
sity is 5-25 A/ft 2 (54-270 A/m 2 ).

OPEN SYSTEMS

by Pete Chown

The growth in standards for computing
must be one of the most significant devel-
opments of the last few years. The term
‘Open Systems' has come to refer not just
to the original idea of being able to inter-
connect different makes of computer, but
also to a whole range of products mainly
centred on Unix and X-Windows. Sun
Microsystems' nfs is often included,
although this is really a proprietary system
that has become generally accepted.

At the heart of all the ost applications
lies the standard itself, which is what
allows them to interchange information,
typically over a thin-wire Ethernet. The
standard was one of the first systems to be
based on a layered model.

The layered model

A layered model is really a form of struc-
tured programming, in that high-level
operations are separated from low-level
operations. Rather than being simply top-
down, however, it is split into a vertical
stack, so that the higher levels are cut off
from the lower levels at certain points.

An accurate interface is defined
between all of them, so that a message is
passed down at the transmitting side and
up at the receiving side.

The layers used in the OSI standard,
with the operations they perform, are:

7 - Application. This provides the front
end of the system. It controls the actual
sending of information down the lower
layers and obtains the message from the
application program that asked for it to be

6 - Presentation. This layer puts the data
provided into the standard format to be
sent. It handles data encryption.

5 - Session. It is the job of this layer to
ensure that both devices know when com-
munication starts or comes to an end. It
must therefore tell the receiving computer
that a session (this may be logging on or it
may just be sending a message) is starting
and also when it has finished.

This is particularly important if
there is likely to be a significant
delay between blocks of data. In
that case, it can not be left to time
out, because the delay would be
very long. This sitution may be
encountered if a message is being
sent over the packet switch net-
work, where delays can be
encountered.

4 - Transport. The purpose of this layer is
to decide what the most cost-effective way
to send a message is. It does not have any
control over the route that the message
takes through the network. It will apply
such other considerations as urgency and
the availability of resources.

3 - Internet. This layer decides on the best
route through the selected network for the
message to take. The layer could well be
on a computer different from that which
originated the message: suppose a mes-
sage is sent on to the packet switch net-
work by the transport layer. It is the res-
ponsibility of a different computer to con-
trol the route through the network,
because individual customers have no
control over that.

2 - Dataline. This handles retransmission
of corrupted communications and checks
crcs or parity bits (which allow the
receiving computer to check the integrity
of the data).

I - Physical. This is the actual device
driver that transmits the data on to the
hardware interface between the comput-

In many applications, the layers are not
distinct: for example, someone may pro-
duce a single chip that handles error
checking and interfacing, thus joining the
dataline and physical layers. In addition,
some companies, notably IBM and dec,
have their own version of the standard that
predates it: the standard was designed to
pull together the various proprietary stan-
dards emerging. The layers in these may
have different names as shown in the table
below for Decnet.

You would be excused for asking what
possible advantage there could be in this
complex setup. The answer is that it is
now possible to conceive of. say, two ses-
sion layers intercommunicating directly,
because the layers below form an interface
in their own right. As you go down to

lower and lower levels, this interface sim-
ply moves nearer to the hardware. Each
layer in itself is fairly simple, so that writ-
ing an interface based around osi is not the
formidable task it would be without it
being split up into a vertical stack.

Layered models also state what is
implicit in every interface, even if these
are not designed around such a model, in
that it needs to be possible for higher level
functions to assume that lower level func-
tions have been carried out - that crcs
have been checked, for instance. Before a
CRC can be checked, it must, of course be
determined that the message is legitimate
electrically, so that for an RS232 interface,
for example, a byte is framed by start and
stop bits correctly. It is thus seen that a
layered model follows on from what is
really common sense.

The application of osi
The major growth area in computing in
the last few years has been in the market
for workstations. These are cost-effective
ways of computing since they avoid the
need of large concentrations of computing
power, which are expensive. They depend,
however, for their effectiveness on good
communications. On a conventional sys-
tem. communications are provided fairly
easily because everyone is working on the
same machine. Consequently, the worksta-
tions have standards that probably are
more emphasized than in any other area of
computing.

For this reason, osi has become associ-
ated with workstations and the thin-wire
Ethernets they often use for data commu-
nications. It is in this sector of the comput-
er market that some of the most imagina-
tive uses have been found for the new pro-

The graphics standard

The purpose of the graphics standard is to
relieve large computers of the work
involved in producing graphics to present
the results of the programs they are run-
ning. It also relieves communications links
of the load of transmitting thou-
sands of individual pixels. Instead,
certain instructions are sent to
local workstations over a thin-
wire Ethernet, and these worksta-
tions then control the production
of the actual image. This tech-
nique is referred to as remote pro-
cedure calling, because graphics
procedures can be called by a
remote machine. The code trans-

End-to-end transport

11.39

mined may the same whatever the receiv-
ing machine.

Once the image has been received by
the workstation, another advantage
becomes apparent. Some of the things that
workstations are very good at are desk top
publishing and graphics applications, so
the pictures obtained from the remote
machine can quickly and easily be incor-
porated into documents being prepared
locally (this also relieves large machines
of word processing, which, owing to the
overhead in switching between tasks, they
are very bad at).

Anyone who has used Aldus
Pagemaker or MacDraw will be aware of
the way in which shapes can be moved
around on the screen, as distinct from a
■painting’ program where a shape is mere-
ly stored as a collection of pixels on the
screen. This is another advantage of the
graphics standard, because the graphics
sent to you by a remote machine can be
p I ted locally: you might decide, for
instance, that you wanted your pie-chart
twice as large. On a conventional system,
this would result in large pixels becoming
visible where small ones had doubled in
size. With the new system, however, all
the co-ordinates and sizes can be doubled,
giving rise to an accurate chart at four
limes the area.

Network filing system

The network filing system was devised by
Sun Microsystems while everyone else
was trying to reach a consensus. This
move, brilliant commercially, but bad for
effective standards, gave Sun the lead
when it became accepted at least as a de
facto standard.

This system allows you to work on one
machine and use files distributed around a
thin-wire network. What you do is to set
up a logical directory on your machine
that actually corresponds to a directory on
a remote machine. The fact that the direc-
tory is not local is invisible to the user
once that link has been set up.

A similar, but less powerful, system is
used by Microsoft for ms-net. This pre-
dates the Sun system by quite a long time,
but there are several problems: firstly, the
machine providing the files has to be tied
up as a dedicated file-server: secondly, the
remote directories are mapped on to local
drives - each remote directory is thus
placed at the level of being a different
physical device. This limits the number of
remote directories to 26. which is probably
not too much of a problem, but it makes
the system inelegant and confusing.

Distributed document architecture

The dda has been set up to allow a docu-
ment to contain several different files in
such a way that the merging of these files
is invisible to someone looking at the doc-

ument. These files could, of course, be on
a remote machine if the system were used
in conjunction with nfs. At present, it is
available only on dec machines running
DEC-windows (a version of x-windows
with extensions. The extensions are there
to make it difficult for users to change to
other x-windows systems. This technique
has been used by all the major workstation
manufacturers).

This technique opens up a whole range
of possibilities. For instance, it makes it
possible to design documents that update
themselves automatically when something
changes, say, a graph. A new run of simu-
lation could, therefore, cause the report
relating to it to update automatically as
well (it can not, however, rewrite the con-
clusions drawn from the graph!).

The technique is more efficient in
terms of storage than conventional docu-
ments. Suppose you have a large illustra-
tion that has been 'pasted' into a document
prepared on a dtp system. This illustration
is then stored in the document file and also
in its original form to allow it to be
changed if necessary. With a distributed
document system, the illustration is stored
only once, and the document derives its
illustration from the same file.

This system also has some disadvan-
tages: it is, for instance, not possible to
have one file that contains a document.
This makes it more difficult to e-mail it to
someone. Then there is a danger of inter-
connected webs of files growing up, which
are hard to manage because it is much
more difficult to say whether a file is fin-
ished with. Furthermore, it is possible for
a file to belong to more than one docu-

These drawbacks become more serious
if the constituent files are not even on your
machine: suppose you have a file that is
offered to somebody remotely and this
third party incorporates it into a document
without taking a copy of it. You might
then conclude that the file is finished with
and erase it. This problem is more likely to
occur if people working on the same pro-
ject are routinely given access to your
files. It makes it much more important for
strict control to be exercised over which
files can be assumed to be left there and

Documentation standard

Go into any large organization and you
will discover the endless problems of
moving documents between different
word processors. There is. consequently, a
proposal between several large computer
companies to set up a standard for trans-
ferring documents. This standard, how-
ever. is still at the proposal stage.

The idea is that there be a uniform way
of storing the margin settings, page
lengths, inserting headings, and so on. It

seems unlikely to catch on, however,
because it relates to text-only documents,
and not to dtp output files or documents
with graphics inserted into them. It seems
improbable that anyone will want to
accept a system that can not cope with
these types of document.

There are two ways of implementing
the documentation standard. One is to use
a native-mode editor that works directly
on files in this format. The other is to use a
conversion program written for a particu-
lar word processor that converts files to
that format, and then another conversion
program to convert the files back to the
format required for the destination word
processor.

Unix and X-windows
Unix and X-windows are not really ost-
based applications, but are very important
for the success of ost. They form a stan-
dard operating system, based on C, that
allows programs written for one worksta-
tion to run on another. This is very impor-
tant, because it permits the workstations to
become program development tools: the
code is then run on a more suitable desti-
nation machine. Also, in the volatile work-
station market, it is impossible to be really
confident about where any of the smaller
operators will be in a few years' time. It
helps manufacturers to sell their products
if users know that they can change to
another manufacturer fairly easily. This is,
of course, not the attitude taken by IBM
who have traditionally blocked standards
(even ascii!) because these allow people
to buy non-IBM machines. It is, of course,
true that what makes sense for smaller
manufacturers does not for larger ones like
IBM and dec who try to get their own stan-
dards adopted. Increasingly, however,
even these large companies are being
forced by user pressure to support ost.

Bringing it all together

We have looked at osi and a wide variety
of workstation and network-based applica-
tions. The large flood of applications
depends entirely on ost and Unix, which
makes it clear how revolutionary the com-
bination of these two has been.

I will now consider one example of the
use of this combination that brings to-
gether many of the things discussed in this

The example is a financial report of a
company that will contain a general text
written by the general manager or manag-
ing director, graphics produced by the pro-
duction manager or director outlining the
efficiency of a production process and text
and graphics produced by the accounts
department showing the overall financial
situation of the company. Assuming that it
is important for the document to be kept
up to date, a distributed system is used.

The general manager, or his assistant,
would produce his text, which contains
references to the files for the graphics and
any additional text. It would not be essen-
tial, and in practice it would almost cer-
tainly not be the case, to use the same
word processor that the other texts are
prepared on, as long as the documentation
standard is used.

All the parts of the document would
update themselves automatically, so long
as they did not change so radically as to
make the author's conclusions meaning-
less. One problem with large-scale distri-
bution as encountered here would be the
large load on the thin-wire Ethernet.

Let us now consider what would hap-
pen to a copy of one of the graphs as it
moves through the layered model. Firstly,
the message would be passed to the appli-

cation layer (the message will already be
in graphics standard form) on the sending
computer, which would fetch the message
from memory and send it on.

The presentation layer would encrypt
the data if necessary: it would probably
not do any protocol conversion because
the message is already in a standard form.

The session layer would then (via the
lower layers) tell the session layer on the
receiving computer that a message is start-
ing (notice how the session layers can be
regarded as intercommunicating directly).
It would then send the message to the
transport layer and tell the receiving com-
puter that the message had been sent. Note
that what could be an entire session is
only used for one message in this case.

The transport layer would have little to
do in this example since only one method

of transport is available: the thjn-wire
Ethernet.

The internet layer would then decide
on the most efficient and cost-effective
route through the networks if there were
more than one connected via a bridge.

Finally, the dataline layer would add
CRCs and other checking information and
the physical layer would send the mes-

On the way to the receiving computer,
all the layers would perform the operation
in reverse. The first item sent would be
the session start information and this
would be passed on until it came to the
session layer that would note that a mes-
sage was starting. The rest of the message
would then be passed on, and finally the
session end information would tell the
session layer to end the message.

11.41

RGB-TO-CVBS CONVERTER RFK7000

This RGB-to-CVBS converter, designed by ELV GmbH, accepts
digital as well as analogue RGB signals from computer systems, and
supplies a composite output signal suitable for driving a monitor, a
PAL-compatible TV set with SCART input, or a video recorder.

Nearly all of today's home computers
and personal computers (PCs) are capable
of supplying RGB ( red-green-blue ) output
signals for driving a colour monitor. The
RFK7000 RGB-to-CVBS ( chrominance -
video-blanking-synchronisation) converter
allows computer-generated colour pic-
tures to be recorded on a VCR, or dis-
played on a TV set, which normally has a
greater screen size than a computer moni-
tor. This brings interesting applications
related to 'televised' demonstrations,
multi-display networks, etc. within reach
of the computer enthusiast with an inter-
est for graphics applications.

Connecting the converter

The RFK7000 has 4 connectors on its rear

BUI:

This socket accepts a 3.5 mm jack socket
via which the unregulated 12 V d.c. sup-
ply voltage is applied to the converter.
BU2:

This SCART socket takes the 3 analogue
RGB signals at an amplitude of about
1.5 Vpp. Analogue RGB signals allow an
almost infinite number of colour combina-
tions to be displayed.

BU3:

Via this SCART socket, the RFK7000 sup-
plies the CVBS signal to the TV set or
video recorder. A potentiometer allows
the CVBS output level to be adjusted over
a wide range.

BU4:

A 9-way sub-D connector accepts the digi-
tal RGB signals at TTL level supplied by
the computer. The 3 signal lines and the
associated Intensity line give a maximum
of 16 colours.

The supply input of the RFK7000 is con-
nected to a mains adapter with 12 V d.c.
output. The SCART output is connected to
the CVBS (composite-video) input of the

video recorder, monitor or TV set. Either
BU2 or BU3 is used to drive the RFK7000:
BU2 for analogue, BU3 for digital, RGB
sources.

Optimum picture quality is achieved
by adjusting the video level control on
the front panel of the converter.

Circuit description

The circuit diagram of the RFK7000 is fair-
ly complex — see Fig. 1 .

Digital RGB input

The digital RGB signals are applied tot he
converter via 9-pin socket BUr. This input
is intended mainly for IBM PCs and com-
patibles equipped with colour graphics
adapter (CGA). A CGA card supplies the
3 RGB signals plus an intensity signal that
allows any basic colour to be switched to
half intensity. This results in a maximum
of 16 different colours. The pinning of the
9-way connector is as follows:

Pin 1 : ground

Pin 2: not connected

Pin 3: red

Pin 4: green

Pin 5: blue

Pin 6: intensity

Pin 7: not connected

Pin 8: horizontal sync

Pin 9: vertical sync

The RGB and intensity signals are applied
to XOR gate inputs (IC4). Jumpers Bri and
Bre enable the RGB and/or intensity sig-
nal to be inverted, so that the entire video
signal can be inverted if desired.

The intensity signal is coupled into a
matrix network via a CMOS switch. The
second brightness level can be adjusted
with preset R23.

The 3 RGB signals are taken to the anal-
ogue inputs (pin 3, 4 and 5) of . PAL en-
coder IO (a Type MC1377) via a resistor
network composed of R1&-R21 and R36-R38.

At the chip inputs, the RGB signals have
an amplitude of about 1 V PP at maximum
intensity.

Each synchronisation signal is first fed
to a transistor buffer stage, T1-T2, and
from there to a XOR gate in IC6. The po-
larity of the synchronisation signals can
be set to requirement with the aid of jum-
pers Bn and Bn. XOR gate IC6b supplies
the composite sync signal at digital level.
This negative-going signal is fed to pin 2
of IC7 via voltage divider R39-R40.

PAL encoder

The Type MC1377 PAL encoder from Mo-
torola forms the nucleus of the circuit,
because it performs the bulk of the signal
conversion functions. The colour subcar-
rier frequency is adjustable with trimmer
C25, while the position of the colour burst
on the rear porch of the CVBS signal is
adjusted with R34.

Analogue RGB input

The circuit takes analogue RGB signals
from SCART socket Bu2. This is intended
for computers such as the Atari ST or
Commodore Amiga, having an analogue
or quasi-analogue RGB output. Since the
RGB output level supplied by these com-
puters is usually 1.5 V PP to 3 V PP , potential
dividers R8-R9-R10 and R36-R37-R38 are re-
quired to ensure that the converter inputs
are driven with a maximum level of 1 V PP .

The RFK7000 allows separate as well as
composite sync signals to be applied to the
SCART input. Separate horizontal syncs
at pins 10 and 14 are fed to Ti and T2 via
4.7 kn resistors. The function of the tran-
sistors is similar to those used for the digi-
tal sync signals, as discussed above. A
composite sync signal as supplied by, for
instance, the Atari ST, is applied via
pin 20 of the SCART input. This signal is
peculiar because it lacks horizontal syn-
chronisation pulses during the vertical
blanking interval. The MC1377, however,

11.42

Content of the kit supplied by ELV France.

can not work properly without these pul-
ses. The circuit around IC3 and ICs con-
verts the composite video signal into a
standard composite sync signal that can
be handled by the MC1377.

The composite synchronisation signal
at pin 20 of the SCART input socket has an
amplitude of 2 to 3 V PP . A clamping circuit
composed of C30-R2-R3-R4-D5-C9 is used to
derive a direct voltage from the composite
sync signal. This direct voltage is given a
digital level to control gate IC3.1. A sub-
sequent gate, IC3b, inverts this control

Gate IC3c and surrounding compo-
nents Cio-Rs-R<,-R 7-D4 form an oscillator
that is disabled outside the vertical blank-
ing interval by means of D6. This means
that the oscillator supplies horizontal syn-
chronisation pulses during the raster
blanking interval only. The number of
pulses and with it their spacing (32 ps) is
adjusted with preset R7. Gate lC3d nor-

mally supplies a steady logic high level,
but positive-going horizontal sync pulses
during the vertical blanking interval.

The length of the raster blanking inter-
val is determined by components D7-C29-
Rn and inverter ICsc, whose output level
changes from low to high at the end of the
vertical synchronisation. This event en-
ables the regenerated horizontal syn-
chronisation pulses from pin 2 of IC3 j to
be added via ICs>, so that the output of the
sync generator, pin 8 of ICs, supplies a
normal composite synchronisation signal.

If the input signals for the converter
are obtained via SCART socket BU2, the
jumpers on Brl and Bn must be set in a

Parts list

Resistors:

R46 = 470
R«4 = 330a

R22|R24;R32;R33 = 4700
Ri;R8;R9;Rio;R 42;R<3= 1k0
R41 = 1k2
R4 . 1k8

R3o;R3i;R3s;R37;R38 = 2k7

R25 - R29 = 4k7

R2 = 5k6

R12- R21 = 10k

R11 = 15k

R5 = 18k

Re = 33k

R35 = 47k

R3 = 100k

R45 = lOOli potentiometer with 6 mm spindle
R23 = IkO preset H
R34 m 25k preset H
R7 = 50k preset H

Note: R39, R40 and R47 are not fitted.

R19, R20 and R21 changed w.r.t. circuit di-
agram.

Capacitors:

C21 - 150p

C23:C24 = 220p
Cio;Ci4;Ci9;C20 - InO
C29 - 4n7
C26;C27. 10n
C13 - 22n
C2 - 47n

Cs - Ca;Cu;Ci5;C22 - lOOn
C30 - 220n
Ca;C4:C9- 10p; 16 V
Cie;Ci7;Ci8 * 22p; 16 V
Ct2 - 47p; 16 V
C28» lOOpi: 16 V
Ci -470 m; 16 V
C25 « 40p trimmer

Semiconductors:

IC7 = MC1377

ICs = CD401 1

ICs - CD4066

ICs - CD4070

IC3 - CD4584

IC4 . 74LS86

IC2 = 7805

ICi = 7810

Di = 1N4001

D2;D4-D7= 1N4148

Da « LED; red; dia. 3 mm

Ti;T*;Ts = BC548

Miscellaneous:

Qt = quartz crystal 4.433 MHz.

Vzi » 330ns delay line.

Li » lOpH, adjustable.

Bn - 8 m ■ 3-way pin header.

BU2;BL)3 = SCART socket for PCB mount-
ing.

BU4 m 9-way angled sub-D socket for PCB
mounting.

BUi = 3.5 mm jack socket for PCB mounting.
4 off jumpers.

6 off screw M3x8 mm.

6 off nut M3.

Enclosure.

PCB Type ELV892525.

11.44

Component mounting plan ,

printed-

manner that ensures low levels at the out-
puts of XOR combination IC4 (Bri and Bn
at +12 V).

CGA and 50/60 Hz

The colour graphics adapter (CGA) in
IBM PCs and compatibles supplies a ver-
tical scanning frequency of 60 Hz. Most
modern TV sets are capable of detecting
this and switch automatically from 50 Hz
to 60 Hz. Older types, however, may re-
quire the vertical synchronisation to be
corrected if the picture rolls. In most cases,
this adjustment is fairly simple to make by
means of the vertical sync control at the
rear of the set.

In case the picture is not correctly cen-
tred, use MS-DOS command

MODE CO80.R

to shift the entire picture one character to
the right.

Output circuit and power supply

The composite output signal is supplied
by buffer Ta, level control R45 and electro-
lytic capacitor C28.

The RFK7000 has two on-board voltage
regulators, so that is conveniently
powered from a standard mains adapter
with 12 V d.c. output at about 300 mA.
The unregulated input voltage is applied
via 3.5 mm jack socket BUi, and fed to
buffer capacitor Ci via Di, which affords
reverse polarity protection. Capacitor C2
serves to suppress noise. Regulator ICi
has a diode, 62, connected to its ground
terminal to raise the output voltage from
10.0 to about 10.7 V. This provides the
1 supply voltage for the PAL encoder
I MC1377, which requires a minimum of
10.5 V for correct operation. Capacitor O
serves to eliminate any risk of oscillation.
LED D3 is powered via Ri and indicates
I that the RFK7000 is switched on. Finally,
the 5 V supply for the digital circuits is
formed by regulator IC2 in combination
with decoupling capacitors 0 to Cs.

Construction

The RFK7000 is relatively simple to build
because all parts are accommodated on
the single printed-circuit board supplied
j with the kit. Construction is expected to
take about 3 hours.

Start by inserting the lowest profile
parts, the 29 wire links (do not solder
\ them as yet). Next, bend all resistor termi-
. nals to obtain the right pitch. Insert the
resistors in accordance with the Parts List
and the component overlay "on the PCB.
Push the terminals apart after inserting
the resistors to ensure that they do not
drop from the board as it is turned and
pushed firmly on a flat surface. Solder all
wire terminals, and cut them off as close
as possible to the solder joint.

Next, turn the board and fit the 7
diodes, 8 ICs, capacitors, etc. in the nor-
I mal manner. Lastly, mount the 4 connec-

I tors and the video level potentiometer on
to the board. Check your work by inspect-
ing all solder joints.

Remove the nut from the 3.5 mm jack

socket, and fit the rear panel of the enclo-
sure on to the rear side of the PCB. The two
SCART sockets and the 9-way sub-D
socket are each secured with two
M3xl0 mm screws inserted through the
socket flanges from the outside of the rear
panel. Each screw is secured with two M3
nuts. Mount and tighten the nut on to the
jack socket.

The front panel supplied with the kit is
also quite simple to mount. Remove the
nut from the level control potentiometer,
mount the front panel, and secure the nut
again at the outside. The potentiometer
spindle is cut to about 10 mm. Next, fit the
collet knob and secure it on to the spindle.

Insert the PCB with the front and rear
panel attached into the guides in the bot-
tom half of the enclosure.

Jumper settings

Most CGAs in IBM PCs and compatibles
supply a positive h-sync and v-sync sig-
nals. Some cards, however, supply a nega-

The horizontal sync signal is fed to the
base of Ti via pin 8 of socket BUj and fcs,
and the vertical sync signal to the base of
T2 via pin 9 of BUi and R28. Assuming that
positive sync signals are applied, either
the horizontal or the vertical sync signal
must be inverted to ensure a negative-
going composite sync signal at pin 1 1, the
output of lC6d. This may be achieved in
two ways:

1. Pin 6 of ICsb is tied to +5 V via Bn, and
pin 9 of ICfc, to ground via Bn;

2. Pin 6 of ICob is tied to ground via Bn,
and pin 9 of IGk to +5 V via Bn.

Since most CGA cards supply positive-
going RGB signals. Bn is connected to
ground to ensure that the signals are not
inverted by gates IC4.1 through ICic. The
same applies to the intensity signal: pin 1 3
of IC4d is normally connected to ground
via Br2. The value of R23 determines the
effect of the intensity bit on the colours,
and may be adapted to individual require-

The jumpers on the board are fitted to
allow the RFK7000 to accept sync po-
larities from CGA cards other than the
standard types around. In case of doubt,
consult the manual supplied with your
CGA card.

Alignment

The alignment of the RGB-to-CVBS con-
verter concentrates mainly on PAL en-
coder IC". Alignment is straightforward,
and can be carried out without an oscillos-

Apply a digital RGB signal to BU4 (if
necessary, refer to the pinning shown in
Fig. 2), and connect a monitor with CVBS
input to BU3. Adjust C25 and R34 alternate-
ly until the colour appears on the monitor.

Alignment with the aid of an oscillos-
cope is even simpler because the instru-
ment allows R34 to be adjusted
beforehand. Connect the scope to the out-

put of the RFK7000, pin 19 of BU3. Adjust
R34 until the colour burst starts at 0.5 (is
after the horizontal sync pulse.

Next, adjust the cross-colour filter, Li-
C21. Use an insulated trimming tool to ad-
just the core of Li. Watch the picture on
the monitor, and minimize the moving
cross-colour patterns that occur typically
at colour boundaries. This adjustment is
also possible with the aid of an oscillos-
cope: peak the chrominance signal
measured at pin 10 of the PAL encoder
chip. This completes the adjustment of the
RFK7000 for use with CGA-compatible
PCs.

No further alignment is required if the
separate sync signals are applied to the
SCART input socket. If, however, compo-
site sync is applied to pin 20, preset R7 has
to be adjusted.

Although the Atari ST supplies separ-
ate sync signals to the monitor socket (pin-
ning: see Fig. 3), composite sync is used on
the SCART cable provided with some STs.

Preset R7 is used to set the pulse spac-
ing of the horizontal sync signal gener-
ated during the vertical blanking interval.
The pulse spacing may be measured at
pin 8 of IC3J, and should be about 32 ps.
The actual value is fairly uncritical — the
important thing is that the MC1377 re-
ceives an even number of horizontal sync
pulses during the raster blanking interval.
This is required for correct synchronisa-
tion of the internal PAL bistable. Con-
structors not in possession of an
oscilloscope simply adjust R7 until the col-
our shows up on the screen. Some re-ad-
justment of R34, R7 and C25 may be
required for optimum results, because
these adjustments have a fairly large
range and some interaction. In most cases,
however, the alignment of the RFK7000 is
straightforward by optimising the colour
fidelity with the aid of the monitor.

Finally, it should be noted that the
graphics card or computer used to drive
the converter must be programmed to
supply 50 Hz vertical synchronisation
pulses if pictures are to be recorded on a
VCR. This is not required for most moni-
tors and TV sets, whose vertical scanning
rate is adjusted either automatically or
manually to synchronize at 60 Hz. The
RFK7000 is not suitable for NTSC systems.

1 1 .46 ele

16-CHANNEL RUNNING LIGHT

W. Werner

This month we turn our attention to a less serious design. The
robots in the popular TV series Battlestar Galactica’, and the
super-intelligent car ‘Kitt’ in ‘Knight Rider’ are credited with seeing
abilities obtained from an electronic eye. The running lights circuit
described here simulates such a scanning eye, and is aimed at our
younger readers, the budding Knight-Riders’ and model robot
constructors.

The circuit diagram of Fig. 1 shows that
the anodes of the 16 LEDs that simulate
the scanning eye are commoned and con-
nected to the +12 V supply via Ri. We can
make any 1 of the 16 LEDs light by con-
necting its cathode to the negative supply
rail, which is the same as ground in the
present case. Circuit IO is the electronic
equivalent of a single-pole 16-way rotary
switch because it takes the cathode con-
nections to ground in a sequential man-
ner. Only one LED lights at a time. First,
output SO goes low, then SI, then S2 and
so on, to S15. Upon reaching S15, the
'switch' is turned back again to SI 4, S13,
and so on, down to SO.

Each LED connected to IC3 can be
thought of as having a number between 0
and 15. This number is applied in binary
coded decimal (BCD) form to inputs Dl-
D4 of IC3. This should make the type de-
scription of the IC, 4-lo-16 decoder, clear:
the device converts the 4-bit code applied
to D1-D4 into the corresponding decimal
number, 0 through 15. Since only one out-
put is active (that is, logic low) at a time,
the description l-of-16 decoder may also be
used.

With 4 digital selection inputs, 2' = 16
channels can be addressed individually.
Output channel 0 (IC3 terminal SO) is actu-
ated by binary code 0000, and output
channel 15 (IC3 terminal S15) by binary
code 1111. Table 1 lists all intermediate
values, and shows the 'walking zero' in
the output line configuration. Control
input D1 changes state at the highest rate
(0-1-0-1, etc.), and is therefore called the
least-significant (LS) address line. Control
input D4 changes state at every eighth

transitions of D1 . In the present 4-bit sys-
tem, it is therefore the most-significant
(MS) address line.

Counter and clock
generator

The l-of-16 decoder/LED driver is ad-
dressed by a counter, IC2. This IC contains
4 series-connected bistables. Each of these

divides its input frequency by 2, and sup-
plies its output signal at a pin designated
Q. Since there are 4 internal bistables, out-
puts QA through QD can take on 16 dif-
ferent logic configurations.

The clock signal applied to input cue
of IC2 is divided by 2 in the first internal
divider, which is associated with output
QA. The clock signal divided by 4 appears
on output QB, divided by 8 on QC, and
divided by 16 on QD. This means that QA

11.47

Fig. 1. The circuit Is essentially composed of a 1-of-1 6 decoder/LED driver (IC3), a counter
(IC2), and a clock generator (gate N1).

changes at the highest rate, so that it can
be connected to input D1 of the LED
decoder, IC3. Similarly, MS output bit QD
of the counter changes every 8 transitions
of QA, so that it can be used for driving
the MS address input of the LED decoder.
The operation of the counter is illustrated
by the timingdiagram of Fig. 2.

Input U/D allows the counter chip to
be programmed to count up (0 to 15;
U/D=l) and down (15 to 0; U/D=0). The
bistable built from NAND gates N2 and N3
ensures that the count direction is
reversed automatically when state 0 or 15
is reached.

Pin 8 of gate N3 functions as the SET
input of the bistable, and pin 6 of N2 as the
reset input. Pin 10 of N3 forms output Q,
and pin 4 of N2 output Q. The logic state
of Q is always complementary to that of
Q. Output Q goes high when the bistable
is set, and Q when the bistable is reset. In
the present circuit, only output Q is used.
A logic 0 at pin 8 of N3 causes the bistable
to be set, and output Q to go high. Output
Q is made low again by a logic 0 at pin 6
of N2.

The circuit diagram shows that the bi-
stable is set and reset by the logic low
levels supplied by LED decoder outputs
SO and SI 5 respectively. When SO goes low
(Di lights), it simultaneously causes the
NAND bistable to be set, so that counter
control input U/D is made high. As a re-
sult, the counter starts to count up from
state 0. Similarly, when S15 goes low (LED
Di6 lights), U/D is pulled low, so that the
count direction is reversed.

Inputs A through D of counter IC2 are
jamming-inpuls that enable a preset value
to be loaded when input PE (preset en-
able) is made logic high. Since the counter
is to start at state 0000, all 4 jamming in-

puts have been tied to ground. Compo-
nents C2 and Ri briefly take the PE input
high at power-on, causing the counter to
load '0000' as the preset value.

The CT (carry in/clock enable) of the
counter is made permanently low to en-
able the counter to work continuously.
Counting is halted, and the current output
state is frozen if Cl is taken high. This
option is not required here, however.

Count mode input B/D (binary/de-

cade) of IC2 is connected to +12 V because
binary counting is required.

The clock signal for the counter is pro-
vided by Schmitt-trigger NAND gate Ni
and frequency-determining components
C1-R2. Together, these parts form an oscil-

Construction

The present circuit is probably too com-

Fig. 2. Timing diagram illustrating the operation of counter IC2, Table 1. Relation between the binary input and 1-of-16 decoded
which is composed of four cascaded bistables. output of decoder IC3. Note the ‘walking zero in the output states.

11.48

plex to build on a Universal Prototyping
Board as used for other projects in this
series. The lay-out of a suitable printed-
circuit board is, therefore, given in Fig. 3.

Refer to the Parts List when selecting
the components. First mount the wire
links, then the resistors, capacitors and IC
sockets. The LEDs are fitted last. The in-
troductory photograph illustrates the use
of 16 rectangular LEDs whose terminals
have been bent at right angles. Round
LEDs are, of course, also suitable, and the
constructor is left free to decide on the
most realistic appearance of the electronic
eye. Use a transparent red bezel in front of
the LEDs to improve the visibility.

Although the supply voltage of the
running lights is given as 12 V, the circuit
also works fine when powered from a 9 V
or 5 V source. Some experimenting with
the value of Ri and/or Ci may be re-
quired, however, to obtain the desired
scanning rate at relatively low supply
voltages. Also, as a general rule, make Ri
smaller with low supply voltages to en-
sure sufficient LED brightness.

ELECTRONICS SCENE

World’s first single-chip
teletext decoder

Plessey's new Type MV1815 is
to be the world's first single-chip
teletext dedoder. The device, manu-
factured in the company’s advanced
1.4 micron CMOS process, also in-
corporates a data sheer, dual acquisi-
tion circuitry and RGB display logic.

With the MV 18 15, a complete
teletext system can be built with just
the addition of a single dynamic ran-
dom-access memory (DRAM) chip.
Depending on the size of the mem-
ory, up to 254 pages of text can be
stored for intermediate access by the
viewer. Most currently marketed sys-

tems allow storage of only 4 pages.

The new MV18I5 supports several lan-
' e single chip, and is capable of
packets 0 to 31. All 'Level-1'
teletext functions are incorporated on
chip, plus many ‘Level-2’ features.
The new Plessey device is claimed to
have improved graphics capability
and greater programming flexibility
over competitive products.

11.49

ANALOGUE-TO-DIGITAL
CONVERSION TECHNIQUES

by Julian Nolan

The rapid growth in the digital sector of the electronics market
has given rise to continued demands for more and more
increases in the resolution and conversion speed of
digital-to-analogue and analogue-to-digital converters. In spite
of the industry meeting these demands, the selling price of all types
of device has continued to fall. This is particularly true for
medium speed/resolution flash devices: an 8-bit, 30 MHz type,
for instance, is now available in quantity for well under £20.
Advances in the digital-to-analogue converter field have been
typified by higher specifications rather than lower prices.

Three main analogue-to-digital (a-d) con-
version techniques are in common use:
successive approximation, Hash and inte-
grating conversion.

Successive approximation has the
advantage that for an n-bit converter only
n number of stages are necessary in the
successive approximation register (SAR),
which makes this technique ideal for
applications that require high resolution or
low cost or both. The technique is illus-
trated in Fig. 1 .

Initially, all output bits of the sar are
set to zero and then each bit, starting with
the most significant, is set provisionally to
one. If the output of the converter does not
exceed the input signal voltage, the bit is
left at one. otherwise it is reset to zero.
From this, it is clear that an n-bit converter
will require only n such conversion steps.

This makes this type of converter relative-
ly fast in comparison with those that use
other techniques like single- or dual-slope
integration.

Should the input voltage be altered dur-
ing the conversion process, the resulting
error will be no larger than the change dur-
ing that time. Noise spikes, however, can
cause totally erroneous output and must be
avoided at all costs.

In general, it is advisable to use a sam-
ple-and-hold device in conjunction with
this type of converter.

Typical conversion times range from I ps
to 50 ps, while accuracies of 8-16 bits are
available.

Flash conversion requires 2"- 1 com-
parators. thus limiting the resolution that
can be achieved with this technique.
Current tc fabrication technology permits

uptc

2 bits.

Two typical flash
devices are Analog Devices'
AD770 (8 bits at 200 msps)
and TDC1020 (10 bits at 20

The technology relies
more on ‘force in numbers'
than subtle design techniques
at component level. As
shown in Fig. 2. a reference
voltage is applied to a resis-
tive divider, whose equi-
spaced outputs are applied to
«-l voltage comparators.
The Gray-code output from
the comparators is encoded
by the priority encoder to
form a usable binary output.
Typical conversion rates vary
from 10 msps to 500 msps.

while resolutions of up to 12 bits are cur-
rently available.

Resolutions above 16 bits are generally
the domain of integrating converters.
These offer good linearity and resolutiuon
while maintaining a reasonable cost/per-
formance ratio. Typical applications
include digital voltmeters, data acquisition
systems, weighing and medical systems
where the slow conversion rate inherent in
these converters is not significant. An
example of integrating conversion, dual
slope, is shown in Fig. 3.

Initially, switch Si is closed by the con-
trol logic. Switch S4 is then opened and
the input voltage integrated for n clock
periods, where n is usually the maximum
count of the counter. At the end of this
time, the integrator voltage. Vo, is

V 0 = — Vin/i7c /RC [I]

where Tc is the clock period.

During this period, the polarity of the

input signal is detected by the comparator.
At the end of the integration period. Si is
opened and, depending on the polarity of
Kin, either S2 or S3 is closed to connect the
integrator to the reference voltage that has
a polarity opposite to that of fin. Next, the
counter is clocked from zero until the inte-
grator output reaches 0 V: the output of
the comparator then changes state and the
count is stopped. Since integration takes
place over the voltage range V 0 ,

Vo 4-Vref nx/RC, [2]

where «x is the count reached by the time
the integrator output passes zero.

Combining and rearranging [ 1 ) and [2]
gives

nx = Vm/Vnt [3)

Since n and Wef are both fixed, the out-
put count is directly proportional to the
input voltage. Because both the first and
the second integration occur under identi-
cal circumstances, the converter is not
affected by any long-term variations in 7c,
R or C, as confirmed by the disappearance
of these terms from equation [3].

The major factors affecting the stability
of the converter are:

( 1 ) the stability of Vref;

(2) drift in integrator and comparator
opamps;

(3) the stability of the "on' resistance of
Si and S3.

Other techniques of integrating conver-
sion are available, such as single-slope
integration and charge balancing. These
methods are relatively slow, however, and
their use is restricted to applications that
can support their relatively high conver-

As is seen, none of the three methods
discussed provides both a high resolution
and a high conversion speed. Where these
are required in combination, say, 16 bits at
2 ps, use is made of subranging tech-
niques. which are normally based on a sin-
gle high-speed flash a-d converter as
shown in Fig. 4.

In practice, these types of device are
implemented in hybrid form. Some suffer
from a reduced signal-to-quantization
noise ratio at relatively high input frequen-
cies. although those are not uncommon in
a-D converters.

Initially, the input is sampled by the
track and hold circuit. Subsequently, the
most significant portion of the signal is
converted by feeding the output word into
a fast, highly accurate d-a converter,
whose output is subtracted from the input.
The resulting residue is converted to digi-
tal form at high speed and combined with
the results of the earlier conversion to
form the output word. Owing to the very
high performance this technique demands
from the adder and dac, it is usual to
incorporate some sort of error correction:
a commonly encountered type is digitally
corrected subranging (DCS). In this, the
two bytes are combined in a manner that
corrects the error of the lsb of the most
significant byte. With the use of, for
instance, an 8 and 5 bit conversion, an
accuracte, high-speed 12-bit converter
may be configured, although it should be
noted that the resolution of the d-a con-
verter must be greater than the resolution
required to maintain conversion accuracy.

Future developments

Digital error correction, using a variety of
techniques, from integrating to subrang-
ing, is now being introduced into a wide
range of devices. This trend is likely to
continue and. with the ever decreasing
cost of data conversion products, will
become increasingly relevant to the low-
cost end of the market.

As regards conversion techniques, the
serial converter or cascaded encoder as
shown in Fig. 5 may well make a come
back. First used in the 1960s as a method
of a-d conversion, the serial converter is
based on a number of comparators, each
taking the residue of the previous stage
and comparing it to a reference voltage. If
the input is higher than the reference, a 1
is produced at the output, and the residue
of the original input signal is subtracted

11.51

from the reference and passed on to the
next stage. If the input does not exceed the
reference, the signal is passed to the next
stage unaltered. It is usual to incorporate a
x2 amplifier to enable the use of a single
reference voltage and restrict problems
with noise.

In practice, this system has provided
difficult to implement owing to errors
introduced by the comparators and ampli-
fiers, noise and also poor transfer charac-
teristics in high-speed systems. With the
advent of high-performance analogue
components, however, some manufactur-
ers are reconsidering this technique, since
it offers a unique blend of speed, resolu-
tion, and low component count - at least
in theory.

Design considerations

The effective resolution at a specified
input frequency is usually not quoted in
the manufacturers' data sheets and can
often be well below the stated optimum. A
graph of the SNR/effectivc number of bits
vs the input frequency of an 8 bit,
100 MHz sampling a-d converter with a
bandwidth of 40 MHz from a well-known
manulacturcr is shown in Fig. 6.

It is seen that at an input of 40 MHz
and a sampling rate of 102.4 MHz. the
effective resolution is about 6 bits. That
means that only 64 possible output states
are provided instead of the 256 that would
have been available if the full 8-bit resolu-
tion had been maintained.

For applications that require a specified
resolution to be maintained over the
greater part of the input frequency, it is
well worth considering, in situations that
are not cost critical, over-specifying the ad
converter to meet the requirement.

Although problems are evident in ad
converter applications below 12 bits, most
occur with accuracies of 1 2 bits or more,
or with high-speed systems, where the
problems are accentuated at higher resolu-

If successive approximation is chosen
for the a-d conversion, a samplc-and-hold
stage is essential and this may be a source
of trouble in itself. Increasingly, however,
some manufacturers, such as Datel in their
12-bit. 500 kHz ads- 1 1 1 , are incorporating
a s&h in the a-d converter package.
However, there may be advantages, such
as a reduction in cost or an improved spec-
ification, in using a separate s&H stage.

Three main building blocks are con-
tained in a s&h stage: a capacitor, an ana-
logue switch and a buffer amplifier. Some
require an external hold capacitor, which
must be chosen with great care as regards
its dielectric absorption properties. Teflon
or polystyrene capacitors, whose dielectric
absorption is fairly small, are well suited
to this purpose.

If the sampling system is used as the

front end in an fft system, particular
attention should be paid to the aperture
uncertainty and aperture time. The time
should be chosen so that at the highest fre-
quency the component does not change by
more than one bit in the allotted time. It
should also be noted that the s&h will
always add errors to the a-d converter
owing to effects such as non-linearity of
the s&h off-set.

The use of a sin gle package contain
ing the ad converter and the s&h has the
advantages that some of the problems
mentioned are minimized and noise may
be less of a problem, especially in high-
resolution systems.

Apart from the Datel device already
mentioned, some other single-package
units are the Sipex HS9474 and Analog
Devices AD 1332 (which includes an anti-

aliasing filter).

Whatever technique is used, the ana-
logue input section is vital to the operation
of the converter, and usually includes one
or more references in addition to conver-
sion technique specific components like
comparators and da converters.

In ratiometric conversion, the reference
is usually external and variable. In gener-
al, an on-chip reference usually helps to
minimize noise, but in a number of cases
advantages may be obtained from an
external reference.

It is worth noting that the current-
switching action of the d-a converter, at
the typically fast clock rates used in suc-
cessive approximation converters, may
disturb the output of the analogue signal
source, especially if it is a high-precision
opamp.with a low slew rate. In that case,
buffering will be necessary.

Design techniques

Whereas digital circuits may have noise
margins of a few hundred millivolts, there
is no room whatsoever for noise in ana-
logue circuits. For instance, a 12-bit reso-
lution a-d converter with a full-scale range
of 3 V has a 0.5 lsb corresponding to
0.61 mV.

Power supplies are among the major
sources of noise: the output of switch-
mode types may have a noise level of
more than 100 mV. Although the ability of
an a-d converter to suppress DC supply
changes, such as long-term drift (expres-
sed as the power supply rejection ratio -
psrr), is usually good, hf noise is normal-
ly not suppressed to any great extent.
Wherever possible, the supply voltages for
the analogue section should be provided
by a linear supply and bypasssed direct at
the a-d converter. A multi-layer capacitor
in parallel with a tantalum capacitor pro-
vides a suitable bypass.

To avoid ground loops, it is advanta-
geous to have a "star point’ as close to the
ad converter as possible - see Fig. 7. All
ground lines should be of low impedance,
necessitating wide ground tracks on the
pcb or, preferably, particularly if double-
sided or multi-layer boards are used, a
separate ground plane underneath the ad
converter package. In some cases, shield-
ing the converter package from the top
may be necessary.

Unless the analogue signal is free of
noise, there is little point in taking the pro-
tective measures mentioned. To reduce the
noise, suitable filters and shielded cables
should be used.

Applications

Some of the factors worth considering
when choosing an a-d converter for a par-
ticular application are:

11.53

• type of converter;

• required conversion speed;

• required resolution;

• cost-to-performance ratio;

.• accuracy required;

• interface requirements;

• power requirements;

• physical dimensions.

The applications of a-d converters are
numerous and have increased at almost the
same rate as their performance. Common
applications include, among others, data
acquisition, measurement systems, analyti-
cal and medical systems, and filter control.
A typical application: an a-d convertor-to-
microprocessor interface, here between a
PMI ADC-9012 and a 6502, is shown in
Fig. 8. The circuit is fairly straightforward,
except that the two lsbs are connected to
data bits DB2 and DB3. The ADC-9012, a
10-bit 6 (is converter, makes special provi-
sion for this. A suitable interrupt service

Towards universal skyphones

Inmarsat, the International Maritime
Satellite Organization, has joined forces
with the International Civil Aviation
Organization (icao) to plan and provide
airborne satellite communications for both
airliner crews and their passengers.

Inmarsat, a global satellite operator
with investors from 56 countries, provides
mobile communications world-wide.
Almost 9.000 ships and land transportable
units currently use the the Inmarsat
Standard-A satellite communications sys-
tem for direct-dial telephone, telex, fac-
simile and data communications.
Inmarsat has offered a similar range of
services for aircraft after the first commer-
cial satellite phone call from an aircraft
last February.

icao is the international regulatory
body for civil aviation matters.

The new agreement confirms the capa-
bility of Inmarsat to offer mobile satellite
communications services in support of air
traffic services, airline operations and
administration, and passenger communica-
tions. It also recognizes icao's exclusive
competence to establish international stan-
dards and recommended practices in aero-
nautical communications.

New computer speeds up overseas mail

A new computer system, the Tatom
(Tracking and Tracing of Overseas Mail),
has been taken into use by the British Post
Office.

Tatom gives information about flight
schedules and cargo space, matches the

1 1 .54 oleklor India novamber 1983

routine flow diagram is shown in Fig. 9.

Peak detection is one field of applica-
tions not usually associated with a-d con-
verters, but it has become feasible with
Ferranti's 8-bit converter Type ZN425E,
which has an 8-bit counter on board.

The circuit diagram of a basic imple-
mentation of this is shown in Fig. 10 -
note that only a small number of external
components is required. The comparator
enables pulses from the trigger circuit to
be clocked by the internal counter and this
produces a ramp output until it attains the
level of the analogue input. Although
rather inaccurate in this particular config-
uration, the circuit can be readily modified
by the use of higher resolution a-d con-

The AD7820 is a 1.36 ps, 8-bit micro-
processor compatible a-d converter that
has the advantage of not requiring user
trims. The circuit shown in Fig. 1 1 enables
a 9-bit resolution to be obtained by the use

demand with available space, determines
the fastest routes, and tracks every mail-
bag with a bar code label.

Since this is the way all major Euro-
pean countries want to go, the Post Office
expects that eventually there will be a total
link-up of all the computers of all the post
offices. Already, talks are underway
between the world’s major post offices to
use the system to privide full control of
mail movements world- wide.

Old recordings as good as new

The bumps, scratches and hiss on early
recordings can now be eradicated entirely
by a new process developed by musicians
and computer experts at Cambridge Sound
Restoration.

Cedar (Computerized Enhanced Digital
Audio Restoration) can be applied to any
material used for recordings, such as wax,
vinyl or film, by digitizing the original
sound, removing the extraneous noise
aand giving the listener the exact unmuf-
fled performance.

Cedar's first success was with a 1953
performance of Gustav Holst's Plane t
Suite by the London Philharmonic
Orchestra conducted by Sir Adrian Boult.
The recording was marred by hisses,
cracks and thumps and something like a
potato fryer sizzling away in the
background. The restored disc is clear and
noise-free, sounding as pristine as when it
was first made.

of two of these devices: full microproces-
sor interfacing is provided. Usually, this
type of circuit is of limited application,
because of its significantly increased chip
count and cost if increases in resolution of
more than a few bits are required.
Nevertheless, this type of configuration is
still worth considering in applications
where either the cost or availability of a
more conventional single-package solu-
tion would prove prohibitive.

References

Data Conversion Products Handbook -
Analog Devices, 1988.

Data Converters and Reference ICs -
Ferranti Semiconductors, 1986.

Data Conversion Handbook - PMI, 1 988;
Datel, 1988; Sipex 1988.

All other known noise-eradicating pro-
cesses use some kind of filtering that auto-
matically affects the sound signal as well
as the offending hiss and scratches, but
Cedar gives the true performance.

Cedar was invented by Cambridge
Sound Restoration (csr) and is closely tied
to the British Library's National Sound
Archive.

At the request of the National Sound
Archive, Dr Peter Raynor, whose research
work at Cambridge University is the basis
of Cedar, used a computer to distinguish
between signal and noise on a recording.
He then developed a set of algorithms to
separate the noise without affecting the
signal. Where the signal itself was flawed,
he perfected an interpolation algorithm.
This enables the computer to analyse the
signal on either side of the flaw and calcu-
late the most likely waveform to fill the
gap. The result is that even records that
have been broken can be glued together
and treated by the process, providing the
break is clean.

Because each piece of music or speech
recording is different, a diverse set of
problems is presented each time, which
means that Cedar is being refined con-
stantly. The most striking advance since
the company's formation last February is
the speed of the process. Initially, it took
about 24 hours to process a few minutes of
recording. Now it takes only slightly
longer than the recording itself.

There are enough old recordings to
keep csr busy for a long time. The Natio-
nal Archive alone has more than one mil-
lion items, while the BBC and record com-
panies have virtually every recording since
the gramophone was invented in 1 877.

Few things can so hold the attention of the
serious audiophile as do loudspeakers. This
applies with particular strength to those whose
fingers always have the experimenter's itch - so
that they cannot or will not without reserve
accept somebody else's idea of a loudspeaker
system. This can lead to the expenditure of
considerable sums, if only on wooden panels,
and it will sometimes also lead to frayed tempers
at home . . .

One of the ways of sinking cash into an existing
system is to replace the 'passive' separating
('crossover') filters by 'active' types. This of
course involves the provision of a separate power
amplifier for every driver in the system.

This article on Active Crossover Filters (ACF's)
will describe a universal filter circuit, capable of
producing a vast number of filter characteristics.

High-quality loudspeaker systems are
invariably designed on the basis of
‘divide and rule’ principles. The
incoming audio spectrum is split up into
two, three or even four sub-spectra,
each of which is then passed to a loud-
speaker specially designed for that
particular frequency range. The change-
over from one loudspeaker to the next
higher in frequency range is ac-
complished by a complementary
filter-pair whose roll-off response-flanks
‘cross over’ each other at a point some
decibels below the ‘full power’ level.
The filter-pairs are therefore called -
‘crossover filters ’.

A loudspeaker system that uses such
filters is usually called a 'multiway’
system.

When the filter sections are inserted
between the single power amplifier and
the individual ‘drivers’ (i.e. loudspeakers

proper), the system is said to have a
passive filter. Figure 1 illustrates a
typical three-way system. The low-to-
midrange crossover frequency is f, and
the midrange-to-high crossover occurs at
f 3 . The representatives of the animal
kingdom shown have had their typical
calls ‘borrowed’ to provide a classifi-
cation of the drivers into the categories
low-range (woofer) midrange (squawker)
and high-range (tweeter).

The big idea behind the multiway
approach is the fact that an optimally-
designed ‘woofer’ is - for basic design
reasons — a sub-optimal loudspeaker at
higher frequencies. This does not mean
that a ‘new’ design method may not
someday produce a first-class full-range
driver; it simply hasn’t been done yet.
The problems to be faced are quite
formidable — and a computer is only
useful to quickly do the sums that a

human being already knows how to do.
A multiway system is necessarily more
complicated and more expensive to
produce than a single-driver system.
That is a clear disadvantage. There is
however a second objection to the
multiway approach - a more funda-
mental objection: how does one tackle
the fact that frequencies near the
crossover point are radiated by both
drivers? The two radiating diaphragms
cannot be at the same position in space
- although they often can be spaced
quite closely - so that ‘interferences’
between the two radiated waves can
cause irregularities in the response
characteristics and in the radiation
pattern of the system.

‘Dividing’ is one thing; ‘ruling’ is quite
another . . .

Most of the interference effects can be
avoided when the two frequency-
adjacent drivers are mounted concentri-
cally — one within the other. This is
usually no problem, since an optimal
tweeter can be made smaller than a
woofer. The past has known designs
many of them still very popular - in
which a tweeter of one kind or another
has been built into a woofer (or, more
accurately, a woofer-midrange) cone-
loudspeaker. The crossover can be
mechanical in nature (as in the ‘good
old’ Philips 9710M), or a more advanced
twin-driver-plus-electrical-crossover sys-
tem can be employed (as in the famous
Tannoy Monitor Gold and certain
Goodmans and Isophon units).

Passive or active?

Having decided that a good loudspeaker
system, at the present state of the art, is
going to need at least one crossover
filter, we have to decide whether this
filter should be a ‘passive’ or ‘active’
design. (For our purposes, an ‘active’
filters is one in which the inductors have
been eliminated by the application of
capacitors and amplifiers).

Figure la illustrates a typical passive-
filter three-way system. The passive
filter is built up with inductors,
capacitors and any matching networks
that may be necessary (e.g. to reduce
the drive to a too-sensitive tweeter).
Figure 1 b illustrates the bare bones of a
three-way passive filter.

One difficulty is immediately apparent.
The woofer section requires an inductor
in series with the driver voice-coil. The
considerable inductance involved means
that there will be power loss in the
copper-resistance of a many-turn air-
cored coil, or else that there will be
distortion due to the non-linearity of a
low-loss coil that has a ferromagnetic
core. Neither of these effects should
however be viewed out of proportion:
the often-cited effect of the series-
resistance on the woofer’s electrical
damping is completely swamped by the
effect that the voice-coil resistance has
— and one can design iron-core inductors
with a level of distortion that is
insignificant compared to that of the
actual driver.

la

r 't-

-H

- ~

fk*\

Another source of difficulties is more
awkward to eliminate. Normal electrical
wave-filters assume a pure-resistance
load-termination. When you connect a
loudspeaker to such a filter the final
characteristic may not be quite what
you intended — it may even be wildly
off. The trick of connecting an RC
network across the speaker terminals to
compensate the high-frequency rise in
impedance (due to the coil's inductance)
certainly works and should be better
known; but the fun really begins when
the speaker impedance contains signifi-
cant components ‘reflected’ from the
mechanical ‘circuit’. That usually
happens in the neighbourhood of the
driver’s fundamental resonance; it can

"lb

Ihr II 1

-{d % s «»

TT^--
+■ 4^-

of midrange and tweeter units that have
a resonance (as is usual) at or just below
their high-pass crossover frequency.

Now, a well-designed commercial
‘passive filter system’ will invariably
work very well — but that success is due
to a combination of design experience
and available facilities beyond the reach
of the ‘do it yourself audiophile.
Although it would be possible to say a
great deal more about passive filter
arrangements and matching networks,
this article is supposed to be about
active arrangements. Having implied,
above, that the amateur is better off
tackling his problem with an active
system, we must now try to explain
how.

Active Crossover Filters

1c

Q

a

a

Figure 1 c shows the block diagram of a
three-way active (‘electronic’) crossover
filter. It is immediately clear that each
of the loudspeakers requires its own
power amplifier. This need not be so
expensive as one might think, since the
total power required (and hence the
amount of mains transformer, reservoir
capacitor and heat sink) is not increased
by subdividing the amplifier. As a rule,
the woofer will need the most powerful
amplifier (perhaps 50 ... 70% of the
total), with the midrange unit handling
perhaps two-thirds of the remainder.
Much will obviously depend on the
individual drivers used. When drivers are
obtainable with varying rated im-
pedances, the power distribution over
the output stages can be achieved by
using a single supply voltage together
with a low-impedance woofer (say

Id

Figure 1b. As an example: the KEF type
DN 12 SP 1004 three-way passive filter.

Figure 1c. Block diagram of an active-filter

1 Figure Id. An active-filter two-way system.

impedance (say 8 ohm) and a tweeter of
still higher impedance ( 1 5 ohm).

A major advantage of the active-filter
approach is the ease with which sensi-
tivity differences between the drivers
can be eliminated. In figure lc this is
accomplished by adjustment of the
presets PI , P2 and P3. Figure Id gives a
simpler two-way circuit, suitable for use
with smaller diameter woofers that are
also well-behaved throughout the mid-
frequency range. Still another possibility
is shown in figure le, a ‘hybrid’ three-
way system. In this case the woofer to
midrange crossover is done with an
active filter and two power amplifiers;
the frequency ranges for the midrange
and tweeter drivers are however
separated by a passive filter set.

What are the other advantages of the
active filter approach?

- the design is far more flexible; a
change of crossover frequency or
drive level can be quickly and
conveniently achieved by changing
one or two R’s and C’s or adjusting a
preset potentiometer.

- there is no complication in the filter
design caused by the awkward
termination (the loudspeaker
impedance).

- it is relatively simple to produce
complicated filter characteristics
whenever this is thought desirable or
necessary.

- since the power amplifiers will usually
be installed in the loudspeaker cabi-
net, the individual drivers can be pro-
tected from overload by suitable
choice of the power rating of the
amplifier concerned.

The filter circuits

Figure If shows a set of filter charac-
teristics, as would be required for a
three-way system. The frequencies fl
and f2 are the ‘-3 dB’ points, at which
the response curves of a complementary
filter-pair actually ‘cross over’ each
other. Half of the power at a crossover
frequency is transmitted through each
filter of the pair. For a three-way
system fi will frequently lie between
300 and 600 Hz (sometimes as low as
1 00 Hz, or as high as 800 Hz). The
other crossover will then usually be
found between 2 kHz and 8 kHz —
typically near to 5 kHz. The single
crossover in a two-way system is usually
between 1 kHz and 3 kHz (typically
around 2 kHz).

The slope of the various filters well into
their respective ‘stop-bands’ is a
multiple of 6 dB/octave (i.e.
20 dB/decade). The figure 1 f curves are
drawn for 12 dB/octave (1,4, 5 ,8) and
for 18 dB/octave (2, 3 ,6, 7). If we assume
that either slope may be used for each
of the four filters, then there are sixteen
possibilities for a three-way filter. It is
not always desirable to make the filters
of a crossover-pair with the same slope

- a so-called asymmetrical crossover
may be needed when the response of
one of the loudspeakers is not flat
through the crossover point. Table 1
lists the possibilities.

11.57

The last four alternatives apply to two-
way systems. We will refer in this article
to the single crossover as fi .

An electric wave-filter is characterised
not only by the ‘ultimate slope’ of the
rolloff curve, well into the ‘stop band’
but also by the ‘sharpness of transition’
between the pass-band and the stop-
band. A number of Famous Names are
associated with a classification of filters
into categories with increasing sharpness
(once again: note the distinction
between sharpness and steepness).
Almost all loudspeaker crossover filters
are of the Butterworth ‘maximally flat
amplitude’ type. We will therefore
illustrate the workings of the practical
circuits by Butterworth responses.
When the ‘pass-band’ is defined as the
frequency range up to the -3 dB point
(low-pass) or from the —3 dB point up-
wards (high-pass), then Butterworth
gives the lowest possible ‘pass-band
attenuation’ that can be obtained with-
out allowing ‘ripples’.

The figures 2, 3 and 4 give the design
information for Butterworth low-pass
filters (‘a’ figures) and Butterworth
high-pass filters (‘b’ figures), for
ultimate slopes of 18 dB/octave
(figure 2), 12 dB/octave (figure 3) and
6 dB/octave (figure 4). The two sets of
component numbers refer to the two
different crossovers. We will come back
to this when referring to the parts list.
The active element in the circuits of
figures 2, 3 and 4 is a voltage follower.
The best known AC voltage follower is
the so-called ‘emitter follower’. Since
a voltage gain of unity can only be
closely approximated by an amplifier
with extremely high current gain, the
total circuit diagram of figure 5 shows
‘super emitter followers’ using two
transistors each. The derivation of the
component values always assumes the
use of an ideal voltage follower; any
attempt to ‘make allowances’ is fraught
with great uncertainties - and the
assumption that a one-transistor
follower is ideal is just too optimistic!
This is not the place to go into the

Figure 3. Circuit diagram
Butterworth low-pass (a)
12 dB/octave filter.

details of the derivation of design available. Note that the idea was to find three-way systems is not inevitably one
formulae. something to play with! of cost, with three-way always better if

One practical consequence of the There is one fundamental guideline, you can afford it. On the contrary,

derivations must however be noted here. however, loudspeaker are meant to be some of the best-sounding systems

That is the fact that it is not always used for listening to music, not the around use a woofer-midrange unit plus

possible to design filters in which all the other way round. If it sounds right, then a tweeter. These woofer-midrange units

frequency-determining R’s and C’s have never mind what it looks like on paper. do however tend to need rather more

convenient values. We have chosen Assuming that one’s musical taste is than a simple closed-cabinet if they are

circuits with either three equal C’s reasonable, any discrepancy between to do a really good job at the deep-bass

(high pass) or three equal R’s (low-pass), the theory and the actual result will end.

the other components hopefully coming usually be due to an oversight or The frequencies and ultimate slopes of

fairly close to standard El 2 values. incompleteness in the theory. the crossover filters can be taken, at

Filters with low ‘Q’ values (such as It will simplify this story if we introduce least as a starting point, from the

Butterworth) will, fortunately, not two further ‘boundary conditions’. Let parameters of the passive filter

immediately go haywire when some of us assume that (1) we arc going to do recommended by the speaker manufac-

the components are a few percent out. the job properly - no skimping on turer. If one is combining speakers from

That is not to say that a fusspot with parts - and (2) that the reader already various sources, then some experiment

access to 1% R’s and C’s should not knows how to design his enclosure. may be necessary (great fun!). There are

indulge a craving for 'precision' .. . The question that should be tackled one or two guidelines here, more ‘don’ts’

So much for the general aspects of first is the choice of the loudspeaker to than ‘do’s’. In the first place, beware of

active crossover filter design. It is now be used. This usually will involve a dig the ‘power handling capacity’ ratings of

time to try working out a specification. into the manufacturer’s literature - or tweeters. It is in the nature of things

One way to tackle this problem is to use at least a good look into a distributor's that their smaller coil systems cannot

a check-list. catalogue. Unless one knows precisely handle the massive amounts of input

- Active filters only (figure lcor Id) or what one wants, it is a good idea to power that will not damage woofers,

hybrid (le)? select a combination recommended by The temptation to suppliers is to quote

- Three-way or two-way? the manufacturer, replacing only the a high power rating for a tweeter in

- Which speakers? inevitable passive filter by circuits combination with a specified high-pass

- How steep the filters? covered in this article. Information on filter. The ‘power density’ of normal

- Which amplifiers? how to construct special woofer music spectra certainly becomes

Do not try to find complete ‘paper’ enclosures, such as folded horns or significantly lower as the frequency

answers to these questions. A great ‘transmission line’ types, can often be increases; but this no longer applies

deal will depend on one’s individual found in the literature. when the amplifier is driven into

taste and on whatever happens to be The basic choice between two-way and distortion (accidentally or on purpose).

11.59

Table 1.

The different possible combinatio

ns of symmetrica

or asym-

metrical crossovers and 1 2 or 18 dB/octave slopes

filters slopes at

filters slopes at

f, to be

f, tc

be

combine from

rpfpr m

i >*<r

W

figure If

figures

18

12

18

18

2,4,6 & 7

18

12

12

12

2,4, 5 & 8

18

12

18

12

2.4,6 & 8

18

12

12

18

2, 4, 5 & 7

12

18

18

18

1 , 3, 6 & 7

12

18

12

12

1,3, 5& 8

12

18

18

12

1,3, 6 & 8

12

18

12

18

1,3, 5 & 7

18

18

18

18

2, 3, 6 & 7

5 & 6*

18

18

12

12

2,3, 5& 8

18

18

18

12

2, 3, 6&8

18

18

12

18

2,3, 5 & 7

12

12

18

18

1 , 4, 6 & 7

12

12

12

12

1,4, 5& 8

7* & 8*

1.2

12

18

12

1.4.6& 8

12

12

12

18

1,4, 5& 7

18

18

-

2 & 3

9*&1 0"

12

12

-

1 & 4

1-&12*

12

18

-

1 & 3

18

12

2 & 4

* Note: figures

6 to

2 will be given in part 2.

Figure 5. Complete
18 dB/octave cross

Put another way: (1) the high-pass filter
associated with a certain tweeter will
invariably have a ‘protection’ function
as well as its effect on the response and
(2) don’t try to get a quart out of a pint

The other guideline worth mentioning
concerns the fact that a given loud-
speaker invariably will have a frequency
response extending far higher than the
recommended crossover low pass cutoff.
The response in the non-recommended
range is however usually ragged or
‘peaky’ due to the cone (or other
diaphragm) ‘breaking up’ into patterns
of flexural resonance. This effect will
impair the transient response. When a
high-pass rolloff is recommended, quite
apart from the input power consideration
given above, there may be a mechanical
limitation on the obtainable sound
output in the non-recommended range.
This would apply in particular to dome-
type tweeters and squawkers.

The filter slope of 6 dB per octave is
rarely used, although there is consider-
able evidence that a slow woofer-
midrange rolloff combined with a
steeper tweeter slope can give excellent
results. It is included here for
completeness sake, since ‘asymmetrical’
crossover filter design really requires
access to acoustical measurement
facilities.

The amplifiers

We come now to one of the great
sources of endless discussion. How may
watts need one provide for each loud-
speaker? There are many ways of
looking at this question, depending on
the kind of music you have in mind for
instance, or depending on which ‘trade-
off you prefer.

We have already noted that the
(continuous) dissipation of which a
typical tweeter is capable will be less
than that of a mid-range and significantly
less than that of a woofer. That is
simply a question of the physical size of
the respective ‘motors’. It would seem
obvious that the continuous-power
ratings of the associated amplifiers
should reflect this fact. All one can
hope to achieve with some ‘reserve
watts’ is an increased risk of sometime
needing a ‘reserve speaker’. There is a
bit more to it than this; but let us break
off at this point.

Every loudspeaker has a certain
‘instantaneous’ power rating, referring
to how much driving force it will handle
(quite apart from the dissipation
involved) before some moving part hits
an end-stop. Since, at a given sound
level, the diaphragm amplitude will be
greatest at low frequency, the actual
useful instantaneous rating will depend

on the choice of (high-pass) crossover
frequency. This seems to indicate that
the amplifier’s 'music power’ rating,
together with the choice of crossover
frequency, should be matched to the
(higher) instantaneous rating of the
individual speaker. This applies literally
to the midrange and to the tweeter; for
the woofer something similar applies -
but now with the ‘box’ design setting
the high-pass cutoff frequency.

Having taken a look at the limiting
amounts of power that an amplifier
should not be able to exceed , we still
have no answer to the real question:
how much do we need? The answer is,
for normal domestic listening, ‘surpris-
ingly little'. Simply read off from the
manufacturer’s literature low much
input will produce about 96 dB SPL
(‘sound pressure level) at 1 metre from
the loudspeaker (usually specified for
free-field-room measurement). It will
usually prove that 10 or 20 Watts
already offers a very comfortable safety
margin !

So much for the design considerations.
Next month we will give circuits and
printed circuit boards for 6-, 12- and
18 dB/octave filters for use in both 2-
and 3- way systems. M

sound effects

generator

sound effects for
the T.V. games computer

Most T.V. games systems commercially
produced allow the user to actually
hear what is happening on the screen.
When you shoot down a space invader,
then an expl'osion or whatever is
heard. It certainly adds to the overall
enjoyment of the game. With the
following circuit the Elektor T.V.
games computer can now give you the
extra audio effects needed to add that
further touch of realism to a game.

The left-hand side of the circuit shows
all the connections to be made to the
main printed circuit board of the
games computer. After the flip-flops
contained in IC1 come the data-lines
D2 . . . 07. Data is switched from the
input to the output on every negative
going edge of the clock pulse. IC1 is
enable when input B is addressed by
line 1 E80. The effects produced really
depend on the rest of the programmed
data in the computer. The basis of the
sound generation is transistor T4,

which is connected as a noise source.
A1 and A2 amplify this signal up to a
usable level, making it available at the
output of A2.

A3 creates the explosion effect. With
a logic 1 on the data line D4, A3
releases the noise signal suddenly!

With a logic 0 on D4 the signal decays
gradually with the speed of decay
being determined by the rate C6 dis-
charges across R17. A simple low-pass
filter (R21, C7), feeds the signal to the
programmable amplifier A4. The gain
of A4 depends on the data present on
lines D6 . . . D7. The amplification
changes in steps of. 1 x, 1 54x, 3x and
4x, the highest occuring when data
00 is present.

The audio output volume is controlled
by PI . Finally an output power
amplifier (IC3) completes the circuit.
Points X and Y are connected to the
outputs of the two programmable
sound generators (PSGs) of the

Table 1

0900 7620

0902 0C1E89

0905 9A7b

0907 04FF

0909 CC1FC7

090C 0410

090E CC1E80

0911 12

0912 9A7D

0914 20

0915 C8F8 (1E80)

0917 09EA (1E89I

0919 1A7C

091B C8EO (1FC7I

0910 1B63

extended games computer. The PSGs
together with this circuit should give
you all the sound combinations ever
needed. With a games computer which
has not been extended and therefore
does not have the two PSGs. either X
or Y-must be connected to pin 22 of
the programmable video interface

11.61

a 7812 regulator, as shown in figure 2.
The unit consumes approximately
1 5 mA from the +5 V supply, whereas
the +12 V supply must be capable of
delivering about 1 50 mA, with the
volume control fully up.

A change-over switch can be incorpor-
ated, to allow the effects to be .

connected and fed to one side of the
switch via a 100 n capacitor. The
details are shown in figure 2a.

Figure 2b shows the function of the
different 'bits'. The table illustrates a
demonstration program. Depressing
'WCAS' will produce the explosion
effect. When the sound generator is
switched off, depressing the same cod
will result in a loud hum being

NEW PRODUCTS

Digital Timer

TEMPO RA 4004 is a digital timer cover-
ing timing ranges from 9.999 seconds to
9999 minutes. It has an absolute accu-
racy of 0.01% and a repeat accuracy of
0.01%. It has a quartz crystal time base
and is unaffected by variations in mains
voltage and frequency. Tempora 4004 is
available in the ranges 9.999, 99.99 sec-
onds and 999.9 , 9999 seconds or mi-
nutes. The required time is set on 4-digit
thumbwheel switches. The elapsed time
is displayed on a 4-digit, 7-segment red
LED display.

The timing is initiated upon application
of power to the instrument. After the set
time is over, the relay output is operated,
and the display remains static at the set
value. The relay contact rating is 6 A/230
VAC, resistive. A pushbutton micros-
witch is provided for manual reset. This
can be used to abort a timing cycle and
start another. The timer is also available
in 2-and 3-digit versions and can be con-
fingured for Delayed-On or Delayed-
Off operation.

M/s. Radix Microsystems • 201,
Bonanza Industrial Estate • Kandivali
(E) • Bombay-400 101 • Tel: 699589/
6267664

Tank Volume Computer

WAHL Instruments Inc. of USA have
developed a 30 tank volume computer
system for horizontal cylindrical or
spherical tanks. The Wahl Data Force
Computer Model DF 104-30C contains a
complex non-linear equation which cal-
culates in real-time the volume from a
float height sensor to an accuracy of
0.1%. Thirty tanks are updated every

1 1 .64 elektor India november 1989

second and the output along with alarms
is available via an Rs-232C port for prin-
ters or video terminal display. Tempera-
ture and density correction can also be
applied to each tank with readout in de-
sired engineering units of gallons,
pounds or cubic feet. All 30 tanks can be
summed if desired. Applications include
acid, solvent, chemical, wine, fuel oil,
mix water, grain and liquified gas storage
tanks or silos where the user needs a con-
stant update on volume.

M/s. Jost’s Engineering Company Li-
mited • 60, Sir Phirozeshah Mehta Road
• Bombay 400 001. • Phone No.:
2861150.

Welder

Benchtop 2200J fusion welder creates in-
stantaneous welds between small diame-
ter nibbed findings and base parts. Weld
occurs in less than 1 ms. resulting in no
heat buil-up, annealing, burning of met-
als, or distortion.

The 2200J bonds all weldable alloy find-
,ngs with a diameter between 0.015”
(0.38 mm) up to about 0. 187" (4.75 mm).
Applications include welding of ear wire
posts, joints and catches to all types of
settings, emblems, and buckles. The
2200J productively replaces many appli-
cations of silver brazing and soldering.

I & J Fisnar Inc • 2-07 Banta Place • Fair
Lawn • Nj 07410 • USA.

Digital Power Disturbance Re-
cording Instruments.

The Premier Series 2000 digital recor-
ders for power disturbance recordings
have applications in power generating
stations, large industrial undertakings,
power distribution systems and load de-
spatch centres of State electricity boards.
These recorders have a built-in quartz
crystal controlled clock with display of
parameters such-as frequency, voltage,
current, Mw or mVAr. The upper and
lowest alarm limits are adjustable
through thumbwheel switches. In the
normal conditions, an 18 column digital
printer records time and parameter
every 5 to 15 minutes in black colour ink.
In case the parameter crossess the pre-
adjusted upper or lower limits, the glow-
ing lamp lidicates the alarm conditions.
The printer starts printing in red colour
ink every 5 or 0.5 second. A memory fea-
ture further records 80 seconds pre-and
post-disturbance readings. These recor-
ders are available in table models with
desk-top printer and in panel mount
models with front printer.

M/s. Premier Electronics Pvt. Ltd. •
Yogeshwar Math Marg • Tikait Rai
Talab • Lucknow-226 004 *Tcl: 83984 •

R. N. No. 39881/83

Allowed

without prepayment. LIC No. 91

MH BY WEST-228
LIC No. 91

i."*

»D7"

WE MAKE
PERFORMANCE
OP-AMPS
AFFORDABLE

ANALOG SALES (INDIA) PVT. LTD.

Pun* ( REQD Of F) : 1 *9d - A Plot No 5 Krishna. Aundh, Pun* 4 1 1 007. PK 53880 TLX I *5-470 '
N. Oolhl (BR OFF) C-197 Sarvodaya Enclave. Naw Doth) 110 017. PK 68624*0 TLX 031-73228
Bangalore (BR OFF) 992 13th Main Rd, mdaanagar. Bangalore 560038 Ph 560506 TLX 8*5-8!

PRECISION

The AD 707 features the best
d.c. accuracy specification
available In a non chopper
stabilized design. It features
a maximum Input offset
voltage of 15 nV (C Grade) 8
input offset voltage drift of
0.1 nV/°C (C Grade)

The AD 548/648 features ultra
low Input bias curreryt-down
to 10 p A.

The AD 707/548/648 are
available in the plastic MlNi-
DIP. CERDIP 6 T0-99 metal
can. The AD 707 Is also
available in an 8 pin plastic
small outline (SO) package.

$1.37 $0.82 $1.37

SPEED

The AD 744 IS fast settling
8IFET op-amp. It can settle
to 0.01% (for 10V step) in 500
nsec.OC grade) and to 0.0025%
(for iov step) in 1.5 p,sec (k
grade), it also has a slew rate
of 75 V/psec.

The ad 711/712 combines
good speed and bias current
specifications.

The AD 744/711/712 are
available In the plastic mini-
DIP. CERDIP, and T0-99 metal
can.

AD744JN AD711JN AO >11 in

7SV/|l S JOV/iJ J0V/V4

S2.47S0.88S1.37

ANALOG

DEVICES

SJ AS 8848