» TANDON: THE HEAD DRIVE BEHIND COMPUTER WORLD » COMPUTER CAUSES A SEACHANGE/ IN CUSTOM HOUSE / » CENTRONICS BUFFER / | VHFAJHF WIDE BAND AMPLIFIERS / > RECORDING PLAYBACK AMPLIFIER / » BATTERY LOW' INDICATOR 1 4.05 Front cover The ghostly figure, known as the Head and Torso Simulator (HATS), seen here be- ing fitted with a tele- phone handset by technician Helen Christian, is used in tests at British Telecom's Research laboratories to measure sound pressure. The tests take place in an anechoic chamber. An artificial ear on the simulator holds a miniature microphone to monitor the loudness and fre- quency response of the telephone. BUDGET INDICATES NEGATIVE THINKING Electronics industry in the country has little to cheer about In the latest budgetary proposals of the Union government. The ethos of modernisation and an all out support to computerisation, coupled with liberal policies which marked the scene a couple of years ago has now disappeared. Contrary to the otf-proclaimed goal of bringing down the prices of television sets, an increase on excise duty on the picture tubes adds to the cost. That people having too much of an ■entertainment’ would not mind paying a little more is at best a cruel joke. What if the 5 per cent hike in excise duty on computers had not been proposed, one may ask. Can't the government find that couple of crores of rupees from elsewhere, ask another. What if the duties were reduced further to promote the market, queries a third person. The answer appears to be that the government's thinking has undergone a change. The electronics industry in general and the computer industry In particular do not seem to find the pride of place as they used to be in the past. Industry sources rightly observe this trend as "negative" in nature. However, it is reassuring to hear from the industry that despite these new imposts and consequent marginal hike In prices of end products the market for television sets and computerss may not fall. Added to the fiscal problems is the lack of a definite direction In which the Industry Is to go. The lukeworm attitude of the government towards matters electronics has left the industry in chaotic condition with no clear set goals. It Is high time the government machinery woke up to the need for strengthening itself to evolve suitable policies and perspectives. POWER LINE MODEM The NE5050 from Philips Components has been designed for sending and receiving data over the AC mains network, coaxial cables or twisted-pair cables. The modem described here is a mains-based application of the NE5050. It works in conjunction with an error-correcting computer program for exchanging data or remote control of equipment. by J. Bareford A modem (acronym for MOdu- lator/DEModulator) is almost in- variably used where the distance between computers, or a computer and peripheral equipment, exceeds the capabilities of the well-known RS-232 interface with associated cables. In prac- tice, this means that some sort of modem is necessary when the data rate and distance exceed 1200 baud and about 30 metres respectively. In most cases, the modem is located physically close to the computer or peripheral (sometimes it is internal to it). Modems generally use frequency-shift-keying (FSK) of a carrier to convert the logic levels received from the computer's RS- 232 outlet into tones that can be carried over, say, the telephone network. In re- ceive mode, the tones from the modem at the other end of the line are demodulated and converted to RS-232 levels for sending to the computer. The present modem does not use FSK, but ASK (amplitude shift keying) for reasons discussed below. Similar to cer- tain types of intercom, the NE5050- based modem is connected to the remote station via the mains network. Background to amplitude shift keying The mains network is by no means ideal for data communication. Impulse noise, voltage dips, line impedance modulation and high-frequency signals are but a few of the sources of interference to be taken into account. Improperly decoupled fluorescent tubes, dimmers, refrigerators and washing machines are notorious for the high levels of ‘mains pollution’ they cause. Clearly, the design of a practical mains modem should anticipate high levels of interference and possible corruption of data owing to the above appliances. In radio technology, it has been known for almost 100 years that CW (con- tinuous wave or modulation type Al), or simply switching the transmitter on and off, is the simplest,, yet most interference-resistent, modulation method available. Figure 1 shows how CW is used by the present modem — a 120 kHz carrier is generated and digital input data determines when the carrier is to be superimposed on to the mains lines. Collision, or more precisely summ- ing of data, however, occurs when two modems connected to the network transmit simultaneously. Thanks to the use of ASK, this only leads to distortion of data, not to overloading of the modem input. By setting up an error- detecting data exchange protocol in the computer, messages between modems can be repeated until they are correctly received. The use of a communications program on the computer for combat- ting data collision and interference simplifies the modem hardware con- siderably, and at the same time makes it virtually computer-independent. An integrated modem Apart from the electrical connection and the component values, the circuit diagram of Fig. 2 shows the internal structure of the central part, the NE5050 in position ICi. The transmitter in the modem chip is composed of a carrier oscillator, a TTL buffer/input amplifier, and a line driver that also functions as the amplitude- modulator. External components Cs, Cio and L3 tune the oscillator to 120 kHz. Capacitor Ch does not form part of the tuned circuit, but serves to decouple the internally generated supply voltage of '/iUb which is used for bias- ing the oscillator. The generated carrier is applied to the line driver in which am- plitude modulation takes place. The car- rier is modulated by the data signal ap- plied to pin 19 of the chip. Together with Ti, T’, R7, R« and R«, the driver forms a class-AB output stage that gives the ASK signal enough power to be superimposed on to the mains lines. For reasons of safety, this is done with the aid of a double-insulated line transformer with a turns ratio Lia:Lib:Lic= 1:4:1. A number of components with specific functions are arranged around this transformer. C12 and Rio ensure a sufficiently high termination impedance for the line driver. Ci suppresses the mains fre- quency (50 or 60 Hz), and Di and D2 have the double function of transient suppressor and limiter for the received 120 kHz signal. Under no conditions should the indicated diodes be replaced by common zener diodes which these are far too slow in this application, and, therefore, unable to protect the mains modem chip from damage by voltage surges. The input of the modem, pin 20, nor- mally receives not only the signals from Fig. 3. Simple extension of the modem in- terface to enable connection to an RS-232 Fig. 4 . Prinled-circtiil board for (he mains modem. other modems, but also its own trans- mitted signal. In the present application, the receiver is, however, disabled while the modem is in transmit mode. This is achieved by having the transmit input drive Ti. When this is turned on, it pulls the comparator output, pin 10, low, so that the bistable can not change state. When the data input line is low, no carrier is transmitted. The received signal is first applied to an amplifier provided with a band-pass characteristic. The high-frequency roll- off point is internally set to 300 kHz. Dimensioning C-i allows defining the lower roll-off point in accordance wit the carrier frequency used. To ensure selec- tivity at the carrier frequency, a band- filter, L2-C5, is inserted between the in- put amplifier and the detector. C+ and Resistors ( ± 5%l: Ri;R2 = 5K6 R3;Ri3=1M0 Ri = 10M Rb = 220K Re=10K R7;R9=1R0 Ra;Ri2 = 22K Rio=10R RH-47K Ru-IKO Capacitors: Ci =470n; 630 V C2 = 6n8 C3;C7;Cn ■ lOOn C4;CB;Ca;Cl0-4n7 Cs = 10n C9*27p Cl2=1p0 Ci3= lOOOp: 40 V; radial Ct4= IpO; 16 V: radial Semiconductors: Di;D2 = BZT03C15 + (Philips Components) D3= 5V6; 400 mW zener diode D4...D7 incl. = 1N4001 Da= red LED T 1 = BDX77 + T2 = BDX78* T3;T4 = BC547B ICi = NE5050 + (Philips Components) IC2 = 7812 * Listed by Universal Semiconductor Devices Li = VAC 2KB 490/255 (VAC Vacuumschmelze GmbH e Werk Hanau • Gruner Weg 37 e 6450 Hanau 1 a West- Germany. Tel. +49 6181 362-1; telex 4184863; fax +49 6181 362645). L2;L3=390pH St = double-pole on/off switch. Fi = 250 mA delayed action fuse with PCB- mount holder. Tri= PCB mount transformer; 3 VA; 2x7.5 V 8200 mA. Kt = 3-way PCB-mount terminal block. Heat sink for IC2. Moulded ABS enclosure, e.g. Bopla E440, or OKW A9030065 . PCB Type 880189 i components internal to the detector create a low-pass filter for shaping and cleaning the digital pulses. This filter not only suppresses high-frequency signals, but also sets the maximum data rate — in this case, to 1 Kbit/s. Background signals at the mains frequency are re- jected by the AM-suppressor. This works by storage of the average direct voltage level in C-. When no input signal is available for more than 4 s, the voltage on C- would rise slowly to a value that results in a logic high level at the output. This is prevented by R3, R4 and Rs. The comparator, in combination with Cs, cleans the detected pulses, whose edges are straightened again by the inter- Fig. 5. Receiver amplifier gain vs frequency for different values of the high-pass capacitor. standing considering the cost. PRO- COMM is set to the Kermit mode with the following line settings (ALT-P; op- tion 7): 8 data bits; 1 stop bit, no parity; 300 baud; half-duplex and a time-out of 999 ms. In Kermit mode, PROCOMM allows the user to define the packet size. Initially, go to the Kermit setup menu, and select a small packet size to keep resending time low. The Kermit protocol works basically as follows. The first packet sent by the computer is accompanied by a CRC byte (CRC = cyclic redundancy check). The CRC byte generally provides better results than a checksum by virtue of a different method of calculation: the checksum is obtained by addition, the CRC by division. After reception of the data in the remote computer, the CRC is checked, and a message is returned to in- dicate whether or not the packet has to be resent. This process is repeated, if necessary, until correct data has been re- ceived. nal bistable. This has an open-collector output that drives a simple computer in- terface set up around Tj. Table 1 lists the possibilities of configuring this inter- face in accordance with three interfacing standards. Since an RS-232 interface works with positive and negative voltage levels, the interface should be extended as shown in Fig. 3. Ris and Ris simply raise the ground potential of the inter- face to half the supply voltage of the modem. This results in the circuit driv- ing the RS-232 interface in the computer with a voltage swing of ±6 V, which is adequate for correct operation in most cases. Ground of the circuit is, therefore, not ground of the RS-232 interface. One additional resistor, R17, is needed to protect the data input of the modem against the voltage levels of up to ±12 V supplied by the computer’s RS-232 driver. Noise suppression by the modem can be improved by increasing the value of Cs and Cs to 10 nF and 100 nF respect- ively. This measure effectively results in a lower bit-rate of 300 per second, but speed up communication between modems since less information needs to be sent back and forth on account of corrupted data. Finally, some ex- perimenting may be required with the value of C4 — a lower value results in a narrower bandwidth of the input ampli- fier. Possible capacitor values lie be- tween 470 pF and 1 nF. Construction: safety first For your own safety, the power line modem must never be constructed on a printed circuit board other than the one shown in Fig. 4. Completion of the board with reference to the parts list is not expected to cause difficulty. The unit is fitted in an ABS enclosure provide with a grommet and a strain-relief clamp for the mains cord. The connector or socket for the bidirec- tional serial link to the computer should be located as close as possible to the rfelevant connections on the printed cir- cuit board, so that the wires can be kept as short as possible. One adjustment To begin with, the data input of the modem should be held at about +5 V. This is easiest done by connecting a 27 kS2 resistor between the input and the + 12 V line in the modem. Never apply power until a thorough check of the completed board, and the way it is con- nected to the mains, has been made. Power up and use an oscilloscope to in- spect the waveform at pin 20 of ICi. Adjust the core in Li for maximum am- plitude of the carrier. When an oscillo- scope is not available, an analogue voltmeter may be used instead, but only if this is known to be able to work at 120 kHz in the alternating voltage range. Sending and resending packets: enter Kermit As already hinted at, reliable data com- munication with the modem can only be achieved when the computers at both ends run a communications program capable of error detection and correc- tion. Owners of the Commodore C64 computer are advised to use General Electric’s excellent program HOMENET. The prototype of the power line modem was tested under control of the PC com- munications package PROCOMM ver- sion 2.4.2, whose capabilities are out- Once the maximum feasible parameters for data communication with the aid of the Kermit protocol are known with both modem stations, the chat mode in PRO- COMM can be selected for on-line com- munication between connected PC stations. H HOMENET is a registered trademark of the General Electric Corporation. The HOMENET communications package for C64 computers may be obtained by contacting The Industry Standards Staff, General Electric Cor- poration, Fairfield CT 06431, U.S.A. Reference: Philips Components AN1951. Procomm is a registered trademark of Datastorm Technologies Inc., P.O. box 1471, Columbia MO 65205, U.S.A. The latest version of Procomm is stated to cost US $35.00 including disk. Datastorm’s auto-answer BBS service can be contacted 24 hours a day and 7 days a week on telephone number USA 314 449-9401. Note: in Philips Components' Appli- cation Note ANI9SI on the NE5050, a line transformer identified as TOKO AMERICA #707VX-T1002N is rec- ommended for 110 V mains networks. .4.29 HYBRID VHF/UHF WIDEBAND AMPLIFIERS Recently, Philips Components have added a number of new devices to their well-established OM3xx and OM9xx ranges of hybrid wideband amplifiers made in thick-film technology. The five new integrated circuits provide a wide range of gains, and should be of particular interest for the design of VHF/UHF wideband boosters, since they require remarkably few additional compo- nents. A fully worked out application of the new chips in such a booster is included in this article. The new devices in Philips Components’ series of integrated wideband amplifiers include a single-stage type, the OM2045 with a gain of 12 dB, a two-stage type, the OM2050 with a gain of 18 dB; and two three-stage types, the OM2060 and OM2061, with gains of 23 dB and 28 dB, respectively. All of these can be used as RF gain blocks with an input and output impedance of 75 Q, in the frequency range between 40 and 860 MHz. Since virtually all that is necessary for building a reliable wideband RF ampli- fier with good specifications is contain- ed in a single chip, many applications are feasible. The amplifiers are, for instance, ideal for use in the domestic cable net- work for radio and TV, in which ad- ditional gain is often required to over- come cable losses. Radio amateurs, too, will find the amplifiers useful for general-coverage reception experiments, as the 6-m band, 2-m band and 70-cm arc covered in one go. One further appli- cation is the use in 480 MHz or 612 MHz intermediate-frequency (IF) amplifiers of indoor units for satellite TV reception which incorporate a surface-acoustic wave (SAW) filter with high insertion loss. A practical design The circuit diagram of Fig. 1 demonstrates the simplicity of a VHF/UHF wideband amplifier set up around one of the new OM20xx types. Apart from a supply and, of course, the hybrid chip, all that is needed to obtain a complete RF amplifier are two capacitors and a small choke if a two- or three-stage amplifier chip is used. Thanks to the simplicity of the circuit, it can be housed in a compact enclosure. The supply voltage for all amplifier chips is 12 V ±10 | 7o at a maximum cur- rent drain of 110 mA (OM2070), allow- ing the use of a simple power supply composed of a small 15 V mains trans- former, a 500 mA bridge rectifier, a 4.30 elektor India april 1989 B1 = B40C500 Philips Components’ latest Circuit diagram of the wideband aerial boo: i a series of hybrid amplifiers. Semiconductors: Bi -B40C600 bridge 1C 1 = 7812 IC2 * see text mounting. socket. 220 p F smoothing capacitor*and a 7812 integrated voltage regulator with the two usual decoupling capacitors. Construction of the RF amplifier The printed-circuit board shown in Fig. 2 was designed to make construc- tion of the wideband amplifier as simple as possible, while still allowing the con- Component mounting plan of the double-sided printed circui supply H output jpply (+) utput/supply H 1 common 1 output/supplyH structor to choose and use any of the five new amplifier chips. Since the pinn- ing of these is, unfortunately, not consis- tent (see Fig. 3), short wires are used in- stead of PCB tracks to connect input, output and supply terminals. In view of the relatively high frequencies involved, it is imperative that these wires, notably the earth connections, are not longer than 1 to 2 mm. In all cases, reference should be made to Fig. 3 to ascertain the pinning of the selected chip. The power rating of the 15 V trans- former on the PCB should be in accord- ance with the RF amplifier chip used — see Table 1 for the main specifications of these. When the OM2045 is used, a 1.2 VA transformer should do. The use of the OM2070, however, calls for a type rated at not less than 3.3 VA. It should be noted that some transformers require two short pieces of wire between the sec- ondary terminals and the tracks leading to the AC connections of the bridge rec- tifier. The PCB is cut in two along the dashed lines. The part with the round, etched, holes is drilled to accept the input and output sockets, and the grommet for the mains cable. After drilling, this part of the PCB is soldered vertically on to the main amplifier board as shown in the photographs. Small pieces of tin-plate are bent to shape and soldered round the input and output sockets for additional screening. The main board may now be populated, with the exception of the amplifier chip, C t, Cs and C<.. The centre pin of voltage regulator ICi is soldered at both sides of the board. Ten non-connected solder spots are reserved for IC 2 , whose pins are connec- ted with the aid of wires as outlined above. It is recommended to fit these connections at the reverse side of the board. The input marked supply (+) is connected to point P. Three ICs, the OM2060, OM2061 and OM2070, require an additional connection between the supply and the chip output. This con- nection is made in the form of a 5.6 pH choke between the output and point P, as shown in Fig. 4. Coupling capacitor Cj takes the RF in- put signal direct from socket Kj to the input of IC 2 . The amplified RF output signal is coupled out to K: via Cs. To prevent stray inductance and possible os- cillation, the wires of Cj and Cs should be kept as short as possible. Capacitor C<. (2p2) may be added for extra sup- pression of interference. M 91 1 i _ V * «*■ 2 v — — — * 1 - ** ',1 p* s cjyp Fig. 4. Series-connected supply choke L2 is fitted at the reverse side of the board. 4.32 Fig. 5. Completed prototype of the wideband RF amplifier. CENTRONICS-COMPATIBLE PRINTER BUFFER from an idea by R. Degen Today’s computers and the programs that run on them are capable of generating massive amounts of data that is, in some way, to be put on paper. Users of computer-assisted design and engineering (CAD/CAE) and desk-top publishing (DTP) programs need not be told that the printer or plotter is almost invariably a slowing-down factor in the system. At printing time, therefore, the user is often forced to sit with his arms crossed, or go out to have a cup of tea, because the computer has insufficient memory left to store the whole of the printable file. Intermediate storage of data on disk and so-called spooler programs only partly resolve this annoying problem. The versatile printer buffer described here is a state-of-the-art design that eliminates printer wait times. Just look at the main specifications below to convince yourself that this is your next home-made computer peripheral. Printer wait times arise when the amount of data to be fed to the printer exceeds the free memory capacity of the computer. Today’s wordprocessors, CAD/CAM/CAE and DTP programs are so large that, believe it or not, very little memory is left for the work file, be it a text, drawing or graphics image. Often, no more than a few tens of kilobytes are left of the 640 or so in- stalled in the PC. The programs then in- variably use a disk drive to temporarily store the excess data, which is ‘spooled’ to the printer output via the small, inter- nal buffer and a background program. Meanwhile, however, the user can not ex- it the program, and further text or graphics editing may be slowed down considerably because of the spooling process. Documentation and other text files are becoming ever larger, too. Many so- called Public Domain programs and PC utilities are accompanied by a compressed documentation file, which, when de-compressed ( unpacked or uncrunched) by the user, results in a printable .DOC or .MAN file of Printer buffer • Centronics compatible • Memory: user-configurable from 32 KByte to 1 MByte, or from 128 KByte to 4 Mbyte in six steps. Option to use either 32 KByte or 128 Kbyte static RAM chips (xx256 or xxl024). • Low current consumption (40 mA) enables powering from printer. Op- tion to use mains adapter with DC output • Compact unit thanks to surface- mounted components • No microprocessor • Repeat mode; buffer does not load data while feeding printer. 100 kilobyte or so, which takes 15 to 30 minutes to dump on most matrix printers. Most modern matrix and ink- jet printers can be fitted with extra buffer memory, but the cost of such an extension is often quite high relative to the price of the basic printer. The most expensive of add-on buffers often pro- vide ‘only’ 64 KByte, which is no great help when very large files are handled. A non-used character? The present circuit is based on the fact that no printer prints ASCII character 00. In practice, the operation of the printer buffer is as follows: the computer writes data into the memory of the printer buffer. When the data flow to the printer buffer ceases, a user-defined delay is introduced before the data lines are made logic low, so that the remaining memory is loaded with zeros (00). The printable file is thus held in the printer elektor India april 1909 4.33 Fig. 1. Basic internal structure of the printer buffer. buffer, and its size is known. When this process is completed, the file(s) held in the printer buffer arc ready for sending to the printer. The total content of the buffer memory, including the zeros, is then fed to the printer (the zeros, of course, do not appear on paper!). The computer is called upon only when the size of the file to be loaded into the printer buffer exceeds the available storage capacity (this depends on the memory configuration selected by the user, and will be reverted to). Provided the computer has not produced a time- out error in the mean time, the re- mainder of the file is loaded after the printer has completed printing the mem- ory content of the buffer. Obviously, to avoid printable files being loaded in two or more passes, the buffer’s memory should have capacity at least equal to the size of the largest anticipated printable file. Few problems are expected here, however, considering that 128 KByte RAMs can be Fitted in the circuit. A few examples: the text file for this very article is 29,287 bytes large (WordPerfect 4.2), while the circuit diagram, originally drawn with the aid of OrCad-SDT3, takes up 360 KByte (size A3 sheet). The Postscript DTP file used for composing galley-proofs of this article with the aid of Ventura Publisher 1.2 occupies 422 KBytes. CAD pro- grams, such as PCB design and schematic drawing packages, invariably switch the matrix printer to its graphics mode, and little needs to be said of the ‘printing speed’ then achieved. . . Functional description of the printer buffer The printer buffer is a relatively complex circuit and it is, therefore, useful to first get aeqainted with its general structure, shown in the block diagram of Fig. 1. The function of the keys on the printer buffer is as follows: WAIT When several files are to be printed, the printer buffer can be switched to wait mode so that it can load all printable files in succession. REPEAT This key enables the buffer to print the same file more than once (copy func- tion). RESET The buffer can be reset and re-initialized by pressing RESET. Internal bistables and the memory size counter are reset to zero. It should be noted that reset over- rides the repeat function, so that re- printable characters in the buffer may corrupted. The RESET key should not, therefore, be actuated before the buffer has completed feeding out all of the copies selected with the repeat function. With reference to the block diagram in Fig. 1, the central part is the buffer’s memory with its associated ad- dress decoding and address counting cir- cuits. The address counter is clocked during the loading as well as feeding out of data. Loading is clocked by the strobe pulses supplied by the computer, and feeding out by an oscillator. At the com- puter side, an input buffer is provided for the databits, and a clean-up circuit that shapes the strobe pulses and prevents double clocking. A third block takes care of the BUSY and ACK (acknowledge) handshaking with the computer. The buffer loads and stores data as long as strobe pulses are applied by the com- puter. The strobe detect block monitors the reception of strobe pulses. When these fail, the oscillator clock is enabled, either to fill the remainder of the inter- nal memory with zeros, or, when the memory is full, to start feeding the The block marked WAIT FOR INPUT is controlled by WAIT switch Sj which allows the strobe detect signal to be over- ridden, thus forcing the buffer to load further data (but only if free memory is still available). The functions of blocks REPEAT, IN/OUT SELECT and RESET are ob- vious. IN/OUT SELECT determines the data transfer direction: from computer to buffer (IN), or from buffer to printer (OUT). The databus buffers are required to ensure stable signal levels even when the maximum number of RAMs, 32, is installed. The BUSY and STROBE signals derived from the previously mentioned oscillator control the data flow between the buffer and the Centronics input of the printer. The circuit in detail The above functional blocks are found back fairly easily in the circuit diagram of Fig. 2. The input handshaking circuit of the printer buffer is composed of IC12 and D-type bistables FFj and FFj. Circuits IC7 and ICs form the address counter, and IC10-IC11 the address decoder. The memory of the printer buffer is formed by static CMOS RAMs in positions ICis through ICj 2. Bistable FF: and timer IC? function as strobe pulse detector that determines when the file(s) has (have) been loaded completely. Direction switching (IN/OUT) as outlined above is effected by bistable FFi and Schmitt trigger gates Nn, Nis and N19. The central oscillator is an R-C type built around NAND Schmitt-trigger gate N ifi. Inverters Nn and N12, finally, supply the strobe signal for the printer. The memory extension circuit is shown in Fig. 2b. Each extension card holds 8 RAM chips, which are either 32 or 128 KByte types. The extension(s) is/are essentially connected in parallel to the basic memory on the main board. Timing is essential The letters shown at a number of essen- tial points in the circuit diagram refer to the timing diagram of Fig. 3. Bistable FFj slightly lengthens the strobe signal. A, which is supplied by the computer’s Centronics port, so that a well-defined rectangular signal, B, is ob- tained for driving gate N20. This sup- plies the computer with handshaking signa ls BUSY (C) and, via Ns and FFj, ACK (D). Note that some com- puters use B USY a s the handshaking signal, others ACK, and still others both. The printer buffer is compatible with all of these. The strobe detection circuit uses a Lin- CMOS ( Linear Complementary Meta I Oxide on Silicon) timer Type TLC555 (IC9) from Texas Instruments. The first strobe pulse from the computer triggers the TLC555, which drives its Q output logic high. This causes the output of in- verter Ns to go low (signal G), so that the data reception indicator, LED Ds, lights. When the strobe pulses cease, timing capacitor Cs is charged via R? and preset Pi, which allows setting a delay between 5 and about 30 s. When this delay has lapsed, the voltage on Cs resets the TLC555. As long as strobe pulses are being received, however, Cs is discharged by Ti, so that IC9 can not be The rising edge of signal G clocks bistable FF2. Since the D (data-) input of FF2 is logic high, output Q goes low. This results in the output of N19 going logic high (signal H). The event marks the switching over from IN (computer to buffer) to OUT (buffer to printer), and at the same time causes the BUSY line to the computer to be actuated. After a short delay introduced by R12- C?, the oscillator around Nia is started. The memory space available after loading the file(s) is then filled with zeros by disabling the data input latch, IC12, and pulling the datalines to the RAMs to ground with the aid of 8-way resistor network Ri«. When the address line selected with RAM-configuration switch block S2 goes logic high, the outputs of FFi toggle. Functionally, this means that the RAM is switched over from read to write (WE, signal N, is actuated). Via Ni and Nu, the clocking of FFi also causes the address counter to be reset in preparation for the feed-out operation. Signal P controls gate Nis, and so enables the communication with the printer to be established. Gates Nis and inverters N11-N12 conver t the o scillator pulses to strobe pulses (PSTB; signal R) for the printer, which responds to them by actuating output line BUSY (signal Q). This stops the oscillator while a character is printed. When BUSY is de- actuated, a new strobe pulse is generated. Components Ris and C9 delay the strobe signal briefly with respect to the selection signal, F, for the address decoding circuit. This is done to ensure that the datalines are stable when the strobe line goes low. The next clock pulse applied to FFi causes this to revert to the start state, and FF2 to be reset via C2 and Ra. This brings the circuit back in the initial state. The second part of the timing diagram illustrates what happens when the printer buffer is fully loaded. Bistable FFi takes control of the data-buffers, and switches the circuit to the OUT mode (buffer to printer). Components R>2 and Ci ensure correct timing of this operation, preventing loss or corruption of printable data. After printing, D9 rapidly discharges Ci, and so prevents the oscillator from running on, which would result in the last character being printed a number of times. During this operation, the computer is set to wait when insufficient memory is available. It will be clear that fitting enough memory in the buffer is the best way to avoid this situation. More details . . . The time before the buffer starts feeding data to the printer can be adjusted with Pi (max. 30 s). The delay can be set in accordance with the type of data sent to the printer. Graphics data, for instance, generally gives rise to a fairly heavy cal- culation load, so that quite some time may lapse. When the available maximum delay of 30 s is too short, or when a number of separately loaded Files are to be printed in rapid succession, the buffer may be set to WAIT mode with the cor- responding key. When WAIT is de- actuated, the set delay is introduced again, and printing may recommence. The RESET key rc-initializes the buffer as at power-on. Printing may, of course, also be interrupted at any time by turn- ing the printer off-line (SELECT or ON- LINE key). Extra copies of the printout may be ob- tained by pressing the REPEAT key. One proviso here, however, is that the previous run was not interrupted by a reset. This is because the reset circuit works asynchronously and may, therefore, modify the memory content. Building the printer buffer The printer buffer is built partly with surface-mount assembly (SMA) parts. eleltor India apriM989 4.35 The basic circuit is composed of two printed-circuit boards: the main board (Fig. 4a), which holds the digital control and memory circuits, and the keyboard (Fig. 4b), which holds the 3 control keys, and 4 LEDs. Memory configuration: look before you leap It was already noted that the user deter- mines the memory size of the printer buffer. A third PCB is, therefore, pro- vided as a memory extension unit (see Fig. 5) that accepts two types of static RAM: 32 KByte (43256 or 84256) or 128 KByte (841024). This third board is only required to increase the memory size of the basic printer buffer beyond | 256 Kbyte (32 Kbyte chips used) or I 1 MByte (128 KByte chips used.). Atten- tion: it is not possible to mix 32 KByte and 128 KByte RAM chips. When the memory is to be upgraded, either the I first choice must adhered to, or all chips | must be removed and replaced by other types. On the PCB, there can be no doubt about the location of the chips, since 32 Kbyte and 128-KByte types are supplied in a 28-pin and 32-pin package respectively. Five short wire links at the copper side of the PCB define the maximum size of | the memory (either 1 MByte using 32 32 KByte RAMs, or 4 MByte using 32 Fig. 2b. Circuit diagram of the optional memory extension board which, depending on the 128 KByte RAMs) hence, the wire RAM chips fitted, provides 256 KByte or 1 MByte of additional buffer capacity. links are marked 1M and 4M. Fit the Resistors (±6%); Ria;R 2 i = 8-way SIL re Pi — 1M0 preset H Capacitors: Ci-lpO; 16 V Cs-lOp; 16 V Cl2=100p; 26 V ICi2;ICl3« 74HCT373 ICl4»7806 1C 1 6 . . . IC 22 Incl. =43266 INECI or 62266 or 84256 (Fujitsu) (32Kx8)l or 841024 (Fujitsu) Miscellaneous: Ki;K2;K3= 10-way pin header. K4= 34-way pin header. K5;Ke= 20-way pin header. Si = push-to-make button with large black cap (ITW 61-10204001* or Digitast. ly DIL-sv :h block. S3= push-to-make button with large red cap (ITW 61-10200001* or Digitast. S4= locking button with large black cap (ITW 61-2020400)*. 2 off 20-way IDC sockets. 1 off 36-way Centronics (female) connector fc panel mounting. 1 off 25-way female D-connector for panel mounting. Flat-ribbon cable as required. Enclosure: e.g. BICC-Vero Type 4775-1410. PCB Type 890007-1 ' PCB Type 890007-2 * ITW Switches • Division of ITW limited • Norway Road, Hillsea e PORTSMOUTH P03 6HT, Tel: (0706) 694971. Telex: 86374. Fax: (07051 666352. SURFACE-MOUNT ASSEMBLY PARTS: Resistors: Ri;Rio = 100R R2;R3;R7;Rn;Ri3:Ri4;Rie;Ri0;R22. . . R25 incl. -1 OK R4;R17 = 1M0 Rs;Ra;Re;Ris = 330R Ra;Ri2»100K R 20 -IKO Capacitors: C2,C7;Ca= InO C3;Ce;Cie;C27;C28« lOOn C4;Ca;Cio= lOOp Cn = 470p Semiconductors: Dl;D2,'De;De;De=BAS32 (SMA equivalent of 1N4148) ICi;IC2- 74HCT14 IC3;IC4=74HCT132 ICs;IC6»74HCT74 IC7;ICa = 74HCT4040 ICa = TLC556 (Texas Instruments) ICio;ICii = 74HCT154 links marked 1M when xx256 R AMs are used, and the links marked 4M when xxl024 RAMs are used. A dual-in-line (DIL) switch block. Si, is used for setting the actual memory size. Only one switch may be closed at a time: switch 1 selects 32 KByte, switch 2 64 KByte, switch 3 128 KByte, and so on, to Ss which selects 4 MByte. It is seen that each switch doubles the amount of memory, and extending the memory means, therefore, doubling its size (it is not possible to add, say, 32 KByte when 128 KByte is already available: the next step is 256 KByte). With the cost of the RAM chips in mind, the possibilities for future extensions should always be studied beforehand. For instance, for a 256 KByte configura- tion, there is a choice between eight 32 KByte and two 128 KByte RAMs. The latter option may currently be the more expensive, but has the advantage of allowing a future upgrade to 1 MByte (on the main board) or 4 MByte (with 3 off 1 MByte extehsion boards). Fitting the SMA parts The SMA parts are the first to be mounted at both sides of the main PCB, which is double-sided and through- plated. There is no mystery about fitting SMA parts if a few basic precautions are ob- served: • SMA components generally do not have a printed type or value indi- cation: therefore do not remove them from their labelled package before they are due for mounting; • use a low-power, temperature- controlled, soldering iron with a fine tip, and clean this after every soldering • use thin (<1 mm dia.) soldering wire to avoid short-circuits between adjac- • solder as quickly as possible to pre- vent overheating the component; SMA integrated circuits should be placed and aligned carefully. Then solder two corner pins and once more Fig. 5. Component mounting plan of the memory extension board. Depending on the mem- ory configuration, 10-way header K» is connected to Ki, Kz or K< on the main board. verify whether all pins line up correctly with the relevant solder islands. For passive SMA parts, it is best to first pre-tin one of the tracks with a tiny amount of solder. Position the part, and heat the connection on the pre-tinned track. Then solder the other part con- nection. Again, avoid overheating and excess amounts of solder tin. When all SMA parts have been fitted, a magnifying glass is used to inspect their connections to the tracks on the board. Also check all solder joints for possible short-circuits. The standard parts The first non-SMA part to be fitted is 8- way DIL switch Sz. This is mounted as an SMA integrated circuit, slightly above the PCB surface so that its pins are ac- cessible for soldering. If changes in the memory configuration are not foreseen, Sz may be omitted: the connection that selects the relevant RAM size is then made by a wire link. Proceed with fitting the sockets for the integrated circuits, and the memory extension connector(s). The rest of the construction is entirely straightforward. The memory extension board is not through-plated. With the exception of a number of capacitor leads, the points where through-contacting is effected are, fortunately, located well away from com- ponents. Start the construction of this board with fitting the through- contacting wires, as these are difficult to reach once the IC sockets have been mounted. A simple method of through- contacting the PCB is to temporarily in- sert four M3 screws with nuts in the cor- ners of the board, so that this is a few millimetres above the working surface. Then insert the through-contacting wires vertically until they rest on the work sur- face. Cut off the excess wire, and solder at the top side. Once all the wires have been fitted, the board may be reversed and the screws removed. The free side of each through-contacting wire is then (quickly) soldered to the relevant spot. Power supply The printer buffer may be powered either by the printer or by an internal power supply. Consult the manual sup- plied with your printer to check whether this supplies +5 V at pin 18 of its Ccn- PRINTER BUFFFER: MEMORY EXTENSION BOARD Capacitors: C29. . . C36 incl, = 100n Semiconductors: IC23. . IC30 incl. = 43256 or 84256 or 62256 I32K x 81 or 841024 (256Kx8) Miscellaneous: <7= 34-way angled pin header. K8= 10-way angled pin header. Ka;Kro= 34-way IDC socket. Kri;Ki2» 10-way IDC socket. Flat-ribbon cable as required. PCB Type 890007-3 tronics input connector. If this is not so, wire link Y is fitted, and the 5 V regu- lator circuit on the main PCB is powered from a mains adapter with 8 to 12 VDC output. Wire link Y is omitted, and wire link X is installed, when the buffer is powered from the printer. When the ex- ternal power supply option is used, it is recommended to connect the mains adapter via a small, 2-way DC-input socket as used on portable cassette players and some older types of pocket calculator. Cables and connections The main board has two 20-way pin headers for connecting the input and output cables. The pin headers mate with 20-way IDC sockets secured on to short lengths of flat ribbon cable. The input cable is fitted with a 36- way Cen- tronics (‘blue-ribbon’) connector, the output cable with a 25-way D-connector. This arrangement allows the printer buffer to be connected with the aid of a pair of standard, inexpensive, printer cables. Fig. 7. Pinning of ihe inpul/outpul connectors. Ks and K 6 . on the main buffer, and their wiring to a 36-way Centronics input connector (in- put) and a 25-way female D-type (output). Figure 7 shows the wiring diagram of the input and output cables. The pinning of the input and output connectors is ident- ical. On these, the interconections arc made as indicated. When a 25-way D- conncctor is use d at the output of the buffer, pin 15 (ERROR) may be used to carry the +5 V supply voltage taken from pin 18 of the Centronics con- nector at the printer side. The memory extensions are bused and connected to Kj via a 34-way flat- ribbon cable. Each memory extension board has a 10-way pin header which is then connected to headers Ki to Kj on the main board, observing the logic order of the extension boards: the first is connected to Ki, the second to K:, and the third to K.t. The control panel, of which a suggested lay-out is given in Fig. 8, is connected to the main board via individual wires. Switch S-i is a 2-position locking type from 1TW. The size of the control panel is such that it is easily installed vertically behind the front panel in an ABS enclosure Type 4775-1410 from BICC-Vero. The main board and the control board are mounted on to an aluminium base plate. A drilling template for this support plate is given in Fig. 9. Test time. . . The power LED on the printer buffer should light at full intensity when the unit is switched on. If it does not, the power supply in the printer is not capable of delivering the required cur- rent, and a separate power supply should be used as discussed earlier. It should be noted that the printer buffer draws a small cur rent from the computer via the STROBE connection. This current causes the power LED to light dimly. Once the presence of the correct supply voltage has been ascertained, the WAIT key is pressed. The associated LED should light. Release WAIT. Send a file to the printer buffer, which shows reception of data by lighting the input LED. After a delay determined by the size of the file, the input LED goes out. The following delay depends on the memory size, and is about 15 s with 256 KByte installed (remember that some time lapses before the non-used part of memory has been filled with zeros). The output LED will now light. Printing commences, and the output LED goes out when the print job is finished. The repeat function may now be tested. When the relevant key is pressed, the associated LED lights, and the buffer should feed out a copy of the Fig. 9. Drilling template for a support bracket that holds the keyboard. previously loaded file. When a number of files are to be loaded for printing in one go, the WAIT key is actuated before the first file is sent to the buffer. Pressing this key remains possible until the file has actually been loaded. The WAIT key is pressed again when the last file in the batch has been sent to the printer buffer. The memory configuration switch, S2, may be replaced by a single wire link if frequent changes in the RAM size are not anticipated. Other options for this switch include an 8-way rotary type, or mounting it on to the rear panel of the printer buffer and connecting it to the main board via a length of flat-ribbon cable and a 16-way DIL header. The rotary switch is a particularly useful ar- rangement because it allows memory size to be reduced quickly when a rela- tively small file is to be loaded (because less memory is available, less time is needed to fill the non-used part of it with zeros). N DESIGN IDEAS COUNTER WITHOUT COUNTER Under this paradoxical title we present a design idea for a versatile counter concept that uses an EPROM instead of the expected counter chip. by N. Korber The circuit described here can be con- figured as an up- or down-counter from 0 to 99 in BCD or 8-bit binary mode, with reset, preset and enable inputs available. All control inputs are digital compatible, allowing the user to define his own control hierarchy. Moreover, the control inputs may be active high or ac- tive low. The counter is actuated by the positive transitions in the clock signal, and handles input frequencies well into the MHz-range. All inputs and outputs are TTL-compatible. The counter is so remarkable because its features and ver- satility are achieved with only a handful of commonly available components. The Moore system From a point of view of information technology, the present counter is similar to a so-called synchronous transforming Moore circuit. The indication synchron- ous has to do with the clock signal and the way in which the inputs are driven. A Moore circuit is a logic unit that pro- cesses input parameters x and internal conditions z to produce output states y. Each condition is associated with only one output state. As a result of input parameters and internal conditions, the Moore circuit steps through a number of states. The system not only uses current- ly available information, but also infor- mation acquired from past operations, whose system conditions have been recorded. A clock signal is required to switch the system to the next state. In practice A real Moore system is composed of a switching network and a memory. In the case of the present counter, the input parameters are the data applied to the Fig. 1. Basic design of an EPROM-based counter. 1 4.43 control inputs. These are connected to an EPROM, which combines these data with the current conditions, to generate a system state. This state is copied into a latch (IC2 in the circuit diagram), and so becomes the current state. In prin- ciple, output state y would then have to be generated with the aid of a further switching element. This procedure is not needed here, however, by virtue of the EPROM, which, if properly pro- grammed, ensures that the output value (i.e., the counter state) is exactly the value that corresponds to the current state. The operating principle of the circuit discussed here is fairly complex, but may be explained with the aid of a hypothetical, circuit, based on an EPROM Type 2764 addressed between 0000 and 1FFF, that serves to count seconds pulses applied to the clock input by an external circuit. First consider the basic timing of the events that take place in the circuit. Because switch ENA (enable) is connec- ted to address line A12 of the EPROM, it divides the available memory capacity in two equal halves. Each of these is, in turn, subdivided in two by line All (switch PRESet), and again in two by the RESet switch connected to A10. For the actuation of the RESet switch to cause the displays to indicate 00, it is necessary that all memory sub-partitions ad- dressed with A10=l (for example, 0000 to 03FF, or OBFF to FFFF) contain data 00. With this in mind, and returning to the seconds counter, it is clear that 00 should be displayed when RESet is actuated. To achieve this, data available at outputs Q0 to Q7 of octal bistable IC? must cause the display drivers Type 9368 to drive those display segments that together A positive pulse transition at the clock input of the 74LS374 causes the logic state applied to each data inputs, Dn, of the chip to be copied to the correspond- ing output, Qn. Assuming that the cir- cuit is to function as a down-counter, EPROM address line A9 is made logic high by closing switch DOWN. In the 1 KByte memory area adressed, 512 bytes may be programmed such that the displayed value is decremented. Care should be taken to ensure a correct pro- grammed sequence, since 59 must be displayed once the counter has been started. The circuit diagram of Fig. 1 clearly shows the sub-units of the counter: the external controls in the form of switches, the EPROM, the latch circuit, and the display drivers for two 7-segment LED displays. The control parameters of the counter, ENAable, RESet, PREset and DOWN, and the current state, are ap- plied in parallel to the address inputs of the EPROM. The EPROM uses the ad- dress so obtained to produce infor- 4.44 elektor India april 1989 mation on the next state. This infor- mation is made available on data out- puts DO to D7, and, a little later, on out- puts Q0 to Q7 of the latch, from where it is sent to the displays. This process starts with each rising edge of the clock signal. Programming the EPROM The actual contents of the EPROM de- pend on the application of the counter circuit, and must, therefore, be provided by yourself. The 8 Kbyte EPROM is perhaps best thought of as 8 blocks of 256 bytes. Each of these blocks is addressed by ap- plying a particular (model-) dataword to the address inputs. When the control parameters remain umchanged, only the information applied to inputs A0 to A7 determine the output state. The changes from one state to another are a function of the preprogrammed contents of the relevant block. If, for example, RESet is pressed, the change to the next state results in the displays reading 00. As a practical programming example, Table 1 lists the EPROM contents for a down-counter and an up-counter with 60, cyclic, states — the seconds counter discussed above. For a similar counter with, say, 100 states, the memory lo- cations up to $1198 have to be loaded, with $1198 and 1199 reading 99 and 00 respectively (UP function). Similarly, the down-counter starts at $1200 with data 99, and 98 at $1299. Table 2 shows a further example of how the EPROM may be programmed: in this case, a two- digit decimal up/down counter is ob- tained. B4 THE DIGITAL MODEL TRAIN — PART 2 by T. Wigmore The second part in the series describes a locomotive decoder that is constructed in surface-mount technology. In conjunction with the associated digital control system, it enables up to 80 trains to be controlled independently. The associated control system will be described in a future article, but in the mean time the present decoder may be used with the Marklin digital system or any two-rail model track. The use of surface-mount techniques (SMT) makes it possible to construct a locomotive decoder from standard com- ponents that is compact enough for fit- ting into a locomotive. These techniques are undoubtedly new to many readers, but this article will show that there is no real mystique about them. The present decoder enables both a.c. and d.c. locomotives to be controlled in- dependently of one another. In its simplest form, it is suitable for use on tracks with a centre rail (Marklin or Trix, e.g.) or with an overhead power line. The addition of the two-rail adaptor dis- cussed later in the article enables the decoder to be used with other model railway systems. It should be noted, however, that although the decoder is compact, it can not be fitted in locomotives smaller than HO. In Marklin stock, the space for the decoder board is ensured, because the change-over relay may be removed. This is possible, even desirable, since the decoder enables a change of direction (and the consequent switching of the head and tail lights) to be effected elec- tronically. As already stated, the decoder may be used with a.c. as well as d.c. systems. It is thus possible to convert a d.c. locomotive for use on an a.c. track by providing it with a slip contact and the present decoder. In principle, it is also possible to use a Marklin locomotive on a track of differ- ent manufacture. If, however, that track is a two-rail system, the wheels of the locomotive must be electrically separated and provided with appropriate contacts. Moreover, if a two-rail track is used, the adaptor described later is also required. Although possible, this conver- sion is, therefore, in general not prac- The two-rail adaptor is also constructed in surface-mount technology and may be mounted on to the decoder. The resulting sandwich is only 2.5 mm • independent control of up to 80 • may be driven by Marklin HO system or Elektor Electronics Digital Model Train System • suitable for a.c. and d.c. locomotives • suitable for three-rail system or, with optional adaptor, for two-rail systems • motor current max. 1 A (peak 1.5 A) • protected against thermal overioad • speed controlled in 1 6 steps • automatic change-over of independently lit head and tail lights • lamp voltage 10 V or 20 V as required • optional: memory from external buffer capacitor • compact dimensions through surface- mount technology: 35 x 24 x 7.5 mm (decoder only) adaptor) Table 2. Technical dala of the locomotive decoder. thicker than the decoder board by itself. The use of the two-rail adaptor makes the locomotive decoder independent of the polarity of the supply and data con- nections. As an aside, this also solves the eternal problem of reversing loops. Compatibility Apart from the possibility of its use in a large variety of locomotives, the decoder may be operated with a number of con- trol systems. In this context, it is perhaps of interest to know that it was designed originally and solely as part of the Elektor Electronics Digital Multi-train System which will be described in this series of articles. However, with a few simple changes (such as the baud rate), it also proved usable with the Marklin digital HO system. It is, of course, im- portant to differentiate between the Marklin decoders and the present one. In view of the required compactness of the decoder, the spare function offered by Marklin has had to be sacrificed in the present decoder (see Fig. 14). Marklin uses the lowest speed step (binary 1000) for reversing, assuming that this step will not be used in practice, since the motor does not operate smoothly at this (average) low voltage. To use this voltage for reversing the direction of travel, it has to be decoded and then used as the clock signal for a bistable. In the present decoder, this would have required iwo additional ICs, which would have made the board too large. Fortunately, in most cases the spare function is not required anyway. Where it is needed, there is no alterna- tive to using a Marklin decoder. Note that if the present decoder is driven via Control 80 of the Marklin system, the spare function is used for reversing. A more important difference between the Marklin decoder and ours manifests itself if locomotives converted for.use in a digital system are run on conventional (non-digital) tracks. The Marklin decoder may be used with conventional control systems, i.e., the speed may be varied according to the amplitude of the (alternating) supply voltage and the direction of travel may be changed by an over-voltage pulse of not less than 24 V. The present decoderdoes not offer these facilities: in fact, a 24-V pulse (in prac- tice, this value is normally considerably higher) would probably put paid to the power stage. It is therefore strongly rec- ommended to use the decoder only with digital tracks. Furthermore, the present decoder does not support Fleischmann’s digital FMZ system nor that from Trix. However, locomotives in those systems (and most others) may be converted with the pres- ent decoder to make them suitable for use in multi-train set-ups. It will then de- pend on the rail system whether, apart from the locomotive decoder, the rail adaptor is also required. Start at the beginning: the rails The most important difference between a digital model railway and a conven- tional one is that in the former, just as in real railways, the rails carry a constant voltage. To prevent that in these cir- cumstances all locomotives on the track 4.46 aleHor India .priM989 travel along at full speed, they are all fit- ted with a decoder and a speed con- troller. In other words, as in real life, the speed of the locomotive is varied on board, just as if it had an engine driver. The instructions to the “engine driver” emanate from a central control, which in turn is controlled by a number of in- dependent drive units or a computer. Fig. 13. The track voltage in a digital model railway systems is switched between -20 V and +20 V to ensure that the control instruc- tions reach the locomotives via the rails in a serial data format. The locomotive power is obtained by rectifying this alternating The instructions from the central control are transmitted to the locomotives by switching the supply voltage between +20 V and -20 V. The voltage on the rails is thus an alternating one, but it has a d.c. component whose value depends on the transmitted data. Each period contains 18 “marker” pulses: each of the nine pairs of pulses defines a bit with three possible states: 00=logic 0; 10=logic indeterminate; ll=logic 1. In this way, 9-bit words are formed: the first four are interpreted by the decoder as address and the other five as data. The logic indeterminate state is used only for forming addresses; the five data bits use only logic 0 and logic 1. Not only locomotives, but also turnouts (points) and signals may be controlled via the rails. Normally, locomotives are addressed constantly so that they exhibit real-time behaviour. The response time of the system becomes gradually longer as more locomotives are taken into use. An added advantage of the constant voltage on the rails is that permanent lighting of the train is possible without any difficulty. This applies, of course, also to the head and tail lights, even when the train is at standstill. Fig. 14. The data bytes for the locomotives consist of nine bits. The first four bits form a trinary locomotive address. The other five are data that enable direction, speed and — in the Marklin system — a spare function to be controlled. One data byte is 3.8 ms long. Block diagram The operation of the locomotive decoder may be seen from the block diagram in Fig. 15. The rail voltage is full-wave rec- tified to create a supply for the power stages. Since the rail voltage is a square wave, the resulting d.c. is very pure, i.e., it has virtually no ripple. A lower direct voltage for the logic circuits is derived from the supply for the power stages. The serial data are translated by a special decoder. These data are transmitted direct by the ‘red’ power line in three-rail systems or processed by the two-rail adaptor in two-rail systems. The trinary address part (first four bits) is compared with the address set on the decoder. If the two match, the next five data bits are accepted immediately. When the same five data bits have been received twice in succession, they are accepted as true and placed in the output latch. Four of the five available data bits are used for operating the 16-step speed con- trol; the fifth determines the direction of travel. The speed is set with the aid of a digital pulsewidth modulator (PWM). The modulator consists of a four-bit counter with oscillator and a four-bit compara- tor. The counter (port A of the compara- tor) runs constantly. The four bits of the speed control are present at port B. De- pending on the number at port B, the duty factor of the output signal varies between 0 and 15/16 at a frequency that Fig. IS. The block diagram of Ihe locomotive decoder. is 1/16 of the counter frequency. The PWM signal drives the output stage. Between this stage and the motor there is a fullwave rectifier. The polarity of the resulting direct voltage depends on the direction bit. This bit also serves to change over the head and tail lights that are driven by two half-wave circuits. The lighting voltage may, if desired, be halved with the aid of a square-wave signal. An undervoltage detector completes the set-up. If the supply voltage drops below powered length of track, all signals are disconnected from the power stage and the logic circuits are set to the low-power state. In this state, the logic circuits are able to store the last received data for a short time, thanks to an optional exter- nal buffer capacitor. When the supply voltage recovers, the locomotive travels on at the last set speed. Circuit description mc145029 of the same family as the mc145027 used in the turnout and signal decoder described in Part 1 of this series. The significant difference between these two circuits is that in the former bit 5 is a data bit, while in the latter it is an ad- dress bit. With the aid of wire links, a locomotive address may be set at address inputs Ai- A»: more about this under ‘construc- Network Ri-Ci sets the baud rate of the decoder as required for the locomotives, while R2-C2 serves to detect the intervals between the data bytes. Four of the data bits are fed to the four- bit comparator; the fifth, which, owing to Ni, is also available in inverted form, is used to change over the direction of travel and the lights via Nj, Nj and the power stage. The counter with integral oscillator, IC2, is designed so that the frequency of the msb (Q<. in this case) is about 140 Hz, which is also the fre- quency of the pwm signal (output of ICj). This frequency was chosen because it will not cause undue problems owing to the self-inductance of the motor: higher frequencies may limit the motor current. The power stage, ICs, is a Type L293 from SGS. This chip contains four half- wave circuits, of which two may be com- bined into a full-wave bridge for bipolar motor control. The other two are used for the head and tail lights; these may therefore be switched relative to either earth or the positive supply line. a certain value, for instance, because the in the circuit diagram of Fig. 16, the Gate N2, Re and R- form the under- locomotive is travelling over an un- data decoding is carried out by ICi, an voltage detector. If the supply voltage Fig. 16. The circuit diagram of the locomotive decoder. piil 1989 4.47 drops below 8 V the potential at junc- tion Rn-R? is interpreted by Na as a logic 0. This causes the reset input of the counter to become active, and this results in the PWM signal going low and the internal oscillator being stopped, which limits the current consumption. At the same time, the remaining inputs of ICs are made logic 0 via N.i and Ni. This is necessary to protect the chip (since its power supply is cut off) and to limit the current provided by the logic circuits. The supply for the logic circuits in ICs is derived direct from the main power supply, because these circuits draw a fairly large current. When the main supply is present, the potential at junc- tion R»-R? is limited by the clamping diodes on board N2 to a value that is slightly higher than that of the supply voltage for the logic circuits. If required, the E2 input of ICs may be connected direct to this junction. In that case, vir- tually the full supply voltage is available for the lights. Since that voltage is fairly high (20 V), the E2 input is fed with a 280 Hz square wave, which causes the ef- fective voltage for the lights to be re- duced to 10 V. The main supply is obtained by full-wave rectification in D?-Dio of the a.c. on the rails. Capacitor Ci ensures continuity of the supply during the zero crossings of the rail voltage and blocks the counter emf generated by the self inductance of the locomotive motor when this is switched off (remember, the motor is pulse driven). A bonus of free-wheeling diodes Di-Dr. that act in conjunction with Cj is the virtual elimination of wheel sparking. This in turn means less interference in the electronic circuits and less contamination of wheels and rails. The lower supply voltage for the logic circuits is derived via D2, R», Di, and Cs. This voltage must lie between 3V and 6.3 V (which is the maximum per- missible input voltage of ICs). The value chosen in the present circuit is 5.5 V because that is the rating of the possibly required external buffer capaci- tor. If the supply fails, and Cs is re- tained as the only buffer, the circuit stores the last received data for about 5 — 10 seconds. This period is determined primarily by the current drawn by ICi (25-50 pA) and the leakage current through Di. The use of an external buffer capacitor lengthens the period and this may be essential where locomotives are used in conjunction with the Marklin digital system and a track with conventional block protec- Two-rail adaptor Since Marklin uses a three-rail system, it is always clear which of the connections in the locomotive are the brown lines (outer rails) of the system and which the red line (centre rail). This is not so in two-rail systems, where the polarity of the supply lines can be reversed by reversing the locomotive. This is im- material with regard to the main power supply, but it causes complications as far as the data are concerned. In the Marklin system, data are present on all three lines, but those on the red line are inverted with respect to those on the brown lines. The two-rail adaptor determines which is the red line and which are the brown lines and inverts the data where necessary. The circuit diagram of the adaptor is shown in Fig. 17. Multivibrator MMVi detects the intervals between the data bytes. If its input is logic high during the interval, the connected supply line is brown, the data on which must be in- verted. This is done by retriggering MMV2 at the start of the next data byte which causes Ni to (continue to) work as an inverter. If the supply polarity changes, the red line is connected to the input of MMVi, MMV2 is no longer retriggered, and Nj ceases to invert the data. If the supply polarity changes at pre- cisely the time a byte is transmitted, the data comparator in the locomotive decoder prevents the acceptance of a partially inverted byte. The supply for the two-rail adaptor is derived from that of the locomotive decoder. The construction of the locomotive decoder and two-rail adaptor will be de- scribed in next month’s instalment. Corrections In the parts list of Part 1 Ti, a Type BC547 is omitted. In Fig. 8, bit 9 at the top is jogic 1 and not logic 0 as indicated. PRACTICAL FILTER DESIGN (3) by H. Baggott A practical filter may be designed in a number of ways. It may be a passive type, constructed from resistors, capacitors, and inductors, or it may contain active components that take the place of inductors. Both these types are considered in this third part in the series. The design of a practical filter depends on the requirements, the application and the available components. Simple filters arc normally designed as passive types. None the less, complex filters may very well be of the passive type also, although the size of the necessary inductors is often a severely limiting factor. Since the value of inductors for low-frequency filters is often quite high, the modern tendency is to use active filters for low- frequency applications. However, cross- over filters for use in loudspeaker systems are often still of the passive type. In this article a number of filter designs complete with formulas for their practi- cal realization will be described. These considerations will be confined to low- pass sections, since these form the basis of all other types. High-pass filters are a direct derivative of low-pass sections, while band-pass networks with a fairly wide response are constructed from a mix of low-pass and high-pass sections. Band-pass filters with a narrow response and all-pass filters will be considered later in the series. • One whose input and output ter- minating impedances are equal (primar- ily used in h.f. applications). This type of filter is normally constructed in a n- or T-shape as shown in Fig. 12. A num- ber of sections may be simply cascaded to form a C-L-C-L-C or an L-C-L-C-L network. Note that Ri is the internal source resistance. • One that is connected to a signal source with negligible internal resistance and terminated into an impedance Rl. Fig. 13. Passive filter connected to a source of negligible internal resistance and ter- minated in Re. Passive low-pass sections Two versions of passive low-pass section will be considered: This type, normally constructed in a T- shape (see Fig. 13), is used primarily in low-frequency applications. Several sec- tions may be cascaded to form an I^C- L-C-L network. For clarity’s sake, the sections are shown with an odd number of capacitors and inductors, although an even number is perfectly permissible (for instance, one capacitor and one inductor). Other combinations of input and output impedance are, in principle, possible, but the two versions described here will suf- fice for the vast majority of passive filter applications. The tables, given later in the series, show the component values for each of the two versions at a frequency of 1 Hz. The value of the inductor, L ', at the required cut-off frequency is calculated from: L' =LRi/f [7] Fig. 12. Passive filters with equal inpul and and that of the capacitor, C\ from: output impedances (Ri = Ri.): (a) n-type; (b) T-Type C' = C//Rl Active low-pass sections Configuration with voltage follower. The simplest form of active low-pass sec- tion, shown in Fig. 14, uses an opamp connected as voltage follower. Amplifi- cation in the pass-band is unity. This type of filter should be driven from a signal source with very low internal im- pedance. The output impedance of the Filter is also very low. Fig. 14a shows a two-pole version (one pair of conjugate poles), whereas Fig. 14b illustrates a three-pole type (one pair of conjugate poles and one real pole). The three-pole version can be used only in odd-order layouts in view of its single real pole. Depending on the required function, a number of these sections may be cas- caded. For instance, for a sixth-order filter three two-pole sections need to be connected in series; for a fifth-order net- work, a two-pole section is connected in series with a three-pole version. A func- tion requiring an odd number of poles may also be realized with a number of two-pole types followed by a passive RC [ 8 ] network as shown in Fig. 15a. If the in- put impedance of the circuit connected to the filter output is so high that it may be ignored, a buffer terminating the RC network is not needed. In other cases the circuit of Fig. 15b may be used, in which the amplification of the opamp may be set with the aid of resistances Ra and Rn (amplification A = \+Ra/Ru). Fig. 15. A real pole may be obtained from a simple RC network (a). The addition of an opamp (b) enables buffering and amplifi- The transfer function of the two-pole filter in Fig. 14a is: 7(/co)=l/[CiC2(/co) 2 +2C2(/aj)+l] [9] in which all resistors have been given a value of 1. The value of the two capacitors as a function of the real and imaginary part of the complex pair of poles may be computed from: Ci = l/2tta [101 Ci = a/2n(a ! + p 1 ) [11] The transfer function of the three-pole network in Fig. 14b is: r(/co)=l/[CiC2C3(/co)’ + + 2Cj(Ci+C 2 )(/= lOp; 16 V Ci;Ci< =3n9 Cj- 100p;16 V; axial C»:Cir = 10n Cr - lOOn Ci = 47p; 16 V; axial Cn 9 220p Cu=22p; 16 V: axial C.i = 15n Cii=4p7: 16 V: axial Ci«=220|i; 16 V; axial Cia = 330n Ci9 = 820p Semiconductors: Di= red LEO ICi=TDA1002A - * ICt=78L10' Miscellaneous: Si = miniature 4-pole toggl 4-track recording/playback for cassette recorder. tg/playback amplifier. an infuriating electronic nuisance Practical jokers will want to hide the circuit in such a way that it will take some time to find it. For this reason, it must be small; furthermore, it will have to be battery-powered — a mains cable would be a dead give-away. The circuit described here fulfils both requirements; it fits or. a small p.c. board and is powered by a small 9 V battery. The light sensor is an LDR. In the dark, its resistance is quite high; preset potentiometer PI is adjusted so that the inputs of the CMOS gate N1 are just at logic zero under these conditions. The calibration procedure will be described later. The two CMOS gates. N1 and N2, are connected as a 'trigger' circuit. When the voltage at the inputs of N1 falls below the trigger threshold, the output of N2 switches to logic zero. Transistor T1 is turned off. and Cl can now charge up through R5. The voltage across Cl rises so slowly that it takes a few minutes for it to reach the upper trigger threshold of the second trigger circuit, N3 and N4. At that point, the output of N4 swings up to logic one - i.e. practically the full supply voltage. This takes the reset input of the 555 timer (IC2) high, enabling this 1C. The 555 is used in an oscillator circuit, driving a loudspeaker, so that an irritating tone is produced. Have you ever been kept awake by a cricket? You switch off the light and snuggle down, and just as you're drifting off to sleep the insect starts to make an irritating noise. As soon as you switch on the light to look for it, it stops again. Tracking down this type of noisy nocturnal nuisance can be infuriatingly time-consuming. The same result can be obtained electronically. What's the point? Well, just for the fun of it. victim turns on the light to for the source of the noise, the resistance of the LDR decreases sharply. The trigger circuit (N1/N2) changes state, turning on T1. Cl discharges rapidly through R4, the output of the second trigger circuit goes 'low' and the oscillator is turned off. When the light is switched off again, the circuit again waits a few minutes before making a noise. Very infuriating . . . Calibration Preset potentiometer PI must be adjusted so that the inputs of N1 are at logic zero when the circuit is in the dark. The easiest way to do this is to connect a voltmeter to the output of N2. First. PI is adjusted so that this output swings up to nearly full supply 1 4.57 voltage; then PI is turned back until the output switches to the 'low' level (practically 0 V) - with the LDR in the dark, of course. This completes the calibration. The time delay, from the moment the light is turned off to the first squeak from the oscillator, can be modified according to personal taste by altering the value of Cl. In the same way, a different frequency can be obtained by selecting a different value for C2. The ratio of resistor R9 to RIO determines the type of sound obtained. Finally, the sound level depends on R8. Note, however, that this resistor should not be less than 100 f2. Any loudspeaker impedance from 4 n up can be used; the higher the impedance, the louder the output. M SMALL 8 BIT A-TO-D CONVERTER The TLC648 and TLCS49 from Texas In- struments are each complete data ac- quisition systems on a single chip. Each contains an internal system clock, sample-and-hold, 8-bit A/D converter, data register, and control logic circuitry. For flexibility and access speed, there are two control inputs: I/O Clock and Chip Select (CS). These control inputs and a TT-fr-compatible three-state output facilitate serial communications with a microprocessor. A conversion can be completed in 17 jjs or less, while com- plete input-conversion-output cycles can be repeated in 22 ^s for the TLC548 and in 25 ps for the TLC549. The internal system clock and I/O clock are used independently and do not re- quire any special speed or phase rela- tionships between them. This in- dependence simplifies the hardware and software control tasks for the device. Due to this independence and the internal generation of the system clock, the control hardware and soft- ware need only be concerned with reading the previous conversion result and starting the conversion by using the I/O clock. In this manner, the internal system ' clock drives the 'conversion crunching’ circuitry so that the control hardware and software need not be con- cerned with this task. When CS is high, the data output pin is in a high-impedance condition and the I/O clock pin is disabled. This CS con- trol function allows the I/O Clock pin to share the same control logic point with its counterpart pin when additional TLC548 and TLC549 devices are used. This also serves to minimize the re- quired control logic pins when using multiple TLC548 and TLC549 devices. The control sequence has been de- signed to minimize the time and effort required to initiate conversion and ob- tain the conversion result. A normal con- trol sequence is: 1. CS is brought low. To minimize errors caused by noise at the CS input, the in- ternal circuitry waits for two rising edges and the a falling edge of the inter- nal system clock after a CS1 before the transition is recognized. However, upon a CS rising edge, DATA OUT will go to a high-impedance state within the tdis specification even though the rest of the IC’s circuitry will not recognize the tran- sition until the tsuicsi specification has lapsed. This technique is used to pro- tect the device against noise when used in a noisy environment. The most signifi- cant bit (MSB) of the previous conver- sion result will initially appear on the DATA OUT pin when CS goes low. 2. The falling edges of the first four I/O clock cycles shift out the 2nd, 3rd, 4th and 5th most significant bits of the previous conversion result. The on-chip sample-and-hold begins sampling the analog input after the 4th high-to-low transition of the I/O Clock. The sam- pling operation basically involves the charging of internal capacitors to the level of the analog input voltage. 3. Three more I/O clock cycles are the applied to the I/O pin and the 6th, 7th and 8th conversion bits are shifted out on the falling edges of these clock cycles. 4. The final, (the 8th), clock cycle is ap- plied to the I/O clock pin. The on-chip sample-and-hold begins the hold func- tion upon the high-to-low transition of this clock cycle. The hold function will continue for the next four internal clock cycles, after which the holding function terminates and the conversion is per- formed during the next 32 system clock cycles, giving a total of 36 cycles, After the 8th I/O clock cycle, CS must go high or the I/O clock must remain low for at least 36 internal system clock cycles to allow for the completionof the hold and conversion functions. CS can be kept A new conversion may be started and the ongoing conversion simultaneously aborted by performing steps 1 through 4 before the 36 internal system clock cycles'occur. Such action will yield the conversion result of the previous con- version and not the ongoing conversion. For certain applications, it is necessary to start conversion at a specific time. This is achieved by stopping the I/O clock after the leading edge of the 8th pulse. Conversion is started by making the I/O clock low at the desired time. During the period when the I/O clock is high, the sample-and-hold .will continue to sample the analogue input. .4.59 10 REM COMPUB0ARO TEST PROGRAM FOR 8 BIT AO-CONUERTER TLCS4B/549 20 REM 30 PORT’ = 0FDH: REM CS = I , clock - 40 REM HA I HL OOP * 50 DO: REM a ° Forever G0 G0SU6 1000 70 PRINT -AD-value • ' . 80 PRINT US1NGOII * , VALUE, CR . 000 REM READ CONVERTER 010 PORT I = 0F9H: 020 VALUE ‘ 0 030 FOR BITCNT - 8 TO 7 040 VALUE - VALUE *2 > . OR . t PORT I . AND. 01 050 PORT’ - CFBH: PORT I • 0F9H: 050 NE>.T BITCNT 070 FORT I - 0FDH: 080 RETURN low during periods of multiple conver- sion. When keeping CS low .during periods of multiple conversion, special care must be exercised to prevent noise glitches on the I/O Clock line. If glit- ches occur on the I/O Clock line, the I/O sequence between the micropro- cessor/controller and the device will lose synchronisation. If CS is taken high, it must remain high until the end of con- version. Otherwise, a valid high-to-low transition of CS will cause a reset con- dition, which will terminate the conver- sion in progress. The circuit shows how two converters may be connected to a Type 8051 or Type 8048 controller. It is, however, also possible to connect fewer or more than two converters. The program shown is a test aid for con- verters connected to a Type 8051. If the ports of the 8051 shown are already oc- cupied, or if something else has been connected to the other lines of port 1, the program must be suitably altered (the highest bits of PI must be logic high). The supply voltage is used as the refer- ence voltage, which obviates the use of external components. The differential reference input does, however, offer full freedom in choosing a different refer- ence voltage. The total conversion error introdu by the converter is 4^0.5 LSB w U:cl=5 V. The current drawn by the IC is 3 CALSOD, A LOUDSPEAKER DESIGN PACKAGE Until recently, computer-aided loudspeaker design and optimizing could only be implemented on mainframes. Fortunately that has changed, and a new, comprehensive, design package, CALSOD, is now available for PCs as well. This article reviews CALSOD, and reports on its use in a practical test. Designing a good-quality loudspeaker box invariably requires solid background knowledge, a lot of time, and reliable test equipment. If any one of these three ingredients is lacking, the final design will almost certainly fail to give satisfac- tory results. Serious designers will no doubt have the relevant equipment and background knowledge, but often lack time to go through the stages of testing and redesigning the box. The design of a multi-way loudspeaker system invariably commences with setting up a theoretical model on the basis of available data on the drive units to be used. Next, a proto- type is built to clear the way for practical tests. Measurement results generally de- viate widely from those expected on the basis of the calculations. This is so because it is very hard, if not impossible, to include each and every parameter in the calculations. Filter response, im- pedance, frequency and phase characteristics of the drive units are all fairly simple to determine on their own, but complex calculations in simulation programs are required to predict their combined effect, leading up to the total response of the filter and drive units. Unfortunately, the development and use of such simulation programs is the ex- clusive domain of leading loudspeaker manufacturers. Not only the software in- vestment, but also the mainframes used for running these programs are well out of reach of individual box designers and small companies. The arrival of CALSOD has changed this radically. Other software packages for loudspeaker design and optimizing, offering a price/performancc trade-off at least equal to that of CALSOD, are, to the best of our knowledge, not available. Computer-aided design CALSOD stands for Computer-Aided LoudSpeaker Optimizing and Design. Although ‘Design’ would normally precede ‘Optimizing’, the acronym covers the function of the package very well. A series of extensive tests with CALSOD has spurred our enthusiasm about the program. The redesign feature of the program was tested on existing loudspeaker systems. Remarkably, CALSOD’s computed response was found to correspond exactly with the measured response. CALSOD is actually a set of -sub- programs that together offer the possibilty to calculate everything a designer needs to know to achieve opti- mum results from the available drive units, whose technical characteristics are first entered in the program (impedance, frequency and phase response; Thiele/Small parameters, if available). Obviously, accuracy of the computed results is determined to a large extent by the accuracy of the input data. A num- ber of fairly simple program modules then allow converting the measured curves into a kind of equation used for processing by the program. Examples of available filter modules include one capable of generating a second to fifth- order Butterworth characteristic, one representing the response of a drive unit in a closed box, a bass reflex box, a passive radiator, and so on. Small ir- regularities in a response curve can be simulated accurately with the aid of so- called ‘minimum phase equalizers’, which are essentially tuned circuits whose resonance frequency, Q (quality-) factor, and amplification or attenuation can be specified by the user. After the curves have been simulated with the aid of modules, these can be ‘fitted with’ the appropriate filters. All data is put into a text file that looks similar to a netlist for SPICE. The inte- grated word processor is then used for making a file for each loudspeaker. The file contains the component values, and the way components are connected to nodes in the network. Global values can be entered for filter specifications, e.g., representing an ideal filter terminated in a pure resistance. Next, the target response curve is speci- fied, e.g., that of a fourth-order Linkwitz filter dimensioned for a cut-off frequency of 5 kHz. The file with all data is then read into the program, after which network analysis is performed. The user is then in a position to study all the relevant parameters: frequency and impedance characteristics of the box, output voltage of the filter, input im- pedance of the loudspeaker(s) plus filter, and the acoustic output signal of the box plus filter. The target response curve can be projected over the measured response, so that deviations can be assessed before the optimizing process commences. CALSOD changes component values in the filter until the acoustic output signal is a reasonable approximation of the target specification. The user is in a pos- ition to state beforehand which compo- nents may be redimensioned by the program. All loudspeaker sections arc processed in this way to obtain a larger file that contains optimized data for all sections. The complete system is then ready for analyzing. Individual curves can be displayed separately, as well as the sum signal produced by the loudspeakers, measured at a predefined distance from the box. CALSOD even offers the possi- bility to indicate vertical and horizontal position of the loudspeakers on the front panel of the box, as well as inter- loudspeaker distance relative to the listening position. This facility allows studying the effect of, say, a 3 cm displacement of the tweeter, or a 10 cm displacement of the listener. Finally, CALSOD is a capable of optimizing the complete system, working effectively towards the realization of the target response. Practical and with plenty of options CALSOD is a well-designed and remarkably practical program that will prove invaluable to the designer who knows what he is doing. Evidently, the program is and remains but a tool that works on the basis of the user’s ex- perience gathered from previous loud- speaker designs. None the less, this tool greatly simplifies formerly often tedious and time-consuming work. The optimiz- ing procedure can provide really good results, and the options for analysing a complete system are unique. On a less positive note, the program is fairly cumbersome to work with. As in SPICE, changing a single value in the input file is basically simple, but time-consuming. Before a new analysis can be performed, the user must return to the word pro- cessor, change the text where appro- priate, load the modified file into CALSOD, and restart the analysis. Remarkable in view of the fairly heavy calculation load, the review package of CALSOD did not support the use of a maths co-processor in the PC. 1 4.61 “BATTERY LOW” INDICATOR by J. Ruffell Today there are innumerable pieces of equipment that are powered by batteries, both dry and rechargeable. In many cases, it is difficult to determine whether those batteries are still fresh or fully charged or if they need replacing or recharging. Here is a small circuit that monitors the battery voltage and gives an audible warning when that voltage becomes too low. The indicator described here is small enough to enable it being Fitted inside the battery-operated equipment, such as a portable shaver or receiver. It draws a current of not more than 1 mA, so that it does not noticeably increase the load on the battery. Circuit description The circuit is based on two opamps that are housed in Type TLC272 chip. Opamp Al, connected as a comparator, compares the battery voltage, applied to the inverting input via potential divider R1-(R3+P1), with a reference voltage of about 4.7 V that is applied to the non- inverting input. Owing to the low zener current, the reference voltage is not always exactly 4.7 V. However, when the battery voltage drops, the potential at the inverting input decreases much more rapidly than that at the non-inverting one, so that the comparator always toggles at the same battery voltage. That voltage may be set very accurately by PI. When the battery voltage is at a normal level, the potential at the inverting input of Al exceeds the zener voltage. The out- put of the comparator is then virtually nought. When the zener voltage exceeds the voltage across R3 + P1, the compara- tor toggles, which causes the level at its output to rise to that of the battery voltage. Capacitor C2 is then charged slowly via R5. The potential across the capacitor (at the inverting input of com- parator A2) is compared by opamp A2 with the voltage at its non-inverting in- put. Because of the feedback via R7, that voltage does not have a fixed value, but that does not matter in this circuit. When the potential across C2 has at- tained a value that is higher than that of the voltage at the non-inverting input of A2, the output of this opamp goes low. Darlington Tl, and consequently buzzer Bzl, is then switched on. The buzzer is a d.c. type with built-in oscillator. In this condition, the potential at the non- inverting input of A2 is pulled down a few volts via R7; in other words, there is a degree of hysteresis. Because of that, 4.62 elektor india aptll 1989 the buzzer will continue to draw current from C2 until the potential across the ca- pacitor (and thus at the inverting input of A2) has decreased by a few volts. The comparator then toggles so that its out- put goes high, which renders the buzzer inactive. From then on C2 charges again and the process repeats itself until the quipment is switched off and the battery is replaced or recharged. The indicator is suitable for use with battery voltages between 4.5 V and 15 V. When a Type TLC272 IC is used, the cir- cuit draws just under 1 mA. Use of a Type TLC27L2 reduces this to 250 nA at 9 V. Construction Since the whole circuit consists of only 15 components, it is easily constructed on a small piece of prototype or vero board. The shape of this should be adapted to the space available in whatever equipment the indicator is to be used. The circuit is preset as follows. Assum- ing that the battery voltage is 9 V, the buzzer should start operating at about 7 V. Connect a regulated, variable power supply to the circuit and set its output to precisely 7 V. Turn PI to maximum re- sistance. With a multimeter, measure the voltage at the output of Al (test point A): this should be virtually nought. Slowly turn PI until the output voltage of Al suddenly rises to 7 V: this is the correct setting of PI. Within a few seconds, the buzzer should sound. The indicator can then be fitted into the relevant equipment. Its battery connec- tions should be soldered to suitable take- off points behind the on-off switch. To put your mind at rest: the title does not imply that the circuit described here enables a computer to see. But if you want to use your computer for controlling external equipment without connecting this direct to the computer, the proposed circuit will 'keep an eye' on certain output signals of the computer and on that basis switch the equipment on and off. In other words, it provides an optical coupling between the computer and the equipment to be controlled. This does imply, of course, that a monitor screen is available and that the computer has some graphics facilities. Otherwise there would not be much to see for the eye! computer eye control by monitor screen The circuit is based on an opto-electronic comparator as shown in figure 1. The 'eye' proper is formed by two light-dependent resistors — LDRs — R1 and R2. The voltage level at their junction is applied to the inverting input of the comparator, IC1, via R4. The non-inverting input of 101 is held at a fixed reference voltage. The comparator toggles when the level at its pin 2 is lower than the reference voltage. Transistor T1 is then on, and the relay is actuated. At the same time, T2 conducts, so that the LED, Dl, lights to indicate the state of the circuit visually. When the level at the inverting input of the comparator is higher than the refer- ence voltage, the relay is not energized, and Dl is out. The idea is that the control program includes instructions which cause two light areas to appear on the monitor screen as required. The intensity of one of these areas should be constant, while that of the second should be either low or high (dark or light). The preferred mode of operation is for the second area to be dark when the external equipment should be switched on, and bright when it is to be switched off. The LDRs should be attached to the moni- tor screen where the two light areas appear. The voltage (about 2 Vpp) at the junction of these resistors is a measure of the difference in brightness between the two light areas on the screen. Super- imposed on this voltage is, of course, the sawtooth voltage produced by the SO Hz line scan oscillator. Resistor R4 and capacitor Cl, and to some extent PI, ensure that this sawtooth voltage does not 1 affect the correct operation of the com- parator. Construction of the circuit is not critical: all components, except the LDRs, are fit- ted on a small prototyping board. The LDRs are connected to this board by suffi- ciently long pieces of stranded equipment wire. It is recommended to fit them in suitable shrink sleeves or swathe them in insulating tape in such a way that only the light of the two areas on the screen falls onto them (see photograph). They can be attached to the screen with some self- adhesive tape. If the equipment to be con- trolled is switched on when it should be switched off, and vice versa, simply inter- change the LDRs. Presetting of the comparator is not critical as long as the change-over frequency of the two light areas is of the order of 1 Hz. In that case, PI is simply set so that the relay is actuated and de-energized in rhythm with the change-over frequency. When that frequency is higher, eg. when the circuit is used for data transfer, the presetting of PI becomes more critical. The maximum allowable change-over fre- quency depends on the cut-off frequency of the low-pass filter, R4/C1, which here is less than 10 Hz. Optimum setting of PI is then best achieved by applying a square- wave voltage at a frequency of about 8 Hz to the comparator input. Measure the out- put at pin 6 with an analogue voltmeter (10 V d.c. range) and adjust PI so that this level is half the value of the supply voltage. Although the pointer of the voltmeter quivers somewhat, the setting can be carried out without any trouble. If you have an oscilloscope, it is, of course, preferable to use that for the presetting. Note that the current through the relay coil should not be too high: when a BC 547 is used for Tl, it should not exceed 100 mA. That means that the resistance of the coil should be not less than 50 S for a supply voltage of 5 V, and not less than 90 Q at 9 V. The rating of the relay contacts depends on the equipment to be con- trolled. Current consumption of the circuit amounts to only a few mA plus the current drawn by the relay coil. For data transfer operation only, the relay is not required: the signals are then taken direct from the collector of Tl. K Did you know. . .? Robot has come to mean an intelligent and obedient but impersonal machine; it is derived from the Czech robota — forced labour. The word robot was first used in Karel Capek's play Rossum's Universal Robots (1920). (OED) Gain is a ratio, normally expressed in dE For an amplifier it is the ratio of output power to input power; for an aerial, it is the ratio of the voltage produced by a signal entering along the path of greatest sensitivity to that produced by the same signal entering an omnidirectional aerial. Although often used as such, it is not synonymous with amplification, which is a number indicating by how many times an electronic device increases an electrical signal. Gain is, therefore, 10 or 20 times the logarithm of the amplification, depen- ding on whether that refers to a power or a voltage increase. H NEW PRODUCTS Coil Winding Machine Arsun Engineer offer hand operated coil winding machine for winding a variety of coils, using 0.913 to 0.06 mm (20 to 46 SWG) enamelled copper wires. Any type of bobbin square, round or rectan- gular can be would on the machine. The machines sturdy in construction having mechanical cast iron, brass plate pinion and bevels gears of steel. The shafts are mounted on bearings for smooth running of the machine. The wire from the real is guided by a pulley on reel carrier and two pulleys fitted on the carriage, which is guided on two inverted V ways for high accuracy. The traverse of whole carriage assembly is by means of lead screw and friction mechanism and its direction is reversed manually at the end of each layer by a movement of lever, while the machine is in running condition. A quick reset type six digit revolution counter is provided for counting the number of turns. This machine is suita- ble for regular productions as well as small quantity prototype developments, repair shops, technical Institutions and maintenance departments. M/s. Arsun Engineers • S6/1, Vithalwadi Industrial Estate • Bhavnagar-364 001 (Gujarat). Digital Vibration Meter The digital vibration meter V-l 103 from Shiken Co of Japan has a charge amplifier input circuit. It offers shock ac- celeration measurements using Peak Hold performance and random vibration measurements using true RMS calcula- tions, adding to general vibration mea- surements of acceleration, velocity and displacement. Provisions are made for low cut and high cut filters, and AC DC and digital out- puts. As it employs a two-way power supply system of AC and car battery sup- ply, the instrument is suitable for laboratory or field use. M/s. Murugappa Electronics Ltd. • Agency Division • 29, llnd street • Kamaraj Avenue • Adyar • Madras 600 020 • Phone: 41 33 87 • Electronically Temperature Controlled Soldering Station. Reliance Electronics offer an electroni- cally controlled soldering station that controls and monitors the temperature of the tip of the soldering iron to the pre- determined set value in the neighbour- hood of ± 5%. The instrument utilises thyristor power control and the tempera- ture range can be adjusted from 170±C to 450°C. Protection of the tip from vol- tage spikes and magnetic fields is en- Three-degit LED is provided to know the tip temperature. Compact size, flame-proof skeeving of the solderiing iron, and lightweight soldering iron with iron-coated tips are the features. Operating input voltage can be 230 VAC ± 20% , and output voltage power can be M/s. MRK & Brothers Engineers. • 310 A, Commerce House • Nagindas Master Road • Fort • Bombay-400 023 • up Based Digital Printer Hoshakun have developed a microp- rocessor based digital printer in two types, one to accept only one input and the other up to 16 inputs. A normal 18 column numeric printer is used to print the date received from outside paramet- ers like temperature pressure, pH, etc. It accepts the signal in terms of D.C. mV/ mA current, any thermocouple or any PRT bulb input. A built-in 5— digit red LED indicates either the measured parameter like °C Dc or the real time clock. The software is user-friendly i.e. after the instrument is switches on, a series of questions will appear on the dis- play. the user is supposed to enter the data, in response to the questions asked by the instrument. For the thermocouple input the linearisation is a standard fea- ture. Printing interval is programmable from 01 minute to 99 minutes. Battery back-up can be supplied optionally. In case of multi-point, the user can state the type of input and the range for each of the input and this can be programmed. M/s. Hoshakun • Vivek Appartments • Plot No. 15 • Tulsibagwale colony • Sahakarnagar No. 2 • PUNE-41 1 009 • NEW PRODUCTS Humidity Dry Bulb Temperature Recorder Minicorder-870 combines analogue and digital instrumentation techniques in an instrument to provide both digital dis- play of % RH and dry bulb temperature and strip chart record of the values at 12" hour. The recorder employs latest solid- state sensor. It is housed in an ultra com- pact cabinet of 144 x 144 mm and record- ing mechanism consists of only 3 sub-as- semblies. The recorder can be com- manded to record continuously cither re- lative humidity or dry bulb temperature or alternatively both. Two displays provide continuous read- ings of the parameters. Even 15 days of continuous recording is possible. A choice of two types of sensors is availa- ble. Instrument Research Associates Pvt. Ltd. • P B No. 2304 • No. 228 • Magadi Road • Bangalore-560 023 • 350830 355836 • Programming Module Professional Electronic Products offors advance Bipolar Programming Module PGM 8530, which can be used with PEP's Universal Prom Programmer PP- 85. PGM 8530 is capable of program- ming Bipolar PROM’s of Signetics, Na- tional Semiconductor and Texas Instru- ments. A Comprehensive user manual is supplied alongwith the system for opera- tion of PGM 8530. Some proms of diffe- rent make are listed which can be prog- rammed through PGM 8530. Signetics 825-23, 123, 126, 129, 130, 131 137, 135, 147, 195, 115, 140, 141, 180, 181, 270, 183, 191, 321 etc. National Semiconduc- tors 74S/54S-188 288, 287, 387, 570, 571 , 572, 573, 184, 185, 472, 473, 474. 475, 180, 181, 190, 191, etc. and I. I’s 24S-10, M/s. Professional Electronics Products • Opp. Old Octroi Post • Delhi Road • P.B. 316 • MEERUT-250 002 (U.P.) • Phone: 20460, 20159 • Breakdown (Flash) Tester Arun offer a high voltage breakdown (flash) tester for output capacity of 0 to 3 KV, 0 to 5 KV, and 0 to 10 KV with leak- age current of 3 to 200 mA in different models. Voltage and current are indi- cated on two seperate square moving coil type panel meters. Accuracy of measure- ment is +5%. A safety measure is the audio-visual alarm devision the front panel when HT is on. The HV tester is useful for checking breakdown (flash) voltage of insulation material, electrical and electronics com- ponents, motors, transformers, switches, chocks, coil, oil, varnishes, re- lays, etc. M/s. Arun Electronics Pvt. Ltd. • 2 E, Court chambers • 35 New Marine Lines • Bombay-400 020 • Tel: 259207/252160 Proportioning & Dispensing System The Model I&J 100 is a proportioning and dispensing system for spoxy , polyes- ter, polyurethane, silicone and other two component resin formulations. Its, fea- tures includes: accurate and automatic proportioning and dispensing flowable liquids and pastes; positive displacement piston metering; ratio adjustment from 1:1 to 100:1; pressure feed reservoirs from 6 ounces capacity to 5-gallon; au- tomatic pushbutton dispense switch; and 3-way recharge/dispense valves with air operator actuator. I&J Fisnar Inc., 2-07 Banta place • Fair Lawn • N.J. 07410 • U.S.A. • Temperature Indicator/Controller Hoshakum analogue temperature indi- cator/controller Type: ATICB-003 is av- ailable in range of from 200 to 1600°C with suitable sensors like Cr/Al.Fe/ Const, thermocouple and Prt bulb also. Automatic ambient temperature com- pensation and broken sensor indication are incorporated. The instrument is 230 VAC mains operated and conforms to DIN standard panel cutout. M/s. Hoshakun • Vivek Appartments • Plot No. 15 • Tulshibagwale colony • Sahakarnagar No.2 • PUNE-411 009 • NEW PRODUCTS Metallurgical Microscope Vaiseshika offer the metallurgical mic- roscope Type 7001 to conduct critical examination of metallurgical samples. Optical detection of surface ir- regularities/inclusions and faults in met- als can also be observed with the micros- cope. The instrument reveals significant specimen details with relief in black and white or brilliant colours. It has ac- hromatic objectives of 10 x and 45 x and wide field eye pieces of 10 x and 15x. These superior optic combinations pro- vide a wide magnification range of from 25 x to 2500 x. Inaddition, coarse and fine focusing arrangements enable verti- cal displacement with 5 micron resolu- tion. Perfect observations are facilitated through optically aligned illumination system. Spring loaded optics offer safeguards against pressure and errone- ous operations. Special provision is made for rapid sliding of specimen plat- form to accomodate bigger specimens. The instrument, is housed in a wooden cabinet; comes with an illustrated in- struction manual for complete installa- tion of the equipment with built-in trans- former for illumination. M/s. Vaiseshika Klectron Devices • Post Box No. 57 • Near Allahabad Bank • Ambala Cantt-133 001 (India) • Signal Generator Equilab Model TP-707 is a solid state AF-RF signal generator covering the range of 420 kHz to 24 MHz in four ranges. It works on 3 V battery. Its sim- ple operation mechanical stoutness and clear scale reading make it suitable, to measure comparative gain and sensitiv- ity in broadcast receiver. M/s. Electronic Instrument Laboratories • B-69/004, Anand Nagar • Chhatrapati Shivaji Road • Dahisar (East) • Bombay-400 068. Electronics Maintenance Cleaner Accra Pac (India), in collaboration with Accra Pac Inc., USA, have introduced the Safeguard Contact Cleaner for elec- tronic maintenance. The cleaner is a spe- cially formulated solvent which restores electrical continuity of all types of con- tacts and controls. Expceptionally pure solvents under high pressure quickly penetrate surface pores removing grease, dirt, oil and oxidation, and evaporates quickly leaving behind abso- lutely clean contacts. It is said to have ex- cellent dielectric properties and improve performance and reliability of all elec- tronic equipment. The non-flammable, non-toxic. Safegard Contact Cleaner is useful for silver and precious metal contacts, TV turners, miniature controls, solenoids, circuit breakers, potentiameters, selec- tor switches, volumes and tone controls, relay contacts, thermostat control, dis- tribution panels and all other electronic/ electrical contacts. Accra Pac (India) Private Ltd. • 917, Raheja Chambers • Nariman Point • Bombay-400 021 • Coil Winding Machine The 152NC and 154NC vertical deflec- tion yoke coil winding machine are CNC machines that give flexibility and facilities without compromising on the throughput. The winding specifications can be fed into the NC device manually through keyboard retained, and recal- led. The rotational axis and axial feed are perfectly synchronised. Feeding and making programmes are simple. The model 152 NC can wind 2 half coils at a time while 154 NC winds 4 coils at a time. The machine comes with standard accessories like the core chucks and bob- bin support devices. The speed of wind- ing can be 1200 RPM. The 152 NC are particulars suited for handling vertical coils of various specifications. M/s. Muragappa Electronics Limited • Agency Division • 29 Ilnd Street • Kam- raj Avenue • Adyar • Madras-600 020 • Phone: 41 33 87 • LEARN-BUILD- PROGRAM The Junior Computer book is for anyone wishing to become familiar with microcomputers, this book gives the opportunity to build and program a personal computer at a very reasonable cost. The Indian reprint comes to you from elekt©? Send full payment by M.O./I.P.O./D.D. No Cheque Please. Packing & Postage free to: EfckTOR ElECTRONICS pVT It(J. 52-C. Proctor Road, Grant Road |E). Bombay-400 007.