ISSN 0970-3993 COMPUTER CONTROLLED SLIDE FADER 2 * Radio communications of the future , A new multilayer process for integrated passive devices Parametric equaliser ■' y - ■ Volume-6 Number 5 May- 1988 CONTENTS Editorial All in one 5.05 Components A new multilayer process for integrated passive devices 5.21 Computers Computer management systems take over 5.23 Second generation programmable logic 5.25 PROJECT: Stereo sound generator 5.32 Test & Measurement Dual trace oscilloscopes; a review (Part-5) 5.29 Audio 8i Hi-Fi PROJECT: Parametric equiliser — 5.36 Radio & Television PROJECT: Tuneable preamplifiers for VHF and UHF TV 5.44 Radio communications for the future 5.48 General Interest PROJECT: Computer controlled slide fader (1) 5.52 Information Telecommunication news 5.17 Electronics news 5.18 New products — ................................................. — ................... 5.60 Appointments 5.71 Guide lines Index of advertisers 5.74 Selex-34 PROJECT: Tormentor ALL IN ONE Front cover Experimental set-up of four slide projectors driver\by the computer-controlled slide fadder described in our issue. The age of ‘fwo-in-one' and 'three-in-one’, a combination of radio and cassette player, is being replaced by the 'four-in-one.' A wristwatch is not a mere wristwatch anymore. A Japanese firm has introduced a watch with which you can talk! The gadget can decipher your voice and understand your queries. Of course, the gadget should be made familiar with your voice so that it can synthesise the characteristic notes and use the data as a dictionary for decoding the speech. Dr. Raj Reddy of Carnegie Mellon University, whose talk on robotics is covered elsewhere in this magazine, has gone one step further. He informs us that the Japanese technology now has the limitation that the watch cannot understand the language if someone other than the owner spoke to it. unless it is re-tuned. Carnegie Mellon has developed a technology which is 'speech-independent', meaning the gadget can understand anybody's talk. The profound changes in the technology of computer, communication and Artificial Intelligence is bringing about a metamorphosis. Thus, the concept of a four-in-one is a distinct reality. There will be a portable electronic office. A small gadget will have audio and video facility, in addition to functioning as a computer, enabling, data, video and voice transmission. The idea of a phone in every home will be replaced by the slogan, a phone in every pocket. This micro-gadget can store a 1 00 pages of a daily newspaper. Should you think these are exotic gadgets meant only for Japan and the US, you are mistaken. As Dr Reddy predicts, low-power, battery- operated, cheap computer will dominate the future and the computer will have both speech and visual facilities enabling even an Illiterate villager to use the gadget. Less sophisticated the person Is, more sophisticated the machine will be. If transistors, two-in-ones, colour TVs and electronic telephone could make inroads into our villages, the days of four-in-one computers, functioning at the village panchayat office cannot be far behind. 1 5.05 TELECOMMUNICATION NEWS • TELECO LAUNCH OF IRS With the launching of the indigenously- built remote sensing satellite IRS-IA, India has joined the select group of na- tions, the USA, the USSR, France and Japan, in having such a sophisticated facility. India is the first developing coun- try to have a remote sensing satellite. IRS-IA, weighing 980 kg, is the heaviest satellite to be built by India and it is her tenth one to be put in orbit. Placed in polar sun-synchronous orbit, the satellite will cover the entire Indian sub-continent once in 22 days and help in the study of natural resources during var- ious seasons under identical conditions. The satellite is orbiting the earth over the poles at a height of about 900 km, taking 103 minutes for each orbit. The IRS-IA carries three linear imaging and self-scanning cameras which take pictures of 148 km-wide scenes in four different colours. The data will be re- ceived at the ground station near Hyderabad. The satellite will pass over India seven to eight times a day with each pass having a duration of five to ten mi- nutes. The data sent down will be equi- valent to some 4000 volumes of 300 pages each, roughly a good sized library of about 10,000 books each day. The Na- tional Remote Sensing Agency, Hyderabad, will receive, process and distribute the satellite data to several user-agencies within India and abroad. The IRS-IA is designed to operate for a minimum of two years. IRS data will be vital in areas like agriculture, forestry, geology and hydrology and its data would be the key element in the National Natural Resources Management Sys- The satellite IRS-IA was the seventh to be launched with foreign launchers and the fourth to go up from the Soviet Union. The other three satellites which were launched from the Soviet Union were Aryabhata (1975), Bhaskara-I (1979) and Bhaskara-II (1981). The In- dian National Satellites (INSAT-IA and IB) were launched from the United States. India’s first experimental com- munication satellite, APPLE, was launched by the European Space Agency. LOW-COST EARTH STATIONS The International Maritime Satellite Or- ganisation, Inmarsat, has approved the trial use of limited capability earth sta- tions (LCES) for the provision of telex services to ships and possibly other mobile units. The new stations could provide easy access to the Inmarsat satel- lites particularly for the developing countries and from areas where the exist- ing telecommunications infrastructure is inadequate or traffic requirement is fairly low. Currently operating earth stations with Inmarsat satellites are substantial and expensive installations. With large, steerable, parabolic antennas, averaging 13 metres in diameter, and the capacity to handle a large number of simultane- ous voice, data and telex calls, they cost several million dollars to build. There are now 20 such stations in the Inmarsat system, owned and operated by telecom- munications authorities or companies in the countries in which they are located. The new earth station will have an an- tenna of less than one metre in diameter and it will handle only a single telex com- munication channel at a time. It will op- erate in effect as a ship-to-ship link, through a main coast earth station. The Inmarsat council has agreed for a lower segment charge because of the restricted requirement of LCES. SATCOM IN BALLOON The National Aeronautics and Space Administration of the US will use sat- coms in a space project. The Inmarsat council has approved the installation of a modified ship earth station on a high-al- titude balloon. The SES will be carried on a “Supernova long duration space balloon flight”. The balloon, which will carry equipment for observation of a large supernova visible from the southern hemisphere, will use the satcom terminal for transmission of observational and navigational data through its flight. The balloon will travel from Australia to Brazil in a journey last- ing seven to ten days at heights up to 40 km, an altitude at which satcoms had not been used before. The satcom terminal is being supplied by the US firm. Radar Devices, under a contract worth 27,000 dollars. It will be a modified form of the firm’s satcoms ship earth station, normally sold to ships and yachts for communications through the Inmarsat system. The satcom unit will transmit 20 minute data stream every four to six hours via Inmarsat satellites to computers at the University of California’s Centre for As- trophysics and Space Sciences. Scientists will use the positioning data to make di- rectional changes in balloon course, which will maximise the observational opportunities. EUROPORT '87 Europort '87, held in Amsterdam showed the latest developments in elec- tronics for shipping and it was evident that movement towards electronics at sea is gathering force. In Satellite communication, the main at- traction was Standard-C which made a debut. Standard-C offers all satcoms facilities except voice over a tiny om- nidirectional antenna. Thrane and Thranc of Denmark is a forerunner in this field. The firm, STC, showed a mock up of a Standard-C. Marconi was dis- playing its new ship earth station, Oceanray 2, which has lighter, more rigid antenna (60 kg). Its target is the yacht market. The newly unveiled transportable ver- sion, Satpax, which is packed in two cases weighing 20 kg and 40 kg respec- tively also made its entry. A third case to carry the plug-ins such as computer, fac- simile, and UHF/VHF patch is also pro- vided. Airdrop cases are offered and the whole system is designed to a military specification. On display for the first time were two public phones which Comsat is promot- ing for use with the Inmarsat system. A credit card phone began extended trials in 1987. Interest has already been shown by cruise ships and offshore installations. Alongside was the system without credit card slot, dial or keypad. Here the caller is automatically connected to the operator at one of Comsat’s earth sta- tions and gives a card number or home phone number debit the charges before being connected manually. A number of other value-added services were being presented by Comsat, including an elec- ' tronic mailbox facility called Seabox, a packet-switching service, and a chequing facility, Cashcall, which uses a device to check a caller’s account and print out a cheque for cashing on board. NO MORE NIGAMS The Department of Telecommunica- tions does not favour the idea of creating more corporations like the Mahanagar 1 5.17 TELECOMMUNICATION NEWS • TELECO Telephone Nigam Ltd. Instead, it prop- oses to accord greater financial au- tonomy and decision-making powers to telephone exchanges in major cities and The main reason for dropping the crea- tion of nigams for big cities is that these are major revenue earning centres. Without these centres, network of smal- ler cities and town, would be starved of funds. Also, the government would be saddled with loss making centres, while the revenue earning centres would be taken away in the form of autonomous corporations. The department is considering a prop- osal to set up a separate financing agency for the telecommunication sector with a view to borrowing funds from the market for the entire telecommunication sector. DELAY IN RAX The scheme of introducing a rural au- tomatic exchange (RAX) a day from April 1 is likely to be delayed by at least three months. The delay is mainly due to the non-availability of required number of units. The unpreparedness of the seven RAX producers who have been given licence to produce them, DOT’S delay in grant- ing environmental clearance for testing the units developed by the C-DOT and the delay in identifying suppliers of back up components were among the other causes resulting in the postponement of the scheme. ELECTRONICS NEWS • ELECTRONICS N NIC OUT OF DOE The National Informatics Centre (NIC) of the Department of Electronics has been shifted and attached to the Plan- ning Commission. Dr. N. Seshagiri, di- rector-general of NIC, who was report- ing to the minister of science and technology now reports to the planning minister. Subsequent to this major pol- icy change, the DOE has been reor- ganised. A financing agency for elec- tronics has been cleared by the govern- ment in principle. The shifting of NIC from DOE was in- evitable because of its growing size. About 2000 experts work in NIC which is responsible for 57 departments, in addi- tion to advising all the state gov- ernments. The centre would bring 439 districts in the country under its satellite communication network. The union cabinet and the Electronics Commission felt that either a separate department should be created for NIC or it should be attached to a suitable minis- try. Hence, it is attached to the Planning Commission. The Planning Commission has to formulate the eighth five-year plan in a more relaistic manner with data from the districts. NIC, with its vast net- work, will provide the input to the com- mission. Following the reorganisation, DOE will have 14 divisions. The materials and components division will have three sub- groups namely microelectronics group, components group and special projects in components. The second division will be consumer electronics division. Con- trol and instrumentation division will look after power electronics, instrumen- tation and capital goods. The fourth will be the computers and communication di- vision. This division will look after software development, computer aided designs and rural information system. Other divisions are strategic electronics, information, planning and analysis, lib- rary and publication, manpower de- velopment, industry promotion, technology development, appropriate automation promotion and microproces- sor application. BOOST TO HI-TECH The Department of Electronics will launch a special drive to increase invest- ment in the high-tech electronic compo- nents sector. Despite liberalised invest- ment conditions, the private sector failed to set up hi-tech components units, which have an export potential. Now, in- vestments are likely to be made in the public sector. The seventh plan envisaged a turnover of Rs. 40,000 crores in the electronics sec- tor and components accounted for one- fifth of this. To achieve this target, an in- vestment of Rs. 850 crores was expected in the components sector. But, private units cocentrated only on consumer items like colour picture tubes and glass shell. The DOE is now making efforts to en- sure that the investments are made in areas such as manufacture of bi-polar ICs, multi-layer PCBs and surface mounted devices. State electronic corpo- rations would be encouraged to take these areas. Banks have been advised to provide finances to manufacturing these devices rather than supporting the im- port of electronic goods. The DOE has also plans to upgrade the Semiconductor Complex Ltd., Chan- digarh, for which an allocation of Rs. 11 crores has been made. Emphasis will be given to products which have ready mar- ketability and export potential. Initially, requirements of calculators and telecom- munication industry will be met. The de- partment has approved the setting up of two calculator units for manufacturing two million calculators. C-DACT AFTER C-DOT The proposed Centre for Advanced Computing Technology (C-DACT) will have the development of a supercompu- ter within five years as its major objec- tive. The goal is to make a machine with a peak computing power of 1000 megaf- lops within three years. Based on this parallel processing computer, a fifth gen- eration computer system will be de- veloped with a ratihg of one to ten mill- ion logical inferences per second (LIPS) in five years. The initial funding of the project, to be made by the Department of Electronics, is about Rs. 37.50 crores, including foreign exchange worth Rs. 12.50 crores. C-DACT, besides the computer project, will take up commercial products such as VLSIs and chips for personal computers, advanced board level products, parallel 5.18 eluklor india may 1988 ELECTRONICS NEWS • ELECTRONICS N processing workstations and software products. Under the Administrative control of the DOE, C-DACT will be a permanent sci- entific society and it will be modelled after the Centre for the Development of Telematics. Dr. Vijay K. Bhaktawar, a director in DOE, will be its first execu- tive director. Mr. K.R. Narayanan, minister of state for science and technol- ogy, and Mr. Sam Pitroda, adviser to the Prime Minister on technology missions, will be chairman and vice-chairman re- spectively of the governing council of the C-DACT. Other members of the council include Mr. K.P.P. Nambiar, secretary. DOE; Dr. Vasant Gowarikar; secretary, DST; Dr. R. Narasimha, director, National Aeronautical Laboratory; Prof. B. Nag, director, IIT, Bombay; Prof. V. Rajara- man, Indian Institute of Science, Banga- lore; and Dr. A Paulraj, Defence Re- search and Development Organisation. The existing supercomputer project and the fifth generation computer project at various centres like IIT, Madras, NAL. Bangalore, TIFR, Bombay and C-DOT will be co-ordinated by C-DACT. In another development, the Electronics Research and Development Centre of the Kerala government at Trivandrum will be taken over by the DOE. The ERDC will be developed as a regional centre. The DOE is taking over the centre as the state government is unable to find sufficient funds for the centre. MICROELECTRONICS An empowered committee of the gov- ernment of India on the microelectronics policy has suggested that indigenous de- signs should be protected from interna- tional competition through fiscal mea- The committee set up by the DOE has recommended that design centres be set up with protoyping facilities near elec- tronics industry clusters. The committee has also favoured commercial interac- tion between the chip manufacturing and assembly units and the industry. The expert group has laid emphasis on improving the competetive strength of the microelectronics manufacturers by giving them fiscal support. Investors are shy of entering microelectronics, fearing international competition. The special group was set up by the gov- ernment to evolve a separate microelec- tronics policy as this sector was not grow- ing in the country. While microelec- tronic devices are used in the developed world to the extent of 12 per cent, in India it is hardly one per cent. NUCLEONIC WEIGHER The Indian Institute of Technology, Bombay, has successfully tested and commissioned a microprocessor-based nucleonic weigher for use on conveyor belts to measure weight of materials like coal, coke, fertiliser, lime stone, iron ore and so on. Conventional weighing machines using load cells encounter errors of the order of plus or minus 10 per cent. Nuweigher technique, being a non-contact method, sustains the precision on measurement over very long periods withe the error not exceeding plus or minus half a per cent. This is a radioisotope device for in- dustrial application. The application of microprocessor has made the unit intelligent in that a single unit by suitable software can use diffe- rent isotopes like cobalt-60 Caesium-137 or Barium-132, corrected for decay and print out the total weight c t regular inter- vals on command. A single central pro- cessing unit can monitor five or more belt conveyor systems every second and log the weight. The technology, developed by Prof. B.S. Magal and Prof. V.P. Sundersingh of IIT, Bombay, is available for commer- cial exploitation from the deam (R & D), IIT, Bombay. MANAGING TECHNOLOGY A telephone and a television in a wristwatch, a cheap and simple compu- ter that can be used by a villager, a machine replacing the mother’s womb to grow a foetus, a dietary pill as substitute for food, a non-vegetarian tomato, pro- duced by cloning the gene of a calf with that of a tomato-these are products of emerging technologies in the next two decades. How will a professional man- ager cope with this change and exploit it? The Indian Institute of Management, Ahmedabad, to mark its silver jubilee year organised a seminar entitled “Man- agerial Response To Emerging Technologies” in Bombay. An expert in each field namely. Robotics and Artificial Intelligence, Electronics and Information Technology, Plastics and Petrochemicals and Biotechnology delivered a talk. Mr. V. Krishnamurthy, chairman. Steel Authority of India Ltd. , and Technology Information Forecasting and Assess- ment Cell, in his keynote address pointed out that success depended not so much on the capital or hardware equip- ment but on the technology we posses- sed. Technological strength charac- terised the emergence of new economic powers like Korea, Japan and Taiwan. Pleading for a phased technological change with a phased upgradation of the human resources, Mr. Krishnamurthy said: “We cannot move from primitive data entry machines to sophisticated, satellite-based computer networks over- night.” The chairman of Electronics Commis- sion opined that government should not run the industries and leave them to the private sector as the government was in- herently not suitable to manage the in- dustry . The private sector would perish if it was inefficient. Indian industry, having enjoyed the lux- ury of protected environment, fought shy of facing challenges. Managers should accept new challenges and be creative as the success or failure de- pended on the timely action taken by them, Mr. Deodhar said. Dr. Raj Reddy, university professor of computer sciences and robotics and di- rector of the robotics institute, Carnegie Mellon University, said the power of computers had increased 1000-fold in the last few years. If the automobile industry had progressed at the same pace, a Rolls Royce would have become available for five dollars and it would have had a speed of 50,000 miles per hour, running 500,000 miles for a litre of petrol. A supercomputer, now costing 10 mill- ion dollars may be available for a mere 10 dollars in the next 10 years. The technology is changing at such a fast pace, that the limits of physical laws would be reached in the next 20 years, leaving no scope for new development thereafter. At Carnegie Mellon an automobile that drives itself is being developed. It has two stereo cameras to detect million pixies. For this computation, at least a trillion operations would be needed, coupled with 1000 computer instruc- tions. To make the car take you to your home on its own, 10 billion operations would have to be carried out, Dr. Reddy cited as an example. 1 5.19 ELECTRONICS NEWS • ELECTRONICS N Self-operating, multipurpose micro fac- tories will be the mainstay of industries in future. These factories, based on com- puters, would accept designs, get in- structions through satellite and produce the goods locally. Problems could be sol- ved by contacting the computer and ex- perts need not fly to carry out repairs. High quality products can be made here using computer, communication and knowledge industries, employing local talent and labour. This will lead to mini- mal inventories, while capacity will be stockpiled. This technology, however, may result in a social problem. Low-cost labour will become increasingly unimportant. Loss of manufacturing jobs will be likely. But, what kind of new jobs would emerge cannot be even imagined today. Computer-aided simultaneous engineer- ing will enhance production capability. Rapid redesiging and prototyping will reduce costs. Large automotive man- ufacturing companies spent 100 weeks to make a new car lamp in the US while the Japanese did it in 50 weeks. Preparation of a plastic lens for the lamp involved time consuming, tedious study. Instead of the normal six days, a computer does it in 10 hours now. Tooling for injection moulding dyes used to take six to 12 weeks in the past. Now, computer-aided design and manufacturing enables the dyes to be made in less than 24 hours. The managerial problem now and in fu- ture will be to react to trends and cus- tomers’ response quickly. The industry cannot survive if customers’need is not rapidly satisfied. This implies that cus- tomer response should be obtained al- most every day. Short-cycle innovation to bring the products out quickly will be- come indispensable. Reverse engineer- ing will be the strategic point in future R & D and the workforce must be suitably trained to become expert reverse engin- ers. Thirty million TDA4600s Seven years ago, Siemens found a way of integrating the control circuit for switch- mode power supplies used in TV sets on a single 7 mm 1 chip. Since then, sales figures have reached 30 million for the bipolar TDA4600 and 10 million for the TDA4601 version (with extended voltage range: 80-270 V). Its ability to produce the required voltages at varying input voltages and loads in an economical way has made the TDA4600/4601 the unrivalled top product on the market, favoured by more than 200 customers throughout the world. An enhanced version, the TDA4605, using “Sipmos” transistors has now reached the production stage. As early as 1972, engineers at the Appli- cations Research Laboratories of Siemens had conceived the idea of using a flyback converter as a power supply for TV sets. Until then, the standard prac- tice had been to provide a rigid, and cost-intensive, coupling with the line fre- quency circuit. The introduction of the flyback converter drastically reduced the circuitry and components. The inte- gration of the entire control circuit on the TDA4600 further simplified the power supply section in the TV set. The improved reliability of power supplies equipped with the TDA4600 is reflected in the significant reduction in TV set failures over the past several years. New VME board from National National Semiconductor have intro- duced a high-performance 32-bit board- level system based on the company’s new NS32532 32-bit microprocessor, and is compatible with the widely used VMEbus standard. The new system, the VME532, can ex- ecute up to 10 million instructions per second (MIPs), the highest performance available in VMEbus CPU at present. The VME532 is an ideal solution for systems integrators building UNIX Systems V-based multi-user systems (64 to more than 200 users). It is also well- suited for high-performance board-level embedded control applications such as automated test equipment, factory auto- mation (robotics and machine vision), imaging applications, and aircraft flight simulators. Electronic fingerprint recognition An electronic fingerprint recognition system developed by scientists at Edin- burgh University’s electrical engineering department has received £500,000 back- ing to build a full-scale demonstrator and carry out field trials. The system was invented by the depart- ment’s Professor Pete Denyer and a prototype has already been built and tested. Potential applications for the device, which electronically matches a presented fingerprint against a memory store of ’’authorized” prints, include door and computer systems security and point of sale machines. Initial development work was supported by the Quantum Fund, which is backed by the British Linen Bank, the Scottish American Investment Company, and Edinburgh University to provide venture capital for commercially exploitable work at the university. Quantum will provide further capital to enable the university team to build a full- scale demonstrator of the device. This will then undergo field trials with De La Rue Company, who will have exclusive rights to the technology. Linear 1C Data book Now available from the House of Power is the Unitrode Linear Integrated Cir- cuits Data Book for 1987-88, a com- prehensive guide to the functions and applications of the Unitrode ranges of power, control and interface circuits. Products covered in the book include power-supply circuits, motion-control circuits, power-driver, and interface cir- House of Power • Electron House • Cray Avenue • ORPINGTON BR5 3AN • Telephone (0689) 71531. SEMI optimistic for 1988 Semiconductor Equipment and Materials International (SEMI), the trade association for the semiconductor equipment and materials industry, has predicted a much improved 1988 for its members. SEMI’s data collection programme rep- resents input from more than 200 members around the world. Figures show an escalating backlog, as orders steadily rise and drive a positive book- to-bill that reached 1.18 in the 3rd quarter of 1987, up from 0.91 in the 4th quarter of 1986. This optimistic attitude was initiated by strong worldwide semiconductor device shipments, reported by the Semiconduc- tor Industry Association (SIA), which topped $3 billion in September last year, up from $2.5 billion for the same month in 1986. SEMI European Secretariat • CCL House • 59 Fleet Street • LONDON EC4Y 1JU • Telephone 01-353 8807. 5:20 A NEW MULTILAYER PROCESS FOR INTEGRATED PASSIVE DEVICES by Dr. Gordon R. Love This article describes a new process, derived from techniques used to produce multilayer ceramic capacitors, which is the key to a technique, known as Multilythics®, allowing complex integrated multi-functional passive circuits to be produced. Introduction There are iwo fundamentally different build-up processes for multilayer cer- amic devices or assemblies. Each begins with a slip of finely divided ceramic par- ticles dispersed and suspended in a com- plex organic system. In the more com- monly used process, this slip is cast in thin sheets of controlled thickness and dried; patterns are then printed on it by thick-film silk-screen processing, and the array of finished devices is assembled by stacking and laminating these single sheets. This process is generally known as dry stack or ’tape’ manufacturing. The alternative process involves casting the slip onto an inert carrier, drying it, printing the patterns by thick film pro- cessing, and then casting the next con- trolled thickness layer in situ . This build- up process is then repeated as many times as is necessary. This technique is known as wet stack or ‘paint’ process- ing. These two manufacturing processes can- not easily be compared, as each has its own strengths and weaknesses. For example, single sheets can be inspected and discarded if found defective in the tape process, whereas in paint processing this is virtually impossible. On the other hand, tape processing requires high pre- cision at two distinct processing steps (printing and stacking), whereas paint processing requires high precision only at the printing stage. Process differences For both manufacturing processes, a minimum amount of organic binder is required both to encourage device for- mation and to facilitate the eventual binder removal. Binders free of metallic contaminants are preferred because they are less likely for contaminate the cer- amic formulation, and they should be removable completely and easily because they must not distort the ceramic or Fig. I. Cross sectional schematic of a Multilythic device. £k21'< leave refractory residues which might in- terfere with the sintering process. These binders and the associated solvents should be cheap, non-toxic, and easy to dry without film formation or cracking; moreover, the binder for the ceramic powders must be compatible with the (usually different) binder selec- ted for the metal powders. For a tape-based system, the organics must have excellent strength because the tape is handled as a self-supporting sheet for at least part of the process. In ad- dition, many variations on the tape pro- cess involve locating the tape for printing or laminating (or both) by mechanically contacting the tape itself. Hence, refer- ence holes must be both well defined and dimensionally stable. In what appears to be a relatively fun- damental conflict with these require- ments, the tape has to be sufficiently plastic to permit very-high-quality lamination; otherwise, the sintered body can become vulnerable to internal len- ticular voids or ‘delaminations’. The tape binder should be relatively insen- sitive to variations in ambient tempera- ture and humidity, in order to maintain the dimensional stability required be- tween the multiple precision steps in the process. For a paint-based system, dimensional stability and reproducibility are deter- mined largely by the carrier plate, and all strength requirements are essentially met by the carrier. In addition, since the structure is assembled in situ with each layer being solvent bonded to its predecessors, plastic deformation is not required, and this source of ‘delami- nations’ does not exist. On the other hand, since visual inspec- tion for pinholes and other casting/dry- ing defects becomes impracticable, it becomes essential for high-quality layers to be obtained every time. High-speed drying is more important in this process because paint drying cannot easily be isolated from the rest of the build-up process, and so can limit production rates and overall productivity. Quantum improvements Wet-build processing has been suc- cessfully employed in the capacitor in- dustry for over 25 years, and a combi- nation of organic chemistry expertise and mechanical engineering skills has re- cently introduced quantum im- provements to the basic process. The latest generation of process developments has resulted in a tech- nology that is specifically optimized for both printing and print location accu- racy, as well as for uniform high pro- ductivity for both large and small manufacturing runs. The new technique is sufficiently different to warrant its own name: P-4 (for Precision Paint & Print Process) manufacturing. 5.22 elektor india may 1988 Fig. 2. Typical Mullilythic devices. This new process is crucial to a new manufacturing technology, known as Multilythics, which combines the diver- sity of materials used in the thick film industry with the economics of manu- facturing and the complexity of finished devices inherently available from multi- layer ceramic capacitor manufacturing processes. The Multilythic technique allows many different passive functions to be inte- grated into the device ‘substrate’, so that the exterior surface of the device need only support active devices, special com- ponents like crystal oscillators, and devices requiring precision trimming. As a result, the size of assembled circuits can be significantly reduced, and this size reduction also offers major im- provements in high-frequency perform- Another benefit of this technology results from the incorporation of mul- tiple components into the device, and hence a reduced number of interconnec- tions which, in turn, improves the device reliability through assembly and in ser- vice. In addition, the small size, coupled with economies of manufacturing scale, should make the technology cost effec- tive. A typical Multilythics device (Figs. 1 and 2) incorporates low-K dielectric cover layers, high-K dielectric capacitor layers, low-K capacitor conductor layers, thick film conductor and resistance layers, and semiconductor components. The proprietary materials used in the process can be sintered to very high den- sities, and their electrical performance can be established very accurately and consistently. The large number of layers used in a typical device can be stacked with excellent precision in the ‘green’ or unfired state, and then fired a single time with uniform shrinkage. Process benefits The high dimensional stability and high yields produced by the P-4 process are absolutely essential to the Multilythics concept. Because a Multilythic device is an array of components rather than a discrete device, the whole array must be discarded if a single component in the array is defective. Hence, if array yields are to be acceptable, single component yields must be very high. By way of illustration, if the component yields are 95%, an array of 100 compo- nents would have a yield of 0.59%; a 99% component yield would improve the array yield to 36.6% etc. The P-4 process has been found to lead to satisfactory yields. Another benefit of P-4 assembly is modularity. Historically, a major limi- tation of wet-build processes has been their relative inflexibility. Where unit volumes allow the assembly process to be run at its optimum throughput, it can be extremely productive, and efficient in both labour and capital investment. However, small runs can be made only by ’idling’ major components of the manufacturing line for significant lengths of processing time. By re-configuring the assembly equip- ment into smaller process modules, the P-4 process allows manufacturing to take place at constant labour and capital productivity over at least a 4:1 ratio of batch sizes. This is a particularly import- ant change in the context of the market for which Multilythics is intended, since a contributory factor to the relatively high costs of hybrid thick film manufac- turing has been the difficulty in achiev- ing meaningful automation for small manufacturing runs. The P-4 assembly process has been tightly integrated with a computer aided design facility so that customers can design their own devices and obtain a manufactured product in a relatively short time. Dr. G.R. Love is Vice President of Tech- nology, Sprague Electric. COMPUTER MANAGEMENT SYSTEMS TAKE OVER by James Lock The second half of the 1980s is witnessing the full flowering of fourth generation interactive computer systems, the integration of batch with continuous control, and a trend towards the location of intelligence close to plant of equipment under control. Several companies in the United Kingdom are investigating the appli- cation of expert systems to process con- trol, and software systems such as Auditor from Energy Efficiency Systems" 1 are emerging by which plant data can be transferred, via a company’s mainframe computer, into accounts and costing systems or into sales forecasting and business planning software. An important new control system, in- troduced this year by Ferranti Computer Systems* 2 *, is the PMS 100. Ferranti describes it as an integrated, fully distributed process control and infor- mation system for supervisory and direct control, for continuous, sequence and batch control, and for high availability configurations. It is a far cry from the process plant computer control system installed by Ferranti in 1962 for control of a soda ash plant at Id’s site in Fleetwood. Believed to be the first in the world, that had a program of only 1200 words. Computing cards of various perform- ance, all based on the Ferranti Argus 700 family of processors, are now used at various locations. Computing power varies from 700 000 inputs per second to more than two million inputs, depending on the configuration. PMS 100 is a natural development of the first PMS — process management system — installed for the Bayer company at Leverkusen, Federal Germany, in 1975. Over the years, Fer- ranti technology has been applied in areas ranging from steelworks to radio astronomy. Making modifications The data highway, Systembus SB10, is an open system based on international communication standards able to con- nect to other manufacturers’ equipment. In a dual configuration, System SB10 data highways are treated identically. There is no master and no standby, messages are simply transmitted down a free data highway with the advantage of allowing twice the bandwidth in normal operation. A combination of System SB10 and Ferranti's wide area network X.25/F-NET provides a communication capability for any size of PMS 100 net- work. PMS 110 is a dedicated process con- troller that incorporates mixed sequence and continuous control facilities. Nor- mally mounted close to the plant under control, it can be interfaced directly to it or through loop controllers and pro- grammable controllers. A process engineer can modify and de- velop new control schemes from either a terminal at the process management in- formation system or on a portable Ac- cessway 110 programmer located, say, in the engineer’s office. The PMS 105 device gateway allows any make of process control or operator device to be integrated into PMS 110, permitting any make of programmable logic controller (PLC) or single loop controller to be specified. Familiar engineering lerms Batch control in PMS 110 is provided by PMS unit operations, which provides a complete batch control environment for single product, single stream and multi- product multi-stream batch processes. Typical is its use by the Pfizer company for batch processing a range of phar- maceutical processes. A number of batches can be in progress simul- taneously through different process steps using the same train of equipment. The production supervisor can redefine production routes and resources on-line, allowing multi-product manufacture with a minimum of downtime. Auto- matic batch scheduling permits a cam- paign to be set up in advance so that pro- duction is initiated immediately the plant becomes available and it is also possible to change the order of batches. Part of the PMS operations software package is Constructor (IPC) which enables the engineer quickly and simply to build up colour graphic process diagrams, graphs and logs. The PMS system’s on-line development facility uses a high level programming language which has terms familiar to the engineer and requires no specialist programming expertise. The trend to put the intelligence of a computer control system in close prox- imity to the sensors and actuators of a plant rather than relying on a single, cen- tral computer is reflected in Newmark Technology’s* 3 * Omnibus range. This stems from the Janus Project, con- ceived by Professor John Brignell at Southampton University for the appli- cation of advanced microprocessor tech- nology to measurement and control. Omnibus measurement and control systems comprise one or more Omni- point computers acting as master station/operator interface and a number of Multipoint measurement and control computers distributed Over an Omnibus network. The Multipoint units have been developed jointly by Newmark and Jeball, a company formed by Professor Brignell, while the Omnipoint com- puters are IBM PC or compatible com- puters in standard or industrial packag- ing. Collaborative project At the heart of the Omnibus concept is a powerful dual processor that im- plements the synchronous data link communications (SDLC) protocol. To achieve this, Newmark took the Intel Bitbus and enhanced it to handle up to 250 stations over a range of 5 km, from systems that can start with control of a single loop. Although a personal computer (PC) is an integral part of the systems loop, the essential difference is that this computer is used simply as a central programmer and data manager rather than as a de- cision manager. The majority of decisions made by the system take place at the outstations, removing the problems associated with a failure of the main computer or its com- munication systems. The use of a plug-in card allows control of the Omnibus net- ’ work without loading the PC. The 5.23 Multipoint units form the remote outsta- tions, each one designed for use in a par- ticular application or environment — the MP100, MP200, MP300, MP400 and now the MP500. Omnibus communications ensure the compatibility of all Omnipoint and Multipoint units to communicate via a fast multi-drop serial data highway, as welll as Omnibus products from other suppliers. Since Omnibus is Intel Bitbus compatible it is a widely supported fieldbus. Moreover, gateways into the manufacturing automation protocol (MAP), direct from the host PC or via a standard interface on the instrumen- tation computer board, enable the Om- nibus range to communicate through standard protocols in both process and manufacturing industry. The need to combine the skills of soft- ware and process experts has formed the basis of an on-going collaboration be- tween Biotechnology Computer Systems (BCS)* 4 * and the Department of Chemical and Biochemical Engineer- ing (5) at University College London (UCL) in the development of a com- prehensive fermentation management system. BCS is a member of the Porton International group of biotechnology companies that operate worldwide. UCL is one of the British Government’s Science and Engineering Research Council (SERC) designated centres for biotechnology. Some 50 staff and resear- chers are involved and there is col- laborative work with some 14 other organizations besides academic institu- tions and other departments in UCL on various aspects of control. Digital controllers The first two products are the software packages BlO-i and BIO-pc. BlO-i is a powerful fermentation process manage- ment system, BIO-pc is a single user bioprocess management system for up to four reactors with associated on-line equipment. The design objectives for BlO-i were to produce a single fermentation manage- ment system that would satisfy the dif- fering needs of the fermentation plant process engineer and worker, and the research scientist. So BlO-i has been configured as a supervisory system in which distributed digital controllers as- sociated with each fermenter are linked to the process computer. Designed for use with the Digital Systems Equipment range of computers, the package employs well proven programming languages and real time process plant databases. Mass spectrometer data is used in the monitoring of off-gases. The distributed nature of the system and the ease with which it can be configrued means that new fermenters, sensors and analytical equipment are simply incor- porated when they become available. The new Ferranti PMS 100. Fresh results of the collaborative pro- gramme, such as the current work on adaptive control, can be added to the package. This has been thoroughly tested on the sophisticated range of termenters and reactors in the UCL pilot plant. BIO-pc is configured on an IBM-AT or compatible computer, with monitors and other peripherals, and uses the stan- dard MS-DOS 3.1 software package operating system. Its software elements include a complete professional Smart applications package, a feature of which is a spreadsheet with graphics that can be used while the computer is data monitoring and logging the plant. Short payback time Kent Process Control Systems* 6 * has developed integrated configurations of its originally centralised K90 computer process control system, the P4000-ICS. This interesting development, instead of the single or hierarchical configuration of the K90, permits a number of units to be linked via the peripheral highway into one integrated system. Each peripheral highway, of which there may be more than one per system, has a maximum of eight units, up to four of which may be operator control panels and the rest control processors. The ar- rangement allows a system to handle dif- ferent sized process control applications, besides offering a low cost entry to ICS systems. The first two ICS systems have already been supplied to a phar- maceutical company and a major steel producer. Kent has also introduced an expert system, based on LISP and using a Picon shell, as an option with the P4000 distributed control system. The expert system is designed to simplify interpreta- tion of the volume of data from the pro- cess variables being monitored on a medium-to-large system. The volume of incoming data is particularly high dur- ing plant changes such as start-up and shut-down procedures. Several companies are examining the ap- plication of expert systems to process control. The first publicised success in the United Kingdom has been LINKman. The Blue Circle cement company, in conjunction with SIRA* 7 *, formerly the Scientific Instrument Research Association, set it up on a KPCS P4000 distributed control system. LINKman succeeded where attempts at more conventional computer process control failed. SIRA has made an agree- ment with Blue Circle to market the system to other cement producers. Blue Circle has also ordered five complete systems and is anticipating a payback time of six to nine months. This quick return is largely due to energy savings. Higher level information In 1984, the Alvey Commission set up a number of expert system demonstration clubs in various industrial sectors. The first of these was in control instrumen- tation — the Real Time Expert Systems Club of Users (RESCU). The study of an expert system as an adviser on quality control at an ICI company ethoxylates plant for batch production of detergents has recently been completed. Systems Designers* 8 *, the contractor for the RESCU club of some 22 members, has now initiated a further club, the Cognitive Systems Club (COGSYS), to convert the results of RESCU into a truly commercial, fully supported prod- uct. It is expected to appeal to chemical, food, pharmaceutical and other process industries, the utilities and energy sec- tors, and the parts manufacture and as- sembly industries. Members of the COGSYS club will benefit from sales of the completed product and membership is still open to companies and academic institutions. At the end of 1986, ICI launched Auditor, its plant performance monitor- ing package, with the support of Britain’s Department of Energy and the Chemical Industries Association (CIA). The system, the result of new thinking about the quality of management infor- mation in the production sector in the light of reduced fortunes following the oil crises, is now used in more than 60 ICI plants and is being sold to other companies in the chemical and other in- dustrial sectors through Industrial Energy Systems. Auditor" technology is simply a higher layer of production information and it uses existing monitoring devices and in- formation. Linked to the company’s mainframe computer system it can transfer data into the accounts and costing system or into sales forecasting and business planning software. The package also interfaces with two higher level systems developed by ICI. Co-Audinator is designed to monitor and optimise the running of a whole site with several interacting plants, and Energy Management System is used for site or company-wide energy monitoring to allow comparisons of different periods of production with different mixes of product. Auditor systems installed at ICI have had an average payback time of six months. A standard Auditor package consists of a DEC MicroII computer with a winchester disk, twin floppy disks, one or two display units (normally in colour), and a printer. 1. Energy Efficiency Systems Ltd, Midland House, 202 Linthorpe Road, Middlesbrough, Cleveland, United Kingdom. 2. Ferranti Computer Systems Ltd, Wythenshawe Division, Simonsway, Wythenshawe, Man- chester, United Kingdom, M22 5 LA. 3. Newmark Technology Ltd, Heathrow Causeway, 152/176 Great South West Road, Hounslow, United Kingdom, TW4 6JS. 4. Biotechnology Computer Systems, Cleveland House, Church Path, Alton Green, Chiswick, London, United Kingdom, W4 5HR. 5. Department of Chemical and Biochemical Engineering, University College London, Gower Street, London, United Kingdom, WCIE 6BT, 6. Kent Process Control Systems, Biscot Road, Luton, United Kingdom, LU3 1AL. 7. SIRA Ltd, South Hill, Chislchurst, Kent, United Kingdom, BR7 5EH. 8. Systems Designers PLC, Centrum House, 101/103 Fleet Road, Fleet, Hampshire, United Kingdom, GUI3 8PD. SECOND GENERATION PROGRAMMABLE LOGIC by E. Baum The direct interface system on a microcontroller is, in principle, very similar to that on a microprocessor. In fact, there are slight differences between the individual processor manufacturers, but the applications, i.e. connection of dynamic RAMs, demultiplexing of pro- cessor buses or mailbox functions, ap- pear to be very similar. That is why all semiconductor manufacturers offer a range of standard chips which can be connected directly to their own pro- cessors. However, there remain many more applications, where these interface modules, or even logics, i.e. latches or other TTL logics, must be added. For this, discrete logics in the 74xxx series are often relied upon. PLAs and EPLDs (erasable programmable logic devices) are also frequently used. It is now possible to imagine integrating the processor interface and the interface to the controller or processor in a single EPLD. The density of this module of up to 1800 gate equivalents is therefore quite sufficient. However, thanks to the very simple and regular structure of the bus interface, many of these gates re- main unused on the chip. This essen- tially has two disadvantages. Firstly, the chip could be even cheaper if the superfluous gates were totally dispensed with. Secondly, EPLDs and PLAs with large numbers of gates are slower, since the internal capacities are greater and the signal propogation speeds are slower. In some circumstances therefore it is necessary to rely on several small modules. The new member of the EPLD family from Intel, the 5CBIC (bus interface controller), fills this gap perfectly. As the name implies, this chip offers a highly integrated solution for all designs which contain bus transfer lines or generate control signals. Even the driver, which in some cases still has to be pro- vided in a bus interface, can more often than not be dispensed with when the 5CBIC is implemented. The maximum current on the bus side can be 32 mA. The 5CBIC thus offers all the advan- tages of high integration such as low space requirement, low current require- ment, low system and manufacturing costs, and so on. Figure 1 shows the basic 5CBIC design. The 8-bit wide A port on the bus management unit, BMU, lies directly on the processor or controller bus. On the ’’user side” there are two further 8-bit ports, B and C. As will be seen later, these three buses are bidirectional and can be combined randomly, even dynamically, with each other. The sec- ond largest block is the programmable logic unit, PLU, which contains an 8 macrocell EPLD unit. The PLU has 8 dedicated inputs and 8 bidirectional pins. Both blocks can be supported via the control unit. Bus Management Unit The bus management unit links ports A, B and C together and controls and monitors the data flow over their lines. At the same time, the user can choose whether the data flowing into these ports is to be latched or not. For this a latch enable signal can be generated in the PLU or supplied directly via a pin. Various EPROM cells, or dynamically modifiable signals generated by the PLU, control the data flow. Each port can also be connected with any other. Depending on the requirements or the subsequent hardware, the signal can be given out on one of the outputs inverted or directly. Three signals generated in the' eleklor India may 1988 5.25 1 Fig. 1. A Bus Management Unit (BMU) and a 5C060 step-up compatible programmable logic unit (PLU) conventionally connected and manually optimized with the flexibility of programmable logic. PLU can be sent by the output buffer to the ports in the high resistance state, in order that data may then be received there. A multiplexer can make the signals from a port, latched or not, available to the PLU AND/OR array. The connec- tions between the three ports on the BMU itself, are programmed via EPROM cells (Figure 2). Fig. 2. The data flow can also be configured dynamically. Consider the connection of the 5CBIC to, for example, an Intel controller in the MCS 51 family. Then, using the BMU, it is possible to demultiplex the address and data bus and make the rest of the circuit available separately on ports B 5.26 Glekto, india mav 1388 and C. The driver current of 32 mA per pin should be sufficient for most appli- cations. The working frequency of the external logic can be up to 12.5 MHz. Internally, the 5CBIC can work with up to 20 MHz. The PLU can now ’’ob- serve” the data or address flow and chipselects, generate other control signals or simulate an additional parallel Programmable Logic Unit The second large block on the 5CBIC chip is the programmable logic unit, PLU. This essentially has a 5C060 EPLD superset. Eight macrocells can, with the help of EPR^M cells, be adapted to the application (Figure 3). Eight dedicated input pins and 8 bidirectional pins can be connected to the macrocells. Con- sidering that data from ports A, B or C can also be obtained via the internal feedback bus, the user has up to 24 in- puts, and up to 8 outputs available per product term. As has already been seen with the EPLDs and PLAs logic operations, se- quences are firstly converted into an AND/OR structure, which is usually generated and optimized by the develop- ment system, IPLDS1I (Intel Program- mable Logic Development System, ver- sion 2). This structure can then be very easily implemented in the AND/OR ar- ray on the input of a macrocell as a so- Fig. 3. The 5CBIC macrocells — I/O latches and high driver currents — make the use of the processor bus an optimal application. Fig. 4. The IPLDSII allows the use of TTL, gale array, and user-defined symbol libraries. called sum of products. Each macrocell always has available the 8 dedicated in- put signals, the 8 macrocell feedback loops, the 8 signals on the bidirectional pins, and the signals on one of the BMU ports. Since all signals are dealt with .directly and inverted on the AND/OR array, any combination can be pro- grammed by setting the corresponding EPROM cells. As opposed to the 5C060, each input signal can be individually latched. The only exception are the 8 bits which come from the BMU. These may only be latched together, or not at all. The latch enable signal for each input latch can either be generated individu- ally with the help of a product term or by a common control signal. Behind the OR gate, which can comprise eight product terms, there is an inverter whose optimum algorithm (Espresso Minimizer) makes life a little easier, since it allows DeMorgan’s theorem to be reproduced in the hardware. The consequent I/O section of the macrocell is therefore very like that of the 5C060 (Figure 3). Combinatorial or register logics can be created here. With register logics there is a choice of four registers. Depending on what is most suitable for the application, either a D-, toggle-, JK- or RS-flipflop is used. Whereas when using a D- or toggle-flipflop all eight product terms are connected to one in- put, with the RS- and JK-flipflops the product terms are shared arbitrarily be- tween both inputs. Each register in the I/O part of a macrocell has a set and a clear input which are controlled via one of its own macrocells. The clock signal, the latch-enable and the output-enable signals can be in- dividually selected for control between either the control bus (synchronous) or a product term (asynchronous). This also gives greater flexibility in comparison with the macrocells of, for example, the 5C060. The output of a macrocell can be fed back into the AND/OR array via either the control- or feedback bus. This signal is picked off before, the tristate buffer in the cell’s output. Behind the buffer, and thus physically linked with the I/O pin, there is a second pick-off. If, therefore, the variable generated by the macrocell is only needed internally, it can be further used as input if the buffer has to be switched to high resistance. Using this dual feedback option, it is very simple to generate the so-called buried registers. The development system keeps these functions transparent for the user. IPLDSII: expansion of the development system supports the 5CBIC On many points, the development systems of the EPLDs have been im- proved with the IPLDSII (Intel Pro- grammable Logic Development System, Version II — Figure 4). The new hard- ware is now based on the Intel Program- mer IUP-PC. Apart from EPLDs, all other EPROM-based modules, EPROM microcontrollers, etc. can also be pro- grammed. More important though for daily work- ing with EPLDs are the changes in the software. So a new algorithm for op- timization (Espresso Minimizer) was im- plemented. For large EPLDs in par- ticular, important improvements were made in the design density. The fitter, and thus the program part, which assigns a design for optimization of the macrocells in the selected EPLD, has also been improved. Working with the IPLDSII has also been simplified considerably and made more comfortable. Although previously it was possible to use modular design methods and link together several source files, now it is possible to go even further back to the design macros. The macro-library comprises three blocks: • TTL macro-library • Intel Gate Array Library • User-defined library The TTL library comprises a collection of the most-used modules in the 74 series. The user enters the modules with the corresponding connections to the re- mainder of the logic. The macro- expander then converts this information into EPLD primitives which are reunited 5 *. I. bJ 1 — n ° I OeA ^ ^ OeB || fI lie B w ! * | Uport inputs to C are registered^ 1 880070-14 Fig. 5. With the aid of the IPLDSII, the 5CBIC bus management unit can be configured very in the minimizer. The expander also recognizes if a chip is not being fully utilized and erases the remaining gates. So, for example, if with the 7400 only 2 of the 4 gates are used, only 2 will be im- plemented in the EPLD. Sometimes it is possible to use EPLDs as prototypes or backups for a gate array design. In order to make this as simple as possible, Intel has grouped the gate- array macros in a further library, which can be implemented in an EPLD. Of great interest, of course, is the possi- bility, with the help of a few utilities, for the user to create a library himself, the elements of which can also be made up of those of the other two, i.e., the TTL library. As with the old version of the IPLDS, for documentation an advanced design file (Netlist File), a logic equation file with the actually implemented and op- timized functions, and a report file with the utilization and pin assignment of the EPLD is generated. If during compiling errors are found, the messages are ’’col- lected” in an error file. In the software output, a JEDEC- compatible file is generated which serves as input variable for one of the program- ming units, from Intel or another, which support the EPLDs. The basic version of the IPLDSII sup- ports the circuit input with the help of an editor. It is however simpler to use the logic builder which allows interactive graphically-supported conversion of a circuit diagram into a netlist. The logic builder also makes configuring the 5CBIC bus management unit very simple. A BMU block diagram comes up on the screen (Figure 5). Using the cur- sor, it is possible to ”go into” the desired block, i.e. the block for port C. By simply pressing the ’’RETURN” key, it is now possible to select from all the con- figuration possibilities. The respective functionality is entered on the circuit diagram on the screen as are the connec- tions to the other ports. Later the output enable (Oex), latch enable (Lex) or select (Selx) signals are connected. The signals can be connected directly to pins or con- trolled from one of the macrocells. The compiler takes care of the allocation. In order to simplify input, various soft- ware packages expand the IPLDSII. ISTATE for example allows input of state diagrams and truth tables. Further library and conversion packages allow circuit diagram input using PCAD or DASH. Since the middle of 1987, Intel has also been offering an IPLDS-compatible software package for circuit diagram in- put, which is reasonably priced. SCHEMA II, as the package is called, is produced by OMATION and sold by, amongst others, Intel. In addition to their own schematic capture software, some libraries contain EPLD primitives and 74xxx symbols, which can be sup- RAM. ported by the IPLDSII. The circuit diagram can now be input and advan- tage taken of the SCHEMA software, i.e. by plotting on simple EPSON printers or HP LASERJET, and even on plotters working with larger than A4 format. The circuit, which may, of course, con- tain TTL symbols, is converted into an advanced design file, which then serves as input to the IPLDS compiler. The design is minimized and then fitted into the EPLD selected. In addition to the plot files, the same output files are generated for documentation as when the logic builder is used. In addition SCHEMA II offers a range of other aids. Thus, it is possible for the user to automatically create parts lists, carry out a design rule check, check routing, and print out various data formats, pinlists, netlists, and so on. Fig. 7. Photograph of the experimental set-up of Fig. 1. 16 Bit dual port memory A populpr way of making computers faster is to have several processors work- ing in parallel on a single task. Here, the processors must from time to time ex- change data for synchronization and management from shared memories. This exchange takes place more often than not via a dual-ported RAM. The logic, which is necessary for managing such a RAM, can now very easily be created with the help of two EPLDs of the 5CBIC type (Figure 6). Here, two 16-bit processors are accepted which can access a joint memory bank. Each 5CBIC can work with an 8-bit width. Two are therefore required. The first module manages the upper 8 bits of the databus. It also takes care of arbitration. The second manages the lower 8 bits. In the PLU, a 8-bit counter is implemented which is required in other parts of the application. Further information is available from Intel in the form of appli- cations leaflets. Eckart Baum is with Intel, Munich. TEST & MEASURING EQUIPMENT Part 1: dual-trace oscilloscopes (E) The final article in Julian Nolan’s review of dual trace oscilloscopes deals with the Hung Chang OS-635. The Korean company of Hung Chang is, perhaps, better known for its range of DMMs, frequency sources, and counters, some of which are sold under a variety of retail trade names. The Hung Chang OS-635 is a 35 MHz delayed sweep oscilloscope with a 6 kV CRT retailing at £399 (excl. VAT), which is only about £80 more than one would expect to pay for a ‘basic’ 20 MHz model. The delayed sweep is of the ‘coarse’ var- iety; the instrument is also fitted with trigger hold-off and single sweep modes. The OS-635 is fitted with a standard IEC mains socket. The line voltage is exter- nally adjustable to 100, 120, 220, or 240 VAC. The instrument is not fitted with a swivel stand, but the single position stand pro- vided instead allows easy stacking of the The OS-635 is of average depth and width: 352 mm and 294 mm respect- ively, but its height of 162 mm is perhaps rather more than might be expected. Two high-quality probes (1.4 ns rise time when in 10:1 attenuation mode) are sup- plied as are accessories for use with them, including a BNC adaptor and spring-loaded clip. Front panel. The front panel is probably one of the OS-635’s most distinguishing features, with colour-coded sections such as triggering and Y-amplifier func- tions. Although the colour coding adds to the ease of operation, the panel is not, as common, anodised, but the markings have been printed on. This, together with the exposed potentiometer bushes of some controls, gives the instrument a rather rough and ready appearance. However, this certainly does not mean that it is. of low quality. Y-amplifiers. The attenuation coef- ficient of both Y-amplifiers is variable over a range of 10 V/div to 5 mV/div. In addition to this, a x5 magnification fa- cility is also available, enabling maxi- mum sensitivities of 1 mV/div to be achieved. Undoubtedly, one of the main features of the OS-635 is its 35 MHz bandwidth. This is maintained down to 5 mV (-3 dB). The 1 mV/div sensitivity brings with it the restriction of a 10 MHz band- width (rise time 35 ns). Both Y-amplifiers have a'continuously variable attenuation control, which in- creases the maximum attenuation coef- ficient to 30 V/div. Only one channel can be invcrlcd. The performance of the Y-amplifiers is reasonable in terms of frequency response and bandwidth, given their relatively high frequency range. But, despite these mediocre characteristics, they arc still undoubtedly better than the average 20 MHz Y-amplifier at this price 1 5.29 ELECTRICAL CHARACTERISTICS line voltage: - 100, 120, 220, 240 VAC ± 10%, externally adjustable. Power consumption: 30 Watts Line frequency: 50-60 Hz Y AMPLIFIER ETC. Operating modes: - CHI alone, CH2 alone. Inversion capability on CH2 only. Any combination of CHI, CH2 (alternate or chopped (250 kHz)) CHI + CH2 Frequency response 0 ... 35 MHz (-3 dB). Risetime < 10 nsec, (3§ nsec x 5 Mag.) Deflection factor 10 steps: 5 mV/div ... 5 V/div ± 3%. x 5 magnifier extends range to 1 mV/div, MHz bandwidth. Input coupling: AC, DC or Gnd. Input impedance: 1 MQ/25 pF; max input voltage 300 (DC + peak ACI X-Y MODE CHI X-axis and CH2 Y-axis. Less than 3° phase shift at 50 kHz Bandwidth DC to 1 MHz (-3 dB). i sweep time 100 ns/div to 0.5 s/div ± 3% in. 21 ranges; 1-2-5 sequence; vernier control slows sweep down by u[ Hold off - variable up to 10:1. Delay modes — continuous delay. Delay jitter - 1/5000. Single sweep facility. TRIGGERING Trigger modes — auto and normal. Trigger coupling — AC; DC; HF reject; LF reject; TV frame and line (auto). Trigger sources - Ch; Ch2; alternate; line; ext.; ext/10. Triggering sensitivity — internal: 1 div at 35 MHz; external: 0.2 Vpp at 35 MHz. MISCELLANEOUS CRT — measuring area 80 x 100 mm; accelerating voltage 6 kV; metal backed; PDA. Compensation signal for divider probe - amplitude approx. 0.5 Vpp ±3%; fre- quency 1 kHz. Z modulation sensitivity — 3 V (complete blanking). Despite being specified at 3%, overshoot is particularly evident on some ranges, although it remains within the quoted The dynamic range is somewhat limited at about 4'A divisions at 35 MHz, but should, none the less, be acceptable for most purposes. A minot point is that the x 5 magnifier has the effect of magnifying the trace offset, which is set by the Y position control, with the result that some repo- sitioning of the trace is required when the x5 magnifier is actuated. Since the x5 switches are incorporated in the Y position controls, it happens that when these controls are accidentally turned when they are pulled out to actu- ate the x5 magnifier, the trace shifts. If this has already been centred, an un- necessary adjustment is required to re- centre it. Chopped (200 kHz) or alternate sweep is selected automatically by the time base speed setting. Triggering. Triggering on the OS-635 is comprehensive, including LF and HF filtering, alternate channel sourcing and TV synchronization. In addition to this, unusually for a scope in this price range, an external -HO facility is also provided. The auto/normal and triggering threshold controls are combined into one in a similar manner to the x5 at- tenuation coefficient magnifier. Here, the problems brought about by this are not so acute, but still noticeable; the auto position is selected with the level control fully out. All other triggering controls (of the slider type) are, however, relatively easy to operate. TV triggering is particularly notable, be- ing selectable from positive or negative synchronization and, with the inclusion of automatic line and frame switching, incorporated into the timebase coef- ficient selector. Triggering sensitivity is also good: typically 0.2 div to 10 MHz, increasing to 1 div at 35 MHz and 3 div at 60 MHz, which is the maximum reliable trigger frequency. External trig- ger sensitivity is also good at 100 mV to 10 MHz and 0.2 V to 35 MHz. This can, however, be increased by means of the "HO control to eliminate false triggering, caused, for example, by noise. An alter- nate channel, or composite mode, is also incorporated^for observation of two unrelated (in terms of frequency) signal sources. Triggering symmetry (rising or falling slope) proved to be out by ap- proximately 1 division over a total ver- tical deflection of 8 divisions. The HF and LF facilities provided are effective in obtaining a stable trace even in cases of waveforms with a very high modulation content, and are a further useful ad- dition to the OS-635's trigger functions. Both trigger and ‘ready’ LEDs are also incorporated, lighting when the scope is stably triggered or reset respectively. Trigger holdoff is also a feature of the OS-635, which makes the triggering facilities provided by this scope amongst the best in its class. Timebase. The OS-635 is equipped with a single timebase and an uncalibrated vernier delay time control. This has the consequence that in the vast majority of situations only uncalibrated delayed sweep measurements can be made of waveforms which exceed the maximum horizontal deflection limit of 10 div- isions. In most cases this limitation does not affect the measurement of waveform rise times. The main timebase itself ranges from a respectable 0.5 s/div to 100 ns/div, although, obviously to limit the cost of the deflection circuitry, only a x5 horizontal magnification system has been incorporated, increasing the maxi- mum deflection speed to 20 ns/div. The trigger delay time coefficient can be selected from one of 5 (the front panel is marked for 6) covering the range from 1 sec to 100 msec in a 1:1 sequence. This departure from the standard 1-2-5 se- quence is false economy since, although it reduces the number of switch positions to 5 instead of i5, highly accurate ad- justment of the vernier control is re- quired at higher magnification levels. It also has the effect of reducing the ease of use of the delayed sweep facility significantly in my opinion, largely due to the accurate vernier adjustments which have to be made. Rise time measurements would have been greatly helped by the provision of a triggered delay facility in addition to the normal continuous mode, as well as a delay line. Looking at the situation in perspective however these facilities can hardly be ex- pected for £399, but effective operation of the delayed sweep facility without them may in many applications prove ex- tremely difficult. The delayed sweep dis- play modes of normal, intensified or delayed should be adequate for most purposes. Timebase accuracy is inside the specified ±3°/o (and the rather high ±10% when using the x5 magnifier). Linearity is also within the quoted ±3% over most of the range, although it is noticeable at the start of the trace over the first 1 Vi small divisions on the maximum timebase speed that the deflection characteristics were, to say the least, non-linear. CRT. The 6 kV tube enables both good intensity and brightness to be main- tained over the whole range of sweep speeds. The CRT itself is of the metal backed PDA variety and gives a good performance, especially in terms of focusing, which is certainly of a high standard. The tube is slightly curved across its face, however, and while this is not to a great degree, and should not af- fect measurements, it is still worth noting. Tube geometry is reasonable, with some barrelling and pincushioning present. The tube’s good performance is hindered by the lack of an automatic focusing circuit, with the consequence that any major alterations in tube brightness can cause considerable defocusing of the trace, making some form of focus adjustment essential for accurate measurements. Construction. Construction of the OS- 635 is poor. While mostly not of low quality, the OS-635 is in places poorly finished, with a number of sharp edges evident on the enclosure both internally and externally. Internally, masking tape and small pieces of dowelling are used to separate some of the wire interconnec- tions, which, while perhaps not impair- ing the reliability of the instrument, are really unacceptable in a modern instru- External construction is based on a steel chassis, with two sheet steel panels enclosing the top, sides and underneath of the scope. These appear to have had little done to them in terms of machining since being originally pressed and folded since they still contain one or two sharp edges. The front panel surround is con- structed from four separate pieces of aluminium with the consequence that they are joinded at each corner. Internal construction is of a higher stan- dard, with the high voltage and EHT supplies enclosed, and the Y-amplifiers partially screened. The scope is based around four PCBs, connections from which are all made by connectors for easier servicing and while this leads to a large number of interconnections, it should not affect reliability. As well as being used to separate some of the inter- connections, masking tape is also used around the CRT. Overall construction both internally and externally appeared to be average in its class, and whether this will effect the re- liability remains to be seen. The quality of components used is generally good and this may be worth taking into ac- count. Manual. The 30 page manual includes a full circuit and PCB layout diagrams. A full circuit description and initial set up information is also given, along with calibration and preventative mainten- ance sections. Conclusion. Looking at the specification alone, the OS-635 appears to represent a extremely good price/performance ratio, with a 35 MHz (-3 dB) bandwidth, 6 kV PDA tube and delayed sweep fa- cility. In reality, some of these facilities are limited in their performance, which is especially true of the delayed sweep fa- cility, which in some situations offers little more than can be achieved with a scope that possesses a good trigger per- formance. Having said this, both the triggering performance and facilities of- fered by the OS-635 are good for a scope in its class and should not be ignored. An automatic focusing circuit is not fit- ted, which is unfortunate since the 6 kV PDA is capable of producing a trace of both excellent intensity and sharpness, but to maintain this without the pro- vision of an automatic focusing circuit requires an adjustment in the focusing potential for a significant change in trace intensity. Both the internal and ex- ternal construction have the appearance of a preproduction prototype rather than a production model, but despite this there is not apparent reason why the OS- 635 should not be reasonably rugged in a variety of environments. To sum up, for its specification the Hung Chang represents a very good price/perform- ance ratio, its particular strengths lying in its 6 kV CRT and 35 MHz bandwidth. The OS-635 may well be worth consider- ing for a large number of applications where a bandwidth of 35 MHz and high brightness tube arc required on a limited budget, or as a cost effective alternative to a 20 MHz scope. The Hung Chang OS-635 was supplied by Black Star Ltd. • 4 Harding Way • St. Ives • HUNTINGDON PE17 4WR • Telephone (0480) 62440 Other oscilloscopes available in the Hung Chang range. OS-615S — dual trace 15 MHz portable; rechargeable battery operated; weight 4.5 kg; sensitivity 2 mV; maximum deflection speed 100 ns/div; 1.5 kV CRT; up to 2 hours operation from fully charged batteries; £399 excl. VAT. OS-620 — dual trace 20 MHz; sensi- tivity 5 mV; maximum deflection speed 40 ns/div; 2 kV CRT; component tester; power consumption 19 W; £295 excl. VAT. OS-650 — dual trace 50 MHz; sensi- tivity 1 mV; maximum deflection speed 40 ns/div; 17 kV CRT; delayed sweep 100 ms to 1 £579 excl. VAT. Table 18. i9ss5.31 STEREO SOUND GENERATOR A high-quality stereo sound effects board for the Universal I/O bus, based on Valvo’s Type SAA1099 advanced single-chip complex waveform generator. Applications include enlivening computer games and operation as a programmable test generator for simulation of composite AF waveforms. Here is yet another simple to build exten- sion board for the Eleklor India Univer- sal I/O bus <■’. It answers the popular demand for an advanced sound gener- ator that can be programmed to produce an astoundingly wide variety of complex sounds in stereo, simply by having the computer send the appropriate com- mands and datawords for each channel via the Universal I/O bus. The main specifications of the sound generator board described here are shown in the shaded box below. Digital sound The block diagram of the Type SAA1099 programmable sound generator chip from Valvo (Philips/Mullard) is shown in Fig. 1 . The interfacing logic is shown to the left and at the top of the drawing. To the computer, the chip appears as a WOM (write only memory). Reading of the chip status is, however, possible if the processor writes copies of the com- mands and data into a RAM table for retrieval at a later stage. Input line A0 of the sound generator chip is made high for loading register address bytes, and logic low for databytes. The interface logic on board the SAA1099 latches the register address, obviating the need to repeat this when writing new data to the last selected register. The process of sound generation in the SAA1099 is completely digital, and based on pulse- width modulation. Table 1 gives an overview of the function assigned to each bit in a particular register. The required octave is pro- STEREO SOUND GENERATOR BOARD Features: ■ six frequency generators 2048 tones in 8 octaves ■ two noise generators ■ six tone/noise mixers B six stereo amplitude controllers B two stereo envelope generators B stereo six-channel output mixer 0 on-board 2 x 200 mW AF ampli- fier grammed separately for each tone gener- ator by writing a 3-bit number in registers 10h, 11h and 12m. The fre- quency range covered within each octave is given in Table 2. The frequency pro- duced, To, is determined by the contents of registers 08h. . .0Dh inch, and can be calculated from (consult Table 2 for O. and Fx). The contents of registers 14h and 15h determine which signals are passed by the six on-chip mixers. There are four possibilities: (1) all signals are blocked; (2) only the tone is passed; (3) only noise is passed; (4) both the tone and noise are passed. The noise generator clock rate — hence the noise colour — is in- dividually programmable on the left and right channel by writing the appropriate data to register 16h. Six amplitude controllers can be pro- grammed to set the volume of the generated sound on the stereo output channels. This is effected by writing data to registers 00h...05h incl. (left: LS nibble; right: MS nibble). The last programmable section to be dis- cussed is the envelope generator, whose operation is best explained with refer- ence to fable 2 and Fig. 2. In the draw- ing: (1) indicates that the output amplitude is determined only by the amplitude controller when the envelope generator is disabled; (2) indicates that the maximum ampli- tude is 15/16th of the value set by the amplitude controller when the envelope generator has been enabled; (3) indicates the moment when a new envelope waveform can be started by reloading E0 and/or El. 1 Fig. 1. Internal structure of the Type SAA1099 programmable sound generator. 2 The letters in brackets to the right of the of the envelope is determined by fre- envelope waveforms in Fig. 2 refer to the quency generator 1 (or 4), or by the com- bit combinations in Table 2 (E0-E1; bit 1, puter repeatedly writing to the address 2, 3). latch, cl ocking t he envelope gen erator When the envelope mode is selected for with the WRITE signal (WS). The a channel, the amplitude of the associ- period of the envelope, h, is calculated ated amplitude-controller is rounded from down to the nearest even value (the LS bit is considered low). If, for example, (c=8//ciock the volume was set to value 1, it is rounded down to 0. An envelope gener- in the 4-bit mode, or ator can also function as a tone gener- ator. If the controlled frequency channel fc=4//dock is inactive (tone & noise generator turned off), the programmed envelope in the 3-bit mode, wavevorm will appear at the output. In thi^ way, the sound generator board can Bit SE (sound enable) can be used for function as a programmable waveform turning the sound generator on and off. generator with a maximum output fre- The programming of sounds is largely a quency of about 1 kHz. Faster envelope matter of trial and error establishing of waveforms can be achieved by reducing the required bit patterns, writing data to the resolution of the envelope from 4 to the chip, listening to the resultant sound, 3 bits (bit 5 of byte E0 or El). The speed debugging the data and register selec- Circuit description and construction The sound generator board is composed of relatively few parts— see the circuit diagram of Fig. 3. The WR signal for the_SAA1099 is made by combining R/W and 02 in gates Ni and N2. The crystal-controlled oscillator built around Ti and T; provides the 8 MHz clock signal for the sound generator chip. The pulse-width modulated output signals of the SAA1099 are converted to analogue in R-C filters composed of Rj.-.Rr inch and Cj...Cs inch Inte- grated stereo output power amplifier ICi can provide about 2 x 200 mW to the loudspeakers. Construction of the board is straight- forward, and requires no further detail- ing. Supply power for the sound gener- ator board may be obtained from the computer. Due attention should be paid to adequate decoupling, however: in some cases, interference on the supply lines from the computer will necessitate feeding the board from a separate, regulated, 5 V supply (cut off pins 1 and 2 at the board side of edge connector Ki). Control software Control programs for the sound gener- ator board should be written with ease of register operations in mind. A simple, yet effective, way of achieving access to the registers and their contents is to elektor india may 1988 5.33 Fig. 3. Circuit diagram of the stereo sound generator board. make use of a register selection subroutine, in conjunction with data statements and arrays. Also, do not forget to copy data written to the registers in reserved memory areas of the computer. The program structure shown in Fig. 5 is intended as a guide for writing one’s own control programs for the sound gen- erator board. The program starts by dimensioning array variable ’’register”. This array is set up to enable the com- puter to keep track of the data written to the registers in the interface. Next, all registers in the SAA1099, and array ’’register”, are reset to nought in a FOR- NEXT loop. The program then enters a infinite loop for fetching register selec- tion codes and data from the keyboard, and transferring these to the SAA1099 via the Universal I/O bus. First, the register contents are displayed on screen, so that the status of all registers is known at any time. Consecutive INPUT statements then prompt the user to enter the register address, and associated data. The program then updates the contents of array "register", and, of course, that of the addressed register. It then returns to the loop entry point. Finally, here are two examples of sounds that can be generated by the sound ef- fects board: Steam locomotive : set AR2 and AL2 to an arbitrary value greater than 1. Set NE2=1; N0=0; E0=4. Bits and bytes not mentioned are set to nought, except, of course, the sound enable bit. Bell: set the volume as required (AR2 and AL2). Set F2 = FFn, 02=7; FE1 = 1; FE2 = 1 ; E0= 4 and SE = 1 . Bits and bytes not mentioned are set to nought. St Reference: Universal I/O bus. Elektor India, June 1985. Fantasia on a MIDI theme. Elektor India, December 1985. Completed prototype of the stereo sound effects generator for the Universal I/O bus. 5.34 Fig. 4. Printed circuit board for building the stereo sound generator. Before proceeding with a discussion of the parametric equaliser it is perhaps a good idea to discuss why it is superior to the more common 'graphic' equaliser. A 'graphic' equaliser such as the Elektor Equaliser consists of a number of band selective filters with fixed centre fre- quencies spaced at equal inter- vals on a logarithmic frequency scale, usually at octave inter- vals, though more expensive units may boast third-octave filters. Each of these filters equipped with a gain control so that it can apply boost or cut to the of frequencies over ch it is active. The 'graphic' arose from the common A combination of state- 8 variable filters and a highly specialised Baxandall tone control network is used in the 'parametric' equaliser described in this article, which offers considerable advantages over the more common 'graphic' equaliser. Use of a parametric equaliser allows the frequency response of a domestic hi-fi setup to be tailored to a degree previously only attainable in recording studios. Such is the versatility of a parametric equaliser that even sceptics who turn up their noses at audio equalisers may be forced to revise their opinions. equency response of the system. However, the term 'graphic' will be used to dis- tinguish between this type of id the parametric The only variables in a graphic equaliser are the gains of the ndividual filter sections, since ~ the centre frequency and Q (which determines the bandwidth) of each filter are fixed. A parametric equaliser has fewer filter sections than a graphic equaliser, but all the para- meters of the filter are adjustable, gain, bandwidth and centre frequency. A block diagram of the Elektor para metric equaliser is shown in figure 1 This consists basically of just three parametric filter sections - band selective filters whose gain, centre fre- quency and Q are all adjustable. De- ficiencies at the ends of the audio spec- trum are catered for by a parametric Baxandall-type tone control to provide bass and treble adjustment. These controls operate in a similar manner to the parametric filter sections, but employ lowpass and highpass filters rather than band selective filters. Figure 2 shows how the characteristics of a parametric filter section may be varied. Figure 2a shows variation of the gain, figure 2b shows adjustment of the bandwidth, while figure 2c shows adjustment of the centre frequency. Figure 3 illustrates the adjustments possible with the parametric tone controls. Figure 3a shows how variable boost and cut may be applied to the extremes of the audio spectrum, as with normal tone controls, while figure 3b illustrates the unique feature of the parametric tone controls, namely the adjustable turnover frequencies of the bass and treble controls. Having briefly discussed the differences between parametric and graphic equal- isers, the advantages of a parametric equaliser can now be illustrated. In a nutshell, the purpose of an equaliser is to make the frequency response of an audio reproduction chain flat by providing gain where there are dips in the response and attenuation whe^e there are peaks. Figure 4a shows the response of a typical reproduction chain, as might be measured using an audio analyser. This has a number of obvious deficiencies. The 'grass' on the trace is due to a large number of sharp (high Q) resonances, which can be as mafceip much as 20 dB deep. Fortunately these peaks and troughs are inaudible due to their very sharpness, since they each occupy a bandwidth of only a few Hz. This is perhaps just as well since it would be impossible to cancel out each of these resonances. If this 'grass' is ignored then the response becomes something like that shown in figure 4b, in which the major deviations from a flat response are more readily apparent. It is evident that the response falls off sharply below 50 Hz and above 10 kHz, that a large peak exists at about 750 Hz and a trough at about 6 kHz. In addition there is a slight 'ripple' in the response due to a number of peaks and troughs a few dB deep. If one accepts the fact that deviations of a few dB can be ignored (and that in any case they will be very difficult to eliminate) then the response curve can be simplified to that of figure 4c, which shows only the principal deviations from a flat response. These are the deficiencies that must be removed by an equaliser. Parametric or graphic? It is fairly obvious that to remove a peak or trough from the frequency response the correction applied must be the exact inverse of the deficiency, i.e. the boost or cut applied must be the same as the depth of the trough 3 S3 Hill! ■II llll llll rai \mmm- S3 Will IIHMV U'.ll Mil iiHHIIIIIII 5X52 RJ ms \mwd iinaaisin; T ' mu wm Si!! rSgjjjjj! v >wSS - Mill iB'IKMI ISSiSSilll -J i jzz- us® IjMiHi!!! Zj mwmmmmm SSi «ii; SSiiiiii! — Emtimtmm or height of the peak, it must be applied at exactly the right frequency, and the Q of the correction network must be the same as that of the peak or trough. It is apparent that these criteria can hardly ever be fulfilled by a graphic equaliser. Firstly, it is unlikely that the centre frequency of a peak or trough would coincide with the centre fre- quency of one of the equaliser filters. Secondly, since a graphic equaliser has filters with a fixed Q the shape of the filter response cannot be tailored to fit the curve of the peak or trough. In fact the only parameter that can be varied in a graphic equaliser is the degree of boost or cut. With a parametric equal- iser on the other hand, the gain, centre frequency and Q of a filter section may be varied so that it is almost an exact fit for the peak or trough which it is to eliminate. At the extremes of the spectrum Baxandall tone controls with variable gain and turnover frequency can be used to compensate for the 'droop' which occurs. Like the graphic equaliser, a parametric equaliser may have any number of filter sections. The filter sections are necessarily rather more complex than those of a graphic equaliser; however, since each filter section is considerably more versatile it is possible to achieve satisfactory results with fewer filter sections, so that the cost is comparable with that of a graphic equaliser. For normal domestic use an equaliser consisting of three parametric filter sections plus Baxandall tone controls should be quite adequate. Parametric filter section The block diagram of a parametric filter section is given in figure 5. The heart of the filter is a selective network, which will be described in detail later, whose centre frequency and bandwidth (Q) can be independently varied. The gain of the filter can be varied by a ganged potentiometer, PI. The selective network is a state-variable filter or two-integrator loop, which readers of the 'Formant' synthesiser articles will recognise as being essentially similar to the Formant VCF. However, in this circuit the centre frequency of the filter is manually controlled by a two-gang potentiometer Rj nt , whose two sections vary the time constants of the integrator stages. The Q of the filter, and hence the bandwidth, is varied by altering the values of Rq. Complete filter circuit Figure 7 shows the complete circuit of a parametric filter section. The state- variable filter around A1 to A4 is immediately recognisable, as is the variable gain amplifier, IC1. The Q determining resistors and potentiometers Rq become R6, R7 and P2, whilst the centre frequency is set by P3. This arrangement differs somewhat from that shown in figure 6. However, if Rj n | were a potentiometer connected as shown in figure 6 then it would have to have an inconveniently large value if the desired tuning range were to be covered. The arrangement of figure 7 is electrically equivalent and allows the effective value of Rj nt to be 5.40 10 Parts list to figures 8 and 10 Resistors: R1 1 - 100 k R2.R4,R6,R8 = 18 k R3.R5.R7.R9 = 3k9 R10.R11 = 8k 2 P1.P2 - 22 k lin stereo P3.P4 - 47 k log Capacitors: C2.C3,C4.C5,C6.C7,C1 0.C1 1 . C12 - 100 n C8- 56 n C9- InS Semiconductors: IC1 ,IC2 = LF 356 A or LF 357A MINI DIP (National) IC3 - 4136 (Exar. Raytheon) 1 omitted in certain cases.see text 1 in some cases may be replaced by a wire link; see text. 5.42 i may 1988 Figure 12. The comple network connected between A3 and A4. The breakpoints of these filters can be varied, between 50 Hz and 350 Hz for the bass control using P3, and between 2 kHz and 13 kHz for the treble control using P4. The maximum gain of both controls can be varied between ± 15dB using PI and P2. Construction To make the equaliser more versatile it was decided to use a modular form of construction so that as many filter sections as required could be included. Tflis also means that the sophisticated tone control section can be used as a unit in its own right by those readers who do not want an equaliser but would like a versatile tone control Each filter section is therefore built on an individual printed circuit board, the track pattern and component layout of which is given in figure 9, whilst a separate board is used for the tone controls, the layout of which is given in figure 10. The boards are so designed that, when they are stacked side by side, the output of one board aligns with the input of the next. The connection points for the potentiometers are all labelled with letters, which correspond to those printed in the circuit diagrams of figures 7 and. 8. The interconnection of three filter sections and a tone control section to form one channel of a complete equaliser is shown in figure 11. If a stereo version is required then this arrangement must, of course, be duplicated. To avoid cluttering the dia- gram the potentiometer connections are shown to only one filter section and the tone control section. However, connections to the other three filter sections are identical. Since the inputs and outputs of each section have the same DC potential (zero volts) the input coupling capacitor Cl and resistor R1 are required only on the board connected to the input. On every other board R1 can be omitted and Cl be replaced by a wire link. Since the zero volt rails of each board are inter- connected via signal earth the '0' connection of every board except the tone control should be left unconnected, otherwise earth loops may occur. Only the '0' connection on the tone control board should be connected to the 0 V terminal of the power supply. For the power supply the use of a pair of the commonly available 1C voltage regulators is suggested. Alternatively, if the equaliser is to be incorporated into an existing system with a ± 1 5 V supply then it may be possible to derive the supply to the equaliser from tffis. The choice of a suitable housing for the equaliser is left to the taste of the individual reader. One point, how- ever, is worth noting. Adjustment of the equaliser is fairly time-consuming, but once the controls are set they should not require readjustment unless there are any changes in the reproduction chain or listening environment. It is thus a good idea to make the controls tamper-proof, for example by fitting a lockable cover plate in front of them, or by fitting spindle locks to the individual potentiometers. Alternatively the knobs could be dispensed with altogether, the ends of the spindles slotted to accept a screwdriver and the potentiometers recessed behind holes in the front panel. 1 5.43 TUNEABLE PREAMPLIFIERS FOR VHF AND UHF TV The second, final, article on remote-tuned, masthead mounted, RF preamplifiers deals with high-performance aerial boosters for the VHF and UHF TV bands. These circuits give a considerable improvement in reception compared to run-of-the-mill wideband aerial boosters. Connected to a good directional aerial, they are ideal for picking up signals that are normally noisy, or impaired by cross-modulation from strong nearby transmitters. But TV DXers need not be told . . . The preamplifiers described can be built by anyone with reasonable experience constructing electronic circuits. Special care has been taken in the designs to minimize the necessary work on induc- tors, while alignment is straightforward, because in most cases it only entails set- ting a direct current. The amplifiers are built on high-quality printed circuit boards available through our Readers' Services, and are tuned and powered from the master tuning/supply unit de- scribed last month. VHF preamplifier: circuit description What is commonly referred to as the VHF TV band is roughly the frequency range between 45 and 68 MHz (Band 1), but also that between 175 and 225 MHz (Band 3). Band 2 is the FM radio broad- cast band. It is important to note here that the above band limits are given as guidance only, because they are set dif- ferently in many countries and regions in the world. This also goes for the TV system used (PAL, SECAM, NTSC, positive/negative video, horizontal/ver- tical polarization, number of lines, channel assignment, frequency of the sound subcarrier, etc.). In the United Kingdom, Band 1 is currently allocated to military communications; the former TV services in that band have been trans- ferred to UHF in 1983. The circuit diagram of the VHF pre- amplifier is given in Fig. 1. Unbalanced (50.. 75 Q) or balanced (200... 300 Q) cables are connected to input inductor Lia. The aerial signal is coupled induc- tively to the base of low-noise RF tran- sistor Ti via Lib and Ci, which is con- nected on a tap for impedance matching. The input inductor, Li, is tuned .to the relevant TV channel by the series capacitance formed by varactors D3-D4. The voltage at the junction of these vari- able capacitance diodes is the voltage on the downlead cable minus 8.2 V. The junction capacitance of a varactor decreases with the reverse voltage on it, so that the lowest value of the downlead voltage, 9 V, causes the input inductor, Li, to resonate at the lowest frequency, i.e., the preamplifier is tuned to the lowest TV channel. The amplifier can be set up for oper- ation in TV Band 1 or Band 3 simply by fitting the appropriate inductor in pos- ition Li (this will be reverted to under Construction). Choke Lj forms a high impedance for the amplified RF signal on the downlead coax cable, and feeds the tuning/supply voltage to series regulator T2 and zener- diode Di. The function of these compo- nents is similar to ICi and Dj in the FM-band preamplifier described last month. The forward drop across LED Di is fairly constant, and provides the reference voltage at the base of regulator T:. Preset Pi makes it possible to set the optimum collector current for the RF amplifier transistor, Ti. RF signals at the base and collector of the BFG65 are blocked from the bias voltages by chokes L2 and Li, respectively. Gain of the pre- amplifier is fairly constant at about 18 dB, both in Band 1 and Band 3. The noise figure was not measured, but should be of the order of 1 . . .2 dB, i.e., considerably lower than almost any con- ventional wideband aerial booster. Fig. 1. Circuit diagram of the low-noise, remote-tuned, preamplifier for VHF TV Band 1 or 3. VHF preamplifier: construc- tion Commence the construction with mak- ing Li as required for the relevant fre- quency range (note that this may extend beyond the indicated band limits). Do not skip the constructional hints in the following paragraphs if you intend to build the Band 1 version of the pre- amplifier. Band 3 (175—225 MHz): 1. Close-wind Lib as 4 turns 01 mm (SWG19) enamelled copper wire around a 06 mm plastic former. Use a miniature screwdriver to spread the turns evenly at about 1mm. Study the pos- ition of the inductor on the board, and bend the wire ends towards the holes provided. Use a scalpel or sharp hobby knife to remove the enamel coating on the wire ends over a length of about 3 mm. Pretin the connections, scratch off residual solder resin, and pretin once more. Check for a smooth, tinned, sur- Fig. 2. Close-up photographs showing induc- tor Li in the VHF Band 3 preamplifier. Fig. 2a: seen from the side of Lib; Fig. 2b: seen from the side of Lia (note the tap made in twisted wire). PCBs & Set of COMPONENTS for projects are normally available with PI*CCMOUS ELECTRONICS CORPORATION 52-C Proctor Rood. Bombay-400 007 Phones: 367459/369478 Fig. 3. The printed circuit board for the VHF Band 1 or 3 preamplifier. VHF PREAMPLIFIER. CIRCUIT DIAGRAM: FIG. 1. Resistors l±5%): Pt = 100K R2 = 100R R3-680R Ra = 3K3 Ra= 10K Pi = 100R preset H Capacitors: Ci;C2=1nO miniature ceramic plate; pitch: ; ,C3=47/r: 35 V; axial Semiconductors: Dt = red LED D2= zenerdiode 8V2; 400 mW D3;Di = BB405 T i = BFG65 T2 = BC160 Inductors: Winding data and materials are stated in the Miscellaneous: PCB Type 880045 1 2. Locate the position of the tap on Lib at 1 turn from the ground connection. Carefully scratch off the enamel locally, pretin the small copper area, and con- nect a short length of 00.5 mm (SWG25) enamelled copper wire. Place the plastic former plus inductor onto the PCB, and bend the tap wire towards the relevant hole. Do not solder any connec- tion as yet. Make sure that the tap does not create a short-circuit between the turns of Lib. 3. The input coupling inductor, Lia, is wound as 2 turns 00.5 mm (SWG25) enamelled copper wire, with a tap at the centre. Wind this inductor in between the turns of Lib to assure the necessary inductive coupling. Insert the wire below the turn of Lib that has the tap on it. Wind the wire upwards into the free space between the turns of Lib, until it is opposite the connections of Lib. Draw out about 4 cm of the wire, fold it back again towards the former, and wind the last turn upwards into Lib. 4. Use precision pliers to twist the 2 cm long wire pair that forms the tap on Lia. Hold the end of the wires in the pliers, and carefully revolve these in your hand until the wires cross practically at the body of the plastic former. 5. Place the former with the inductors on it onto the PCB, and revolve both Lia and Lib until all six wires can be in- serted in the respective holes. Scratch off the enamel coating from the tap and the ends of Lia, pretin, clean again by scratching, and ensure a smooth soldering surface. Press Lib together to lock up the turns of Lia. The final ap- pearance of the completed inductor is shown in the photographs of Fig. 2. Drill and file the hole that receives the plastic former. Fit the wires of Li into the respective holes, and verify correct continuity. Do not use a core in Li. Band 1 (45—68 MHz): For the lower frequency range, Li is wound on a Type T50-12 ferrite core (012 mm) from Micrometals. 1. Wind LIA as 8 turns 00.5 mm (SWG25) enamelled copper wire, with a twisted centre tap created as discussed above. 2. Wind Lib as 20 turns of 00.5 mm (SWG25) enamelled copper wire, with a twisted tap at 4 turns from the ground connection. 3. Fit the complete inductor onto the PCB, making sure that the windings remain secure on the ferrite ring. Chokes Li, Li and are identical for both versions of the VHF preamplifier. They are wound as 4 turns 00.2 mm (SWG36) enamelled copper wire through small ferrite beads (length: approx. 3 mm). The printed circuit board for the VHF preamplifier is shown in Fig. 3 (note that the component overlay is relevant to the ^46 elektor india may 1988 version for Band 1). Completion of the preamplifier should not present prob- lems. Grounded component wires and terminals are soldered at both sides of the board. Coupling capacitors Ci and Ci are miniature, plate or disc, ceramic types with a lead spacing of 5 mm. Mount these as close as possible to the PCB surface. Conversely, mount T 2 in a manner that rules out any likelihood of a short-circuit between the T05 case (which is at collector potential) and the PCB ground surface. Finally, fit a 15 mm high brass or tin metal sheet across Ti as indicated by the dashed line on the component overlay. The UHF preamplifier: circuit description. The circuit diagram of the low-noise, remote-tuned, UHF preamplifier for masthead mounting is shown in Fig. 4. Like the VHF booster, this amplifier is based on the Type BFG65 RF transistor from Valvo (Philips/Mullard), but in this application has tuned input and out- put circuits. The tuning voltage for varactor pairs D 1 -D 2 and Dj-Dj is ob- tained as in the FM-band and VHF pre- amplifiers, namely by subtracting the fixed drop across a zenerdiode from the voltage carried on the downlead coax connected to the master tuning/supply control. The tuning range of the ampli- fier covers the entire UHF TV band (470— 860 MHz). The shaded rec- tangular blocks in the circuit diagram arc straight lengths of silver-plated wire that function as inductors (Li; L 2 ). Balanced aerials or feeder systems with a termination impedance of 200. . .300 Q are connected to Lib. This coupling in- ductor is omitted when the input signal is unbalanced (50. . .75 Q). In this case, the centre core of the coax cable is con- nected direct to a matching tap close to the ground connection ( cold end) of Lia. Regulator ICi ensures that Ti is fed with a constant supply of 8 V, while Pi is used for setting the optimum collector current (this can be read on a microam- meter connected to test points TP1 and TP2). The UHF amplifier has a typical gain of 12 dB and, like the VHF version, achieves a noise figure that beats the vast majority of wideband aerial boosters. The UHF preamplifier: construction The UHF TV band preamplifier is con- structed on the PC board shown in Fig. 4. Circuit diagram of the preamplifier for UHF TV reception. Fig. 5. Track layout and component mount- ing plan of the PCB for the UHF preampli- Fig. 5. Study the component overlay, and bend Lia (if required). Lib and L: to size from 01 mm silver plated copper wire (CuAg). Do not solder these induc- tors in place, however, until they run straight over the full length, and are pos- itioned so that the top of the wire is always exactly 3 mm above the PCB sur- face. Fit leadless disc or rectangular decoupling capacitor Cj in the slot pro- vided in the PCB. This (brittle!) capaci- tor is soldered once at the track side (connection to L2), and twice at the component side (ground and, again, L2). Now position the RF transistor, Ti, in between the wire inductors, and solder the 2 emitter terminals direct to the ground surface. Carefully bend the col- lector terminal upwards, cut it to length, and solder it to the tap on L2. One ter- minal of coupling capacitor C2 is also connected direct to this junction, while the other terminal is secured in a PCB hole — see the photograph of Fig. 6. Bend the base terminal of Ti upwards, and carefully cut this to a length of about 2 mm. Solder a InF SMD capaci- tor, Ci, in between the tap on Lia and the base terminal. Ri is also soldered direct to the base junction. Fit a 15 mm high screen across Ti as indicated on the component overlay. Wind choke L3 as 6 turns 00.2 mm (SWG25) through a small (3 mm long) ferrite bead. The Fitting of the remainder of the components is straightforward, Fig. 6. Top view of the line inductors in the preamplifier for UHF TV. and should not present problems. Be sure, however, to observe the polarity of the 3 electrolytic capacitors and the 5 diodes! Figure 7 shows completed prototypes of the VHF and the UHF aerial boosters. Setting up The setting up of the preamplifiers mere- ly entails adjusting the collector current of the RF transistor, and finding out which value of the tuning voltage cor- responds to a particular TV channel. VHF preamplifier: Insert an ammeter between the collector of T2 and La. Connect the power supply/tuning unit described last month, and set the output voltage to 20 V. Ad- just Pi for a reading of 5 mA, then verify the presence of about +11 V on the varactor junction. Vary the tuning voltage, and verify that the collector cur- rent of Ti remains constant. The LED will light dimly. Connect the preamplifier to the aerial and the supply/tuning unit. Also con- nect the TV set, and set up a tuning scale by marking the channel numbers as a function of the tuning voltage. In the case of the Band 3 preamplifier, the tun- ing range can be corrected by carefully compressing or stretching the turns of Lib. The collector current of Ti is optimized by tuning to a weak transmission, and setting Pi for minimum noise. This set- ting is typically found at collector cur- rents between 3 and 10 mA. UHF preamplifier: Connect a millivolt meter to TP1 and TP2 as shown in the circuit diagram. Set Pi for a reading of 500 mV. Make notes of the tuning voltage required for a number of TV channels in the UHF band, and provide a UHF tuning scale on the master supply/tuning unit. General considerations The values stated for the operating cur- rent of Ti are given as a compomise be- tween a low noise figure (low collector current), and high amplification in com- bination with good intermodulation characteristics (high collector current). The collector current may, therefore, be set to different values to suit the appli- cation in question. As stated in last month's article, there is little point in installing the remote-tuned preamplifiers in any place other than as near as possible to the relevant aerial. This is the only way to prevent the at- tenuation introduced by the downlead coax cable degrading the system noise figure. The preamplifiers described have sufficient gain to bring the system noise figure down to practically the preampli- fier noise figure, but only if they are properly aligned and installed. B Readers interested in TV-DXing are ad- vised to contact the British Amateur Television Club « Mr Dave Lawton GOANO • "Grenehurst” • Pinewood Road • High Wycombe • Bucks HP12 4DD. Fig. 7. Prototypes of the VIIF preamplifier (left; Band 3 version), and the UIIF preamplifier (right). RADIO COMMUNICATIONS FOR THE FUTURE by Dr. Chris Gibbins, Rutherford Appleton Laboratory Overcrowding of the radio spectrum is severely restricting the re- liability and information-carrying capacity of existing communi- cations systems. But moving to higher frequencies, where there is more room, brings a different set of problems to do with the atmosphere and weather. Research at the UK Science and Engineering Research Council's Rutherford Appleton Laboratory is compiling valuable data for the design of systems for the future, exploiting frequency bands that are so far little used but for which the necessary technology is already available. A massive expansion in radio communi- cations over recent years has generated an ever-increasing demand for more channels, and those channels are having to carry more and more information, be it voice, television or other kinds of data. The net result is that the radio spectrum, a restricted resource, is fast becoming overcrowded. This creates problems of interference between adjacent channels (as anyone who listens to short-wave radio, especially at night, will know well) with reduced reliability. There is an additional side-effect of such over- crowding: the bandwidth available to each channel, which determines the amount of information that can be transmitted, is severely limited.' That in itself restricts both the capacity and the reliability of communications systems. Millimetre waves A remedy for these problems is to be found in exploiting higher and higher frequencies, made possible through (lie development and availability of new technologies. Communications now ex- tend well into the microwave region of the electromagnetic spectrum (fre- quencies up to 30 GHz) and even beyond wave radio signals by Ihe Earth's atmosphere at sea level. Molecular attenuation is present all the time and is produced by water vapour Articles on MSX extensions in Elektor India : I/O bus, digitizer and 8-bit I/O bus: January 1986, p. 66 ff. Cartridge board. February 1986, p. 32 ff.; Add-on - bus board. March 1986, p. 55 ff.; Bus direction add-on for MSX exten- sions. July/August 1987, Supplement p. 52. Please refer to Past Articles on the Readers Services page in this issue. selex-34 TORMENTOR bedroom lights again, in The pranks comitted by the young devils are probably as old as the human race itself. In the course of time only the ways and means have changed. The electronics age must also have its effect on these pranks. If one puts a living spider or a frog in the bed of an unfavourite aunt, it will certainly achieve the desired result even in this electronics age. The placing of an electronic animal in the bedroom is not only modern, but it also contributes to the protection and conservation of the animal world. An ingenious circuit provided here for this purpose, called the"TORMENTOR" is capable of causing enough harassment. It very closely imitates the noise of a fly or a cricket. Hiding in the bedroom, the tormentor starts making the noise as soon as the lights are switched off. Angry about the nuisance, the target would probably switch on the order to search for the cause of this vile action. However, the tormentor immediately becomes silent. After a search in vain, as the lights are switched off again, the nuisance starts all over again. The electronic tormentor is really a genuine night animal. CIRCUIT: Figure 2 shows the circuit diagram of our tormentor. The "EYE" of the tormentor is an LDR (Light Dependent Resistor). The value of an LDR drops as the light increases and becomes very high in darkness. The LDR and the trimpot PI form a voltage divider, with a ratio dependent on the light conditions. The voltage of this potential divider reaches over R1 to the input of the NAND gate N1. The combination of gates N1 and N2 functions as a schmitt- trigger, as the output signal of N2 is fed back to the input of N1 over the resistor R2. If the voltage at the junction of the LDR and the trimpot falls below a certain value, then effectively N1 goes from logical 1 to logical 0 value at the input. Output of N1 goes to logical 1 and the output of N2 goes to logical O, which is in turn connected to the input of'NI ovoer R2. A rise in the voltage at the junction of the LDR and trimpot switches the output of N2 from logical 0 to logical 1 in a similar fashion. When the bedroom lights are on, the LDR resistance is low and this makes the transistor T1 conduct. When the lights are switched off, T1 is blocked. When T1 conducts, the capacitor Cl discharges through T1, when T1 is blocked Cl charges over resistor R5. The second schmitt-trigger consisting of N3, N4 and R7 controls the tone generator made of 555 1C. The tone generator is further connected to the loudspeaker. The capacity of Cl decides the time, which passes from the switching off of the bedroom lights till the tormentor starts showing (he I signs of life. The nuisance Figure 1 : The "TORMENTOR" and the target of harassment. value depends on C2 and the ratio of resistance values of R9/R10. The volume is decided by R8. CONSTRUCTION: The "TORMENTOR" can easily fit onto a small SELEX PCB of size 1 . The component layout is shown in figure 3 and the completed circuit in figure 4. The LDR can be directly mounted on the PCB as shown in the photograph It can also be connected over a two core wire, which is not too long. This may make it a bit easier to hide the tormentor with the LDR still exposed to the bedroom light. The maximum length that can work should be decided by trial. The trimpot can be adjusted to set the desired voltage level at the junction of LDR and the trimpot in such a way that the circuit starts functioning when the bedroom lights are switched off but stops functioning when they are switched on. One final tip: The success of the tormentor depends on how nicely you are able to hide it. However, Elektor takes no responsibility of the consequences of the use of this tormentor! Use it at your own risk. = ioon = 470 Kfl = 2200 RIO = 27 KO I = LDR = 47 Kfl Trimpot = IOOOuF/IOV = lOnf = lOOnF - BC 547 C - 4011 The ready to use tormentor - 1 night ghost in the electronic - Loud Speaker 80/250 mW Battery NEW PRODUCTS • NEW PRODUCTS • N Wattmeter Economy’s Digital Wattmeter Uses LSI chips to achieve accuracy. It is also pro- tected against load transients. It is used in many industries where measurement and control of power plays important role like heaters, furnaces and appliances manufacturing units. This in- strument has various features such as Di- rect Digital Display of values & Sunlight visible LED display. M/s. Economy Electronics • 15 Sweet Home • Plot No. 442 • 2nd floor • Pitamber Lane • Off Tulsi Pipe Road • Mahim • Bombay- 400 016. PCB Mounting Connectors IEC have now introduced New PCB Mounting Connectors with 5 mm pitch. These Printed Circuit Board Mounting Connectors are moulded in Nylon 6 and njanufacturedin 2/3 way lengths. They are designed to interlock together so that any length of connector can be built up. Thcj accept side entry conductors upto 4 Although in their standard form they are unmarked, the facility is provided to en- able individual marking of terminals with press-in markers. Asia Electric Company • Katara Man- sion, • 132 A Dr. A Besant Road • Worli • Bombay- 400 018. Dust Covers G.H. INDUSTRIES Introduces "DUST COVERS" for 25 Pin & 9 Pin “D” Con- nector. These covers protect the Solder Contacts against mechanical stress and Environment. Available in Chrome plated & in different colors-Grey, Pale white, Blue & ■Black. Hardware accessories are provided along with covers for fixing“D" Connec- tor along with cable. G.H. Industries • 84-B Government In- dustrial Estate • Kandivli • Bombay- 400 067. Universal Controller The Universal Controller Micro Mac - 6000 from Analog Devices Inc is a prog- rammable system which interfaces to the real world via single channel signal con- ditioning modules. Unlike PLCs and Loop Controllers, Micro Mac - 6000 can direct more com- plex strategies because it is not limited to ladder logic and does not require add on signal conditioning solutions. Optimised for Analog I/O Micro Mac- 6000 supports 56 analog and 256 digital II O points. Murugappa Electronics Limited. • ‘Parry House' • Third floor • 43, Moore Street • Madras- 600 001. • Phone: 27531, 21003, 21019. Data Scanner This instrument is used for monitoring temperature, voltage or any other vital parameters in continuous process indus- try. One can programme data for each channel through a key board. It has a 24 column dual colour alphanumeric printer with re-rolling facility for logging data with real time. Modular construc- tion using standard bus PCBs has been incorporated to minimize wiring and re- ducing servicing down time. EEPROM’s have been used for a storage of program- med data. Re-chargeable back-up has been provided for the real time clock. 1546 • Bombay-400 001. Bread Board Prem Plastics have introduced Solderless Breadboards which are idal as educa- tional teaching aids and a tool for design- ing electronic circuits. The Breadboard can be combined into any required size with combinations of terminal strips and distribution strips. Various models arc available. The spring clips are made of Phosphor Bronze and can accept wire of 20-29 AWG (0.03 to 0.08 mm) in all DAP sizes. ICs, Diodes, Resistors, Capacitors, Transistors and more can be plugged right into the Socket and/or strip. Prem Plastics • 9, Bharat Idustrial Es- tate • T.J. Road • Sewree • Bombay- 400 015. 5.60 ele NEW PRODUCTS • NEW PRODUCTS • N CPU Connectors G.H. INDUSTRIES Introduces CPU CONNECTORS manufactured Indi- genously. It consists of Male Headers and Female Connectors harnessed "with 23/36 gauge wires with different wire lengths. The Male Headers Pins are 1.14 X 1.14 mm square wiht 3.96 mm pitch. CPU Connectors are available in 2, 3, 4. 5, 6, 7, 8. 9, 10,11 & 12 ways. Used in Computer Power Systems, Instrumenta- tion & Control, Telecommunication. EPABX give power Connections. G.H. Industries • 84-B, Government In- dustrial Estate • Kandivli (West) • Bom bay-400 067. • Tel.: 6050097. Tester Equilab model TP-78 is designed for quick checks of electronic components for open/leaky condition, identification of type, gain matching, and electrical continuity. It requires two small cells for operation current drain is less than 10 mA when in operation, therefore safe for semi conductor junction. Basic price Rs. 60/-. Electronic Instrument Laboratories • B 69/004 Anand Nagar • Chhatrapati Shivaji Road • Dahisar (East) • Bom- bay-400 068. Temperature Indicator HOSH AKUN offers a Digital Tempera- ture Indicator with 25 mm LED Display thereby extending the viewing distance. Ranges available are from - 200° C. to + 1200° C, with suitable sensor like Cr/Al. Fe/Const. thermocouple or PRT Bulbs. Automatic ambient temperature com- pensation and broken sensors indication are incorporated. The instrument is 230 Volts A.C. mains operated. The instru- ment size confirms to DIN standard panel cutout. Hoshdkun • Vivek Appartments • Plot No. 15 • Tulshibagwale colony • Sahar- karnagar No. 2 • Pune- 411 009. Insulation Tester Eamomy’s Digital Insulation Tester has 3 fundamental features, 1) It measures the insulation properties on two different ranges, VIZ 20 M OHM & 2000 M OHM. 2) Resistance is measured in 5 ranges Viz 200 Ohms, 2, 20. 200 and 2 M OHM. 3) The instrument is measured the line voltage if the probes are connected to the AC supply up to 1000 Volts. M/s. Economy Electronics • 15, Sweet Home • Plot No. 442, • 2nd floor • Pitamber Lane • Off Tulsi Pipe Road • Mahim • Bombay- 400 016. Computer Development System Professional Electronic Products has in- troduced an advanced 16/32 Bit Single Board Computer/Development System, SBC-68K-1, designed for training and development. Features include MC 68000 CPU operating at 8MHz, 24K bytes of powerful EPROM monitor in- cluding single line assembler/disasem- bler 128 K dynamic RAM, two RS232C serial ports for connection to CRT Ter- minal and host computer, on board CRT controller (6845), 24-bit programmable timer, 16 + 24 parallel I/O lines, on board audio cassettes interface, on- board EPROM programmer for prog- ramming 2716 to 27256 EPROMs and HN 48016 EPROMs, optional 68000 macro cross assembler to run on any IBM PC compatible. Professional Electronic Products • PB 316 Delhi Road • Opp Old Octroi Post • Meerut • Uttar Pradesh 250 002. Machine Screws PIC offers a very wide and comprehen- sive range of Machine Screws for almost all applications. tflilf! Hfltl Precision Industrial Components • 15EI- cheewala Bldg. • 2nd Floor • 11 Keshavji Naik Road • above Corp Bank • Bombay- 400 009 5.62 ele RN No 39881/83 MH BY WEST - 228 LIC No 91 S-17. M l. DC. Bhosari. Pune 411 026, India. (0212) 82682. 83791 Cable CHAMPION Telex: 0146-343 CHMP IN 0145-333 MCCI IN. 0145505 MCCI IN.