to-date electronics for lab and leisure a modern grid dip meter touch tjuning for F.MS. tuners digifarad: capacitance meter with digital readout. , page 1 0-06 Construction of the touch tuning circuit re- 1 quires a bit of handiwork with a fret-saw. The printed circuit board consists of three sections; once separated, the two smaller sections are mounted perpendicularly to the main board to form a compact module. The gate dipper is a useful little device that can be used to determine the resonant frequency of tuned circuits. Basically, it is the modern equivalent of the old grid-dip meter. The 'heart' of the strain gauge is the 'stress absorber', which consists of a sheet of suitable metal onto which a | bridge configuration of * four electric-resistance strain sensors are bonded. 'I played TV games . . .' i is a description of the TV games computer, written by a novice and for novices! One thing has become quite clear: ; with a little practice, even fairly sophisticated programscanbe designed. HHffl October 1979 Jvolume 5 number 10 nu4Uiiiui|'(d'/ n r -jhf touch tuning An important selling point of modern stereo tuners is the number of preset stations which can be selected. However for the home constructor, this is often a feature which must regrettably be foregone, being regarded in many designs as something of a luxury. The circuit described is intended to remedy that situation, by providing for up to 9 touch con- trolled preset stations. The only restriction is thet the receiver battery saver .... impedance bridge It is often very useful It is often very useful to be able to match the values of do this is by using an impedance bridge. The circuit described is quite adequate for this purpose and it is also capable of measuring resistances between 100 n and 1 M and capaci- tances between 100 pF and 1 pF. new programs for the SC/MP Good news for SC/MP fans: two new records have been added to the ESS range. One contains the complete NIBL-E program: the other includes some games, a 'running script 1 program, 'tracer', ‘disassembler' and 'biorhythm', Some digital rev counter (a. ohdei digifarad (J. Gutheri Given the fact that many types of capacitor - especially electrolytics - have a wide tolerance (20% is fairly common), it is often desirable to be able to measure capacitances both quickly and with a reasonable degree of accuracy. Of course a capacitance meter also enables one to measure the value of those piles of unmarked capacitors which end up at the bottom of one's junk box, or to test 'suspect' capacitors for potential faults - in short it represents a useful addition to short-interval light switch p.c.b. for variable fuzz box gate-dipper Tuning resonant circuits in high frequency equipment nor- mally requires fairly expensive test gear which not every hobbyist can afford. However there is a reasonably cheap alternative available, namely a gate dipper, which allows the resonant frequency of the tuned circuit to be ascertained simply and quickly. strain gauge (w. v. oreumei) There are few projects which have not formed the subject of gauge falls into that category. This in itself is perhaps slightly surprising, since there are a number of possible applications for such a device - a training aid for 'strength sports', measuring loads on cables, etc. or simple weighing purposes. I played TV games . programmable sequencer (c. Vos: missing link Elektor Publishers Ltd.. Elektor House. 10 Longport, Canterbury CT1 1PE, Kent. U.K. Tel.: Canterbury (0227) 54430. Telex: 965504. Office hours: 8.30 - 12.45 and 13.30 - 16.45. Bank: 1. Midland Bank Ltd.. Canterbury. A/C no. 11014587 Sorting code 40-16-11, Giro no. 315.42.54 2. U.S.A. only: Bank of America, c/o World Way Postal Center, P.O. Box 80689. Los Angeles. CA 90080. A/C no. 12350-04207. 3. Canada only: The Royal Bank of Canada, c/o Lockbox 1969, Postal Station A, Toronto, Ontario, M5W 1W9. A/C no. 160-269-7. Please make all cheques payable to Elektor Publishers Ltd. at the Elektor is published monthly. Number 51/52 (July/August) is a double issue. SUBSCRIPTIONS: Mrs. S. Barber January to December ii Semiconductor types Very often, a large number of with different type numbers. I this reason, 'abbreviated' type numbers are used in Elektor wherever possible: • '741 ' stand for pA741 , LM741, MC641. MIC741, RM741.SN72741.etc. e TUP- or 'TUN' (Transistor. Universal. PNPor NPN respe ively) stand for any low fre- quency silicon transistor tha of zeros are avoided wherever possible. The decimal point is usually replaced by one of the following abbreviations: Resistance value 2k7: 2700 «. Resistance value 470: 470 n. Capacitance value 4p7: 4.7 pF, t 0.000000000004 7 F . . Capacitance value 10n: this isth 10.000 pF™r > 0' V ° c - i. New home-video standard from Philips 8 hours of TV from one cassette The latest Philips and Grundig top-hit in the home-video field, the Video-2000 system, has received world-wide atten- tion, One cassette, containing about 1 000 feet of Vi-inch tape, can be used to record eight hours of colour TV. One cassette costs about £ 20, so that one hour of TV program costs just over £ 2 to record. By way of comparison, the first colour video recorder used well over £ 20 of tape per hour. The picture quality hasn't suffered by this drastic cost reduction. All in all, it's not just another step forward - it's a giant leap! Obviously, Philips and Grundig hope that the new video cassette will be accepted as an international standard, and that it will prove the same long- term success as its predecessor: the compact audio cassette. The Philips recorder, designed around this new cassette, is a beautiful piece of modern technology. The first obvious difference between the Video-2000 system and older Philips systems (and JVC's VHS and Sony's highly-praised Betamaxl is the narrow tape-track used. Until now, Vi-inch tracks were fairly common; Philips and Grundig use less than half - the Vi-inch tape in their cassette is used in both directions, since the cassette can be 'turned over'. It is used in the same way as the audio compact cassette -the only difference is that it is used to record television programs! The new cassette can not be used on older video recorders, like the N1700. That particular machine will be going out of production in the second half of 1980; suitable cassettes will, however, remain available for some time to come. A new video recorder, the VR2020, is designed to use the new cassette. The price is expected to be about 30% more i than that of the N1700— around the £ 600 mark. Several new features are ! included in the new machine, and these deserve some further explanation. Use of the tape Before discussing the recorder itself, it is a good idea to take a look at the way in which it writes the program materia! on tape. Figure 1 shows where the infor- mation is written on the tape. Br 1979- 10-01 Since the tape can be 'turned over', the upper and lower half of this 'tape map' are mirror images. Starting from the outside, the first 650 pm are used for a (mono) audio track. At a later date, if stereo sound ever gets off the ground for television broadcasting, this area can be divided into two 250 pm tracks with a 1 50 pm gap. The next 4.85 mm wide section is reserved for the video signal. This is recorded in a single track, like the audio signal; as in most video recorders, narrow (22.6 pm wide) tracks are recorded at a slight angle in this section. In this particular case, the video tracks are angled at 3° with respect to the tape 'axis' - for clarity, an angle closer to 30° is used in figure 1 . . . The final section of tape before reaching the centre (where the mirror image begins) is unused at present. This 300 pm wide strip of tape can be used, at a later date, for various control signals. All these sections are repeated on the other side of the centre line, for what is called (in analogy with gramophone records) 'the other side of the tape'. Video recording Which is what the whole exercise is about . . . The video signals to be recorded run up to fairly high fre- quencies (approximately 4.8 MHz). In any type of recording, the 'detail' that can be written depends on how coarse or fine the writing implement is. In a tape recorder, the recording implement is the tape head; its 'gap width' determines the detail that it can write However, the 'space' required to record one period of a 4.8 MHz signal on tape depends on the speed with which the tape runs past the heads. The higher the speed, the longer a single period will be stretched on the tape. If the tape runs relatively slowly, a larger number of periods could theoretically be recorded on a small section of tape; however, the tape head is too 'blunt' to make this a feasible proposition. The result would be poor picture quality. Somehow, the speed of the tape relative to the head must be increased until the picture quality leaves little to be desired. If the tape is run at high speed past a stationary head, the picture quality can be quite good - but the recorder will 'eat' tape, both in feet of tape required per minute and in life expectancy of the tape . . . For this reason, it has become standard practice in video recorders to use a rotating head drum, incorporating two or more heads. This drum revolves at high speed, so that the heads move at high speed past the tape, even if the latter is transported relatively slowly. The head drum is mounted at a slight angle with respect to the tape and very narrow video tracks are used, so that a fairly slow tape transport suffices to move the tape up sufficiently to write the next diagonal track adjacent to its predecessor. All this may seem rather complicated, but it is basically similar to typing. Even if you type a lot of letters, it takes a while to fill the page - certainly if you use the minimum line spacing, so that each new line practically touches the one above. Something similar occurs in a video recorder; the main difference being that the tape is moved slowly and constantly, instead of jumping up 'one line at a time' like the paper in the typewriter. If you can visualise the paper moving up at a constant speed, so that it has just moved up one line by the time you start to type a new line (so that the lines slope down slightly), you have the principle of the video recorder. Figure 2 illustrates how this system operates in practice. Two heads are mounted on the drum, and the latter is mounted at a slight angle with respect to the tape. As the tape is transported at a speed of 2.44 cm/s (just less than 1 inch/second, or about half the speed of an audio cassette recorder!), diagonal tracks are written on it by the heads on the upper half of the drum. The lower half of the drum runs at a much lower speed, and takes care of the tape transport — it operates as a large diameter 'capstan'. The diameter of the drum is 65 mm and the upper half rotates at 25 revs per second, so that the two heads (K1 and K2) move at 5.08 m/s — or just under 17 ft. per second! The tape is 'wrapped around' half the circumference of the drum, so that as one head leaves the tape the other just starts to write on it. It will now be apparent how the tracks are recorded. The tape is almost stationary with respect to the upper half of the drum. One head can therefore record a track length equal to approximately half the diameter of the drum -very roughly, 100 mm or 3/8". We said that thetape is almost stationary with respect to the head. To be more precise, the tape is transported over 22.6 Aim as one full track is recorded. When the second head 'hits the track', the tape has moved up just far enough to enable this head to record its track parallel to the previous one, without overlapping. The final result is a series of diagonal tracks, as illustrated in figures 1 and 2. A separate, stationary head is used to record the audio signal. This 'sound track' is located at the outer edge of the tape, as illustrated in figure 1. The erase heads are also stationary. By varying the voltage applied to it, the height of the heads can be adjusted. Dynamic Track Following It's all very well being able to vary the position of the heads, but first a control voltage must be derived in some way. Figure 3 again shows four video tracks with an exaggerated angle (the true angle being only 3°). Track f2 is written first, then f4 is recorded, and so on. And this is where it gets complicated. Tracks f2 and f3 are written by video head two; tracks f4 and fl are recorded by head one. Simultaneously with the video signal, a 'pilot tone' is recorded on each track. Each head records two different (relatively low frequency) pilot tones alternately. Track f2 contains a 117 kHz pilot tone, recorded by K2 (video head 2); track f4, written by K1, includes a 164 kHz pilot tone; on track f3, the pilot tone frequency is 149 kHz; finally, the pilot tone on track fl is Vertical positioning of the video heads With the extremely narrow video tracks written diagonally on the tape, pos- itioning of the video heads during playback is obviously highly critical. Some way must be found to move the heads slightly until they are centred exactly on the corresponding tracks. A most intriguing solution has been found. The video heads are both mounted on a little piece of piezo-ceramic material. This is the material used in no-battery electric lighters: when it is compressed, a voltage appears across the ends, sufficient to draw a spark. However, it also works the other way: if a voltage is applied across the ends of the material, its shape will vary! The so-called PXE is used in this way in the video recorder. I 3 102 kHz. This cycle is repeated for the Azimuth next set of four tracks, and so on. The video heads are mounted in the During playback, the pilot tones are head drum at a relative angle of 30°. retrieved together with the video signal, with respect to the tape, head one is If the corresponding head (K1) is mounted at 90° - 15° -3° = 72°, head correctly positioned, a clean 164 kHz two is mounted at 90° + 15° -3° = 102°. tone will be retrieved from track f4. T h j s j s illustrated in figure 4, where However, if the head is slightly high, both heads are shown simultaneously some of the 149 kHz signal on track f3 w j t h respect to the tape. There is good will be mixed with this 164 kHz signal, reason for the relative angle between the producing a 15 kHz beat signal; if the two heads, head is low, a 47 kHz beat signal will appear (164 kHz (f4) - 117 kHz = 47 kHz). For the other head (K2), the opposite is true: if it is too high, a 47 kHz signal is produced; a 15 kHz beat signal corresponds to 'too low'. The amplitude of the beat signals is used as a basis for the 'head height' control signal. As audio recorder enthusiasts will know, if a playback head is tilted slightly with respect to the recorded tape track, the high frequency response is drastically reduced. Correct 'azimuth' setting is essential for high quality playback. In this video recorder, the result is that a track originally recorded by K1 will only be 'read' by K2 with a severely reduced high-frequency response. In practical terms, this means that K2 will only 'see' frequencies up to a few hundred kilohertz on Kl's tracks — K2 will reproduce Kl's pilot tones, but it will not reproduce the video signal! Cunning . . . Head positioning during recording During recording, accurate positioning of the heads is also required, to keep the tracks up against each other without overlap. To this end, one of the heads is fixed in an 'average' position; the height of the other is adjusted so that its tracks are correctly positioned. A complete TV picture consists of 625 lines, written in two 312.5 line 'frames'. Between each set of 312.5 lines, a short 'vertical blanking' interval is required. No video signal is recorded in this interval. One complete picture (two frames) is recorded 25 times per second . . . exactly the rotation speed of the head drum! Coincidence? Don't you believe it. Each head records one frame, and two frames make one picture. Each track includes a vertical blanking interval, which can be used to record a control signal. In the VR2020, a 223 kHz signal is recorded at this point, for 96 ps. Immediately after this, the head is switched to playback for a further 96 ps. The result of these manipulations is sketched in figure 5. Bearing in mind that the right-hand track is recorded first (the tracks themselves are recorded from lower left to upper right, but the tape movement is also from left to right) it will be apparent that when head K1 is switched to playback ('read') it will detect the 223 kHz tone recorded on the previous track by K2 if the latter is high. Simi- larly, if K2 is low it will detect the 223 kHz signal from the previous track during its own read cycle. Using this information, the height of one of the heads is adjusted until the tracks just mesh correctly. As illustrated in figure 5, 960 ps (15 lines) of video are recorded on each track before the 223 kHz test signal. Each track therefore contains the following sequence: first 15 lines at the end of a frame, then 96 /is worth of the test signal, then the head is switched to playback for a further 96 /is, then the first 294.5 lines of the next frame. The other head now takes over on the next track, recording the last 15 lines of the frame, and so on. It will be obvious that some fairly fast, complicated and accurate switching is required for the VR 2020 to work . . . For this reason, the whole system works under microprocessor control. 'Automatic Tracking'. The control voltage from a Dynamic T rack Following 'discriminator' is used to control a tape servo. During recording, a constant tape speed is maintained by referring the output of a tacho generator to that of a crystal oscillator; during playback, the DTF control voltage is used as a reference, so that both the tape speed and the tape position with respect to the heads is accurately maintained. The rapidly rotating half of the head drum must also run at exactly the right speed. This is achieved by measuring the speed of the drum with a phototransistor that gives one pulse for each rotation of the drum; the frequency of these pulses is compared with that from the tacho generator that measures the tape speed. The VR 2020 is quite easy to operate. Most of the functions are automated, and it is possible to 'program' it up to 16 days in advance. The cassettes for the Video 2000 system include mechan- ical 'record locks' that can be used to protect recorded tapes from inadvertent re-use. Other gimmicks It may seem surprising, but the head drum is heated in the VR 2020. Among other advantages, this ensures a constant diameter, reduces the tendency of the tape to 'stick' to the heads and reduces the wear on the heads. If, during playback, both heads are found to be slightly high or if both are slightly low, the tape is shifted up or down slightly instead of adjusting the position of the heads. This is called The future As mentioned in the introduction, Philips and Grundig hope that this system will become an international standard. Apparently, ITT have already decided to use the new cassette, and the German manufacturers Loewe Opta and Metz are taking a long, hard look at it. It looks as if this system has a good chance of making the grade! Philips Gloeilampenfabrieken, P.O.B. 523. Eindhoven, The Netherlands. Grundig AG, Kurtgartenstrasse 37, 8510 Fiirth /Bayern, West Germany. Switching transistors approach 1000 V Barrier The switch mode power supply has a number of advantages over other conventional supplies. However, their use in high power circuits has been limited by the absence of transistors with sufficiently good characteristics to meet the heavy demands placed on them under high voltage switching conditions. An ideal switching transistor should have characteristics that include: • very low Vce sat • very low leakage current • very good switching characteristics • very good ruggedness • good reliability Characteristics that are difficult to obtain in high voltage high power transistors. The SGS-ATES MULTIEPITAXIAL MESA technology, which was created to overcome these problems, gives an excellent compromise between these characteristics. In addition to this it gives the possibility of making comp- lementary NPN-PNP high voltage, high power transistors, a feature impossible to find in other high voltage, very high power technologies. In the Multiepitaxial Mesa technology a heavily doped N* substrate is used as a foundation onto which is epitaxially grown a normally doped N type layer. On the N type layer is grown a second epitaxial layer of lightly doped N~ type material. These two epitaxial layers form the collector of the transistor. This type of collector construction gives extremely good ruggedness in Es/b conditions. On top of the collector is grown a third epitaxial layer which is to form the base of the transistor (into which an N** type emitter diffusion is made). This epitaxial layer, in order to maintain the high voltage characteristics of the device whilst giving good switching times, must be of a P~ type material. However, if the emitter diffusion was made into the base as it stands, problems would arise in the stability of the transistor due to the very high electric field between the P~/N~ layer seen at the edge surface. Therefore an ad- ditional P* diffusion is made into the base epitaxial layer that has the effect of widening the distance between equipotential lines at the surface thus reducing the surface electric field. The P' diffusion does not of course reduce the intrinsic high voltage characteristic of the transistor. Whilst the multiepitaxial layer construc- tion gives a breakdown value in the order of 1 000 V it is known that when transistors are separated by mechanical 1979- 10-05 VcBOIminl v CEO(min] VCE(sat)m< ’on(typ) «s(.yp) •fltyp) BUW34 BUW35 BUW36 BUW44 : Vq£( s j is specified ai Iq = 5 A, Ib = 1 A for BUW34, 35,36 and Iq = 10 A, I B - 2 A for BUW 44, 45, 46. Sw. on characteristics typified at Vcc ■ 250 V, l c = 5 A, I B1 = I B2 * 1 A ,for 's-'f 1 1 B1 ■ 1 A (for t on l for BUW 34, 35, 36 and V C c “ 250 v - >C * 10 A ' 'B1 3 -'B2* 2 A ,,or t s and *f* *B1 * 1 A ,or t on ,or BUW 44, 45. 46. means, after diffusion, irregularities are caused on the edge of the transistor which dramatically reduce the collector/ base breakdown voltage. Obviously the breakdown voltage of the device as a whole is the breakdown voltage of the weakest point, in this case the edge surface between collector and base. Therefore a method had to be found which would allow separation of devices without causing surface edge irregu- larities. The method found, whilst extremely simple in concept, has had dramatic effects in improving the collector/base breakdown characteristics. In essence the method used is to isolate each transistor on the wafer by a deep chemical edge. In this way it is possible to achieve an extremely smooth edge on the active part of the transistor in the area of the base collector junction. It is the cross section of the transistor after the deep chemical etch that gives rise to the name Mesa (after the mesas found in S.W. United States and Mexico). The deep chemical etch is carried out after the emitter diffusion and then, to further enhance stability and preserve surface cleanliness, glass passivation is carried out on the channel formed. The cut made to separate the transistors is then made in the innactive area between the dice. Using this method it has been possible to produce transistors with a Vmax as high as 900 V and with extremely good reliability and ruggedness in high voltage, high temperature conditions. Typical electrical characteristics for transistors constructed using the multiepitaxial mesa technology are shown in table 1 . Using these transistors it has been possible to build switch mode power supplies with a performance never before possible. A typical example of these transistors in a switch mode power supply is shown in fig. 1. This circuit, which uses two BUW 34's in the power output stage, is capable of delivering up to 400 W at 24 V or by using two BUW 45's at 24 V. 10-06 - elektor October 1979 Many FM tuners employ varicap (variable capacitance) diodes. These are diodes which are especially designed so that their capacitance can be varied by means of a control voltage. If the varicaps are included in an LC circuit, the resonant frequency of the latter can thus be varied by altering the control voltage. In most tuner designs the control or tuning voltage is derived from a stabilised supply and is varied by means of a poten- tiometer. The main requirements of the tuning voltage are that it must be stable and affected as little as possible by fluctuations in temperature. touch tuning touch-controlled preset station tuning An important selling point of modern stereo tuners is the number of preset stations which can be selected. However for the home constructor, this is often a feature which must regrettably be foregone, being regarded in many designs as something of a luxury. The circuit described here is intended to remedy that situation, by providing for up to 9 touch controlled preset stations. The only restriction is that the receiver be varicap tuned. Preset tuning can be realised by using not one potentiometer, but a number of potentiometers connected in parallel, these being selected by switches (see figure 1). Only one switch may be closed at any given time; for example, when switch Sb is closed, switch SI automati- cally opens. By adjusting the preset potentiometers so that each switch brings in a different station, a simple and effective preset tuning facility is obtained. In the circuit described here, the basic design has been further refined, so that using only two switches a total of 10 preset stations can be selected. By employing touch switches, the need for interlocking switch assemblies is avoided, whilst the physical construction and appearance of the switches can be tailored to suit individual requirements. Circuit For a range of 87 to 1 04 MH z, the tuning voltage of most receivers must be capable of being varied from roughly 2 or 3 volts to approximately 30 volts. Thus it is clear that conventional CMOS switches cannot be used, since they are only capable of switching voltages of up to 15 V. However, as can be seen from the circuit diagram of figure 2, CMOS buffers N1 . . . N4 are used to form a pair of suitable touch switches. Under normal conditions the inputs of N1 and N3 are held high via R1 and R2. When one of the sets of touch contacts is bridged, the input of the corresponding gate is pulled down to ground (logic 0). The output of the gate is thus taken high, with the result that Cl or C2 rapidly charges up and the output of the succeeding buffer (N2/N4) goes low. Removing one's finger from the touch contacts takes the output of the first gate low again, causing the corresponding capacitor to discharge slowly via the parallel resistor. Thus each time one of elektor October 1979 - 10-07 the touch switches is operated a logic 0 is applied to the up or down input of IC1 (synchronous decade up/down counter). This 1C counts the pulses applied to its inputs when the LOAD input is high, and transfers the result in BCD form to its outputs. Upon switch-on the LOAD input of the counter is held low via capacitor C3, so that the counter outputs are reset (i.e. also taken low). When the 'up' touch switch is operated, the counter in- crements by one, i.e. the number 1 appears in BCD at the counter outputs. If the up switch is touched a second time, the number 2 appears at the counter outputs, and so on. Touching the 'down' switch decrements the number on the counter outputs by 1 . The outputs of the counter are connected to a BCD-decimal decoder/driver (IC2). Depending upon the BCD input data, one of the outputs of this 1C will go low. The counter outputs are also connected to a BCD-7-segment decoder/driver, which in turn is connected to a 7-segment display. In this way the state of the counter (and the output of IC2 which is active) is clearly indicated. When one of the outputs of IC2 goes low, the corresponding transistor is turned on. The emitter voltage of the transistor is determined by the position of the associated potentiometer wiper. Only a small saturation voltage is dropped across the transistor. The output voltage of the circuit (i.e. the tuning voltage for the varicap diodes) can thus be set by adjusting each poten- tiometer to give the appropriate voltage when the corresponding output of IC2 goes low. Altogether 9 preset potentiometers are used, which means 9 preset stations. If no preset station is required (the counter output is zero) tuning through the FM band is accomplished by means of a conventional (ten-turn) potentiometer. Construction Construction of the touch tuning circuit requires a bit of handiwork with a fret- saw. The printed circuit board, which is obtainable via the EPS service, consists of three sections, which before the components are soldered in place, must first be separated from one another. On one section of the board are four copper planes, which form the two pairs of touch contacts. A second section of the board is intended to accomodate the 7-segment display. A section is sawn out of the main board at the point where the display is to be mounted. The display board and the touch contacts are mounted perpendicularly to the edge of the main board, as shown in the ac- companying photograph. Of course the individual is free to choose an alternative design for the touch switches if desired. The potentiometers used are 20-turn presets from Piher. The existing tuning potentiometer in the receiver can be used for the 10-turn potentiometer. In conclusion Since transistors are used as voltage switches, the circuit is slightly tem- perature dependent. However most tuners have fairly good automatic frequency control (AFC), which should ensure that this is not a problem. The supply voltage is 5 V, whilst the input tuning voltage should not exceed 30 V. When power is applied, the circuit automatically selects channel 0, i.e. the receiver can be tuned by hand. If one wishes a preset station to be selected immediately after switch-on, then the inputs of IC1 can be programmed to select another channel. For example, if pin 15 of the 1C is connected to plus supply, channel 1 will automatically be selected. Finally, it is perhaps worth remarking that if the display is not required, then R5 . . . . R1 1, IC3, and the display itself can of course be omitted. M 1 battery saver elektor October 1979 - 10-09 battery sawr W. Jitschin With many electronic games, such as heads-or-tails, roulette, or any of the versions of electronic dice, a consider- able saving in battery life can be obtained by ensuring that the circuit, or at least the current-guzzling displays, are switched off after each throw or turn. Naturally enough.it would be somewhat tiresome to have to do this by hand, so the following circuit is intended to take care of this chore automatically. Basically the circuit is a simple timer. Pushbutton switch SI is the start button for the die, roulette wheel, etc. When depressed, it causes capacitor Cl to charge up rapidly via D1. Transistor T1 is turned on, so that, via T2, the relay is pulled in, thereby providing the circuit of the game with supply voltage. When the switch is released, initially nothing will happen. Cl discharges via R1, R2 and the base-emitter of T1, however it takes several secondes until it has discharged sufficiently to turn of T1 . When it does so, however, the relay drops out, cutting out the power supply to the die, etc. With the component values shown in the circuit diagram, a delay of roughly 3 seconds is provided in which to read off the display. If that interval is too short (or too long), it can be modified as desired by choosing different values for Cl and/or R1/R2. N It is often very useful to be able to match the values of capacitors and resistors and the only quick, effective way to do this is by using an impedance bridge. The following circuit is quite adequate for this purpose and it is also capable of measuring resistances between 100 n and 1 M and capacitances between 100 pF and IpF. Measuring resistance Most readers will be familiar with the basic Wheatstone bridge circuit shown in figure 1, which represents the simplest way of measuring an unknown resistance. The bridge is formed by two pairs of resistors (voltage dividers) which are connected in parallel. As every reader will know (we hope), when two resistors are connected in series, the voltage dropped across each resistor is proportional to the value of that resistor. Thus if the resistors are con- nected as shown in figure 1 and we ensure that the ratio of R a and Rb to R x and R c is the same, the voltages at points A and B must also be the same. To put it another way, for the bridge to be 'balanced' and the meter to read zero voltage between points A and B, Ra x Rc must be the same as R x x Rb- If now we make Rb variable and provide it with a calibrated scale, then by adjusting Rb until the meter shows zero deflection we can determine the value of the unknown resistance, R x . Measuring capacitance Measuring capacitance is slightly more complicated than measuring resistance, however the basic principle involved is the same. A capacitor also possesses resistance to current flow, which is called its reactance, and like resistance is measured in SI. Unlike a resistor, however, it is only meaningful to talk of a capacitor's reactance to alternating current, since capacitors do not pass steady current at all. Furthermore, the reactance of a given capacitor is fre- quency-dependent, i.e. the greater the frequency of the voltage across it, the lower its reactance, and vice-versa. For this reason, we have to ensure that the supply voltage to our Wheatstone bridge is alternating and of constant frequency (it of course makes no difference to a resistor whether the voltage is AC or DC). Once that is the case, the reactance of the capacitor is determined solely by its capacitance. Thus if we replace the unknown resistance, R x , by the unknown capa- citance, C x , and one of the fixed resistors in the bridge by a fixed capaci- tor, we can determine the value of C x from the setting of the calibrated variable resistor, Rb- Since the capacitors are connected in series with a resistor, strictly speaking the meter is measuring impedance, hence the name, impedance bridge. When the variable resistor is adjusted for zero deflection on the meter, Wheatstone's formula once again applies, i.e.: Z x • Rb = Ra ' z c- where Z is the symbol for impedance (in SI). Circuit The complete circuit diagram of the impedance bridge is shown in figure 2. As already explained, a resistance remains the same, regardless of whether the voltage source is steady or alternat- ing. Thus we can choose an alternating supply voltage for the bridge. In order to be able to measure fairly small capacitance values, a reasonably high frequency (significantly higher than the mains frequency) is required, and to this end a Wien bridge oscillator, formed by the circuit round op-amp A1, is used. When the gain of the op-amp is x 3, the oscillator produces an alternating vol- tage with a frequency of roughly 1 kHz. The gain of the op-amp can be varied by means of PI, thus ensuring that the oscillator can always be started. Ideally PI should be adjusted such that the circuit just oscillates and no more. If desired the oscillator output can be examined on an oscilloscope and PI adjusted for as sinusoidal a waveform as possible, although this step is not strictly necessary. A2 functions as a buffer stage, delivering sufficient power to drive the bridge. The Wheatstone bridge is clearly recog- nisable in the circuit diagram. If we compare it with the circuit of figure 1, it is apparent that resistor R a is replaced by four different value resistors, each of which can be selected by the range switch, SI. Potentiometer P2 assumes the function of variable resistor Rb in figure 1. When the wiper of this poten- tiometer is turned hard up against the end stop such that no greater resistance can be measured, one simply has to select a larger value for R a . The fixed value capacitor in the bridge is formed by C8. This capacitor is connected in series with another poten- tiometer, P3. During the measurement procedure, when P2 is being adjusted for zero deflection on the meter, P3 is set for zero resistance. Once the measurement has been completed, the quality of the unknown capacitor (C x ) can be determined with the aid of P3. How this is done is discussed in the section on using the impedance bridge. The voltage between points A and B in the circuit is measured by the differen- tial amplifier A3. C6/R17 and C7/R15 ensure that only the 1 kHz alternating impedance bridge jber 1979- 10-11 voltage appears across the inputs of A3. The output of A3 is fed via C9 to A4, which in conjunction with D5 provides a half-wave rectified voltage, suitable for driving the meter (which in fact displays the average value of the rectified signal). Construction It should not be difficult to construct the circuit using Vero-board or similar. If the circuit is mounted in the same box as the power supply, then care should be taken to place diodes D3 and D4. which stabilise the amplitude of the oscillator signal, at a reasonable distance from components which are liable to run warm. This point should not prove a serious problem, however, since the circuit only consumes some 20 mA. Any readily available meter will prove suitable since it is not required to pro- vide u reading which is accurate in absolute terms, rather it is a question of determining which setting of P2 gives the smallest deflection. The meter is being used to give a 'dip-reading'. Using the impedance bridge The general operation of the impedance bridge should be fairly clear from the foregoing decription of the circuit. First of all however, the circuit must be calibrated. This is done by adjusting PI until the oscillator starts. The oscillator can be checked by setting P4 to roughly the mid-position and connec- ting a wire link between the test ter- minals (Z x ). When the oscillator starts the bridge will cease to be in a state of Figure 1. The basic Wheatstone bridge. In order to measure capacitance, R c is replaced by a capacitor and the unknown capacitance equilibrium (which is another way of saying that a potential difference exists between points A and B in the circuit). It may occur that the oscillator will stop after a short period; this simply means that PI was not set to the optimal position and should be readjusted. With P2 set for minimum resistance and SI in position 4, P4 is then adjusted until maximum deflection is obtained on the meter. Diodes D6 and D7 are included to limit the current through the meter to an acceptable value; how- ever if full-scale deflection cannot be obtained on the meter, an additional diode can be connected in series with D6/D7. Alternatively, should it prove impossible to limit the current through the meter sufficiently by means of P4, then D6 can be replaced by a wire link. Once the bridge has been set up, the next question is, how do we provide P2 with an accurately calibrated scale? The simplest solution would be to print a suitable scale in this article. Unfortunately this is not really feasible, since P2 must be a linear potentiometer, and different types have a different effective electrical rotation. Furthermore the first and last sections of the poten- tiometer tracks are not completely linear, and the extent of the non- linearity varies from potentiometer to potentiometer. For these reasons it is better to experimentally determine a suitable scale oneself. First of all, S2 is set to position R (measurement of resistance). SI is then set to position 1 and a series of close tolerance resistors with values ranging from 100 f2 to 1 kfi are mounted between the test terminals. For each resistor, P2 is adjusted until the bridge is balanced (i.e. minimum deflection on the meter). At the corresponding position of P2 a mark is drawn on the scale, accompanied by the first two figures of the resistor value separated by a full-stop. For example, if R x equals 470 n, one writes 4.7. For the different positions of the range switch, SI, the following multipliers give the correct magnitude of the values; position 1 x 100 S2 position 2 x 1 kS2 position 3 x 1 0 kfi position 4 xIOOkfi The calibration procedure need only be carried out for one range; thereafter the scale will also be correct for the other ranges. To calibrate the scale for capacitors, S2 is set to position 2 and P3 adjusted for zero resistance. Close tolerance capaci- tors between In and 10 n are then connected between the test terminals in turn, and P2 adjusted for minimum deflection on the meter. Once again the scale is marked at the corresponding positions of P2. For the value 1 n, switch SI should be set to position 4; for larger values up to and including 10 n, position 3 is required. The scale will 'run' in the opposite direction to that for resistors, i.e. the scale will decrease from 10 down to 1 from left to right, whereas with resistors it increases from 1 to 10. The multipliers for each position of the range switch are; position 1 xIOOn position 2 x 10 n position 3 x In position 4 x 0.1 n Capacitance is not the only quantity which can be measured, however. Once the value of the capacitor has been estab- lished, it is possible to obtain an idea as to the quality of the capacitor. This is done by adjusting P3 (which during the measurement of capacitance is of course set for zero resistance). If by so doing the deflection on the meter can be made even smaller, then the further the deflection can be reduced, the poorer the quality of the capacitor. H The maximum thrust available from the engine is limited, so that leaving reverse thrust too late will result in a crash landing. The maximum permissible descent rate at the moment of touch- down is 01; if this is achieved, the display will alternate the final results with the message 'landed'. It is not an easy matter to control a LEM, and the result is that landings may well be rougher than intended. In that case, the message on the display will Program 1: Luna (R. Bayer) This program simulates the landing of the LEM (Lunar Module) on the moon. The display gives information on the height above the surface, the rate of descent and the amount of fuel left in the tank. new programs 6r the SOMPi Good news for SC/MP fans: two new records have been added to the ESS range. One contains the complete NIBL-E program; the other includes some games, a 'running script' program, 'tracer', 'disassembler' and 'biorhythm'. Some further details on the latter programs are given here. SC/MP >ber 1979- 10-13 after which a new attempt can be initiated by operating any one of the Program 2: Battleships (F. Schuldt) 'Battleships' is normally a game for two players. In this program, the computer takes the role of one of the players. The game is played on a 64-square 'ocean', as shown in figure 1. In all, six ships take part in the engagement: two of three squares each, two of two squares and two of one square each. The ships may only be entered in horizontal or vertical direction, and they are not allowed to touch. When the program is started (at address 0C40), the word 'Ships' appears in the display. As soon as any key is operated, the computer draws in its own set of ships in its memory. It then invites its opponent to take the initiative: 'Fire'. The coordinates of the first square to come under fire can now be entered: first the line number and then the column number (or letter). The computer can reply in three ways: 1 . If the shot landed on one of its ships, it will display 'Hit'. After a brief delay, it will invite a further try: 2. If a ship is sunk, that is to say if all the corresponding squares have already been hit, this is indicated by the word 'Lost'; after a brief delay, this is again followed by 'Fire'. 3. A miss is indicated by the word 'Fail'. The computer will follow this by a shot of its own, indicated as line and column numbers, respect- ively. The player can now answer in three ways: 1. A hit is recognised by operating the 'Down' key. The computer will reply immediately with 'shot XY'. 2. Operating the 'Up' key indicates that a ship is sunk. This, too, will be acknowledged with another shot. 3. A miss is indicated by operating any other key. The computer will tell you to get on with it, in that case: 'Fire'. As soon as all ships of one of the sides are sunk, the word 'end' will appear on the display. After a brief delay, the program will reset and the word 'Ships' will appear. Program 3: Keyplay (F. de Bruijn) This game is known under a variety of names, 'NIM' being one of the most popular. It can be played with matchsticks, coins, or . . . numbers. The rules are simple: each player in turn subtracts a number from the original; the one to get 0 as result, wins. When the program is started, at address 0C00, the program will ask for a four-digit decimal number ('GE' = Give Entry); this is the number from which the players will sub- tract in turn. Next, the program will want to know the Limit ('LI'): this is the maxi- number that may be subtracted at one time. The human player is allowed to start. This is indicated by 'U' in the first display digit. A four-digit number can now be entered. If it is either 0 or more than the limit, the computer will refuse to accept it: it will display the word 'reject', followed by a repeated request 'U'. If a valid number is entered, the computer will perform the subtraction and display the result: 'SAxxxx', where xxxx is the remainder. It then calculates the number that it wants to subtract, and displays this with the prefix T; finally, it performs this subtraction and again displays the result as 'SAxxxx'. It is now the human player's turn, and the game continues until the remainder becomes equal to 0. Depending on who reached this point, the display will indicate either 'I LOSE' or 'U LOSE'. The program can be re-started by operating the Halt/Reset key. Program 4: Runtext (R. Brinkmann) This program can display up to 16 different lines of text, each consisting of up to 256 characters, as a 'running script' on the 7-segment displays. The start address for the program is 0C00. Initially, 'runtext' appears on the display. One of the keys O . . . F is now used to select the desired one out of the sixteen texts. Even when a text is running, it is possible to switch over immediately to any other text, by operating the corresponding key. The program consists of three parts: 1. A selection routine, that uses the Elbug LDKB1 routine to determine which of the texts is required. It places the start address of the text in pointer 2, and the length of the text in a memory location reserved for this purpose (as can be seen from the listing). 2. A display routine, that transfers the text (pointer 2) to the display (pointer 1). This routine also checks to see if a different text is required (key entry); as long as this is not the case, the text originally selected is repeated. The speed at which the text runs across the displays can be varied within wide limits by modifying the contents of addresses 0D48 and 0D57. 3. The text section, containing the texts in 7-segment format. Each character is stored in one memory location (8 bits). The texts all start with seven spaces (00), so that a new text always starts on a blank display. When this program is loaded from the ESS record, not only sections 1 and 2 (as given in the listing) are entered, but also several texts. For this reason, the memory is used up to and including location 0E33. Program 5: Biorhythm (H. Prante) A few years ago (in October 1977), Elektor published a program for calculating biorhythms on an HP 65 calculator. Now, a similar program is available for the SC/MP system. As usual, the program is started at address 0C00. Initially, the word 'today' appears; the date for which the biorhythm data are required should now be entered. The date should be entered in the following order: day, month, year (without '19'). This entry is immediately followed by the display 'birthday'; this date is entered in the same way. The computer performs the necessary calculations and displays the results: three numbers, corresponding to the physical, emotional and intellectual rhythms. A new calculation can be performed after operating the Halt/Reset key. The biorhythm theory was explained in the earlier article referred to above, but a brief reminder may be in order. The physical rhythm has a cycle of 23 days; the emotional cycle is 28 days the intellectual cycle lasts for 33 days. The 'zero crossings' are critical days, and these include the half-way marks: 11th . 12th d a y for the physical cycle, 14th f or the emotional and 16*h - 17th for the intellectual. The first half of each cycle is taken to have a positive influence; the second half is negative. Program 6: Tracer (J. Fischer) This program is a powerful extension of 10-14 -elektor iSC/MP the monitor software already available in the SC/MP system. The CPU routine in Elbug can only handle one breakpoint, and it must be reset every time it is used. 'Tracer' constitutes a much more powerful aid when de-bugging.programs. It can be used to execute any other program in 'single-step' mode. The program uncjgr test is thus executed instruction-by-instruction; between in- structions, the contents of all registers can be examined (PI, P2, P3, Accu, Extension Register, Status Registerl. The display gives information on the position of the program counter and the following instruction, before actually executing it. If errors are noticed at this point, it is possible to correct them before continuing the single-step scan. The single-step mode can be executed in three ways: 1 . H igh Speed : The program to be tested is executed at a rate of approximately one instruction per millisecond, until a specified address is reached. At this point, Tracer' automatically switches over to the 'Low Speed' mode. The display is blanked during the High Speed mode. 2. Low Speed: The address and the corresponding instruction are displayed for approximately one second. The instruction is then executed, and the display is blanked for one second. This sequence is repeated until the point is reached where the change-over to 'Manual Step' is required. This will occur automatically at a specified address; however, it is possible to effect an earlier switch to the Manual Step mode by operating any of the keys during the Low Speed mode. 3. Manual Step: The next address and corresponding instruction remain visible in the display until one of the keys (any key except the CPU-routine key) is operated. The address and instruction remain visible for about one second after the key is operated; the instruction is then executed and, after a brief delay, the next address and instruction appear on the display. In all three modes, the keyboard and display remain available for in- or output of data. When 'Tracer' is started (at address 0C00), the message 'SS . . . ' appears on the display. Three addresses should now be entered, in the following order: 1. The 'start address' of the program to be tested; 2. The address at which the change-over to Low Speed is required; 3. The address at which the Manual Step mode must be initiated. After the third address has been entered, operating any one of the keys starts the T racer routine. The first section of the program will be run through in the High Speed mode, unless the second address is equal to the start address (1). In the High Speed mode, the keyboard and display seem to function normally. In the Low Speed and Manual Step modes, this becomes rather more complicated. In the Low Speed mode, the keyboard must be operated in the time that the instruction (and address) are visible on the display. In the Manual Step mode, the keyboard becomes operational when the command is given to execute the instruction; it remains available for approximately one second, until the display is blanked and the instruction is executed. The time during which the display is blanked by Tracer (for one second after the instruction is executed) is used to show the display that the program under test would provide after that instruction is executed. However, it should be noted that the display is again used by Tracer before coming to the next instruction, so that all previous display data is lost and the 'program display' can therefore consist only of single digits. Both the Low Speed and Manual Step modes can be interrupted to check the contents of all registers in the CPU. In the Low Speed mode, it is first necessary to switch over to Manual Step, by operating one of the keys. The display will then show the address and instruc- tion that is about to be carried out. If the CPU-routine key is now operated, the display 'CP' will apppear. The keyboard can be used at this point to select one of the registers; the codes are the same as those used in the Elbug CPU routine: '1 ' ■ Pointer 1 , '2' = Pointer 2, '3' = Pointer 3, '5' = Status Register, 'A' = Accu, 'E' = Extension Register. There are various ways to leave the CPU routine: S(ubtract)-key: Tracer can be re-started. R(un)-key: Return to High speed. Tracer now expects the entry of two addresses: one to indicate the point at which it must switch over to Low Speed and one which specifies the first address of the Manual Step mode. Having re-started Tracer in either of these ways, all the facilities described above are available again. Program 7: Disassembler (F. de Bruijn) A disassembler is a program that can be used to obtain listings (without comments, obviously) of programs in machine language. It is the opposite of an assembler program. The listing can be obtained on a printer or an (Elek-)terminal. In the latter case, of course, no 'hard copy' of the print-out will be obtained. The serial output signal for the printer or video display is available at flag 0. The transmission rate is 300 baud. This speed can be modified, if required, according to the following table: 110 300 600 1200 address baud baud baud baud 1 59 B 97 64 25 86 159 D 17 06 03 01 15A7 89 F0 50 81 15A9 08 02 01 00 The ( 1 Zz K) program offers the following facilities: a) enter the 'begin address' of the program that is to be 'disassembled'; b) specify the begin and end addresses of a table; c) mark a byte used by the program, by entering '20' at that point; d) enter the number of consecutive lines to be disassembled. The program is started at address 1000. When 'D1 . . . ' appears on the display, the begin address can be entered. This can be followed, if necessary, by specifying one table; in that case, the Block T ransfer key must first be operated - if any other key is operated, the program assumes that there is no table. After the Block Transfer key, the begin address of the table is entered, followed by the end address plus one. The next step is to specify the number of lines to be printed: note that this number must be entered in hexadecimal. A suitable value, when using the Elekterminal for the display, is 0010. The maximum value is 00FF; this already makes for quite a lengthy print-out. The program will start the print-out immediately after receiving this final entry; it will stop when the specified number of lines have been disassembled. A further group of lines will be disas- sembled if the Halt/Reset key is j operated. If the program finds an instruction that it doesn't recognise, it will print '?'. Jump instructions by means of the program counter are shown with the address to which the jump would be executed. The same applies to other instructions that use the program counter. H The circuit shown here provides a two-digit display calibrated in hundreds- of-revs per minute, i.e. 6000 r.p.m. will produce a readout of 60. There are two principal reasons for restricting the display to two digits. The first is quite simply that accuracy greater than this is not necessary, and secondly, a much longer gate time would be required otherwise, with the result that the | counter would not be able to follow sudden changes in the engine speed. The circuit is a modernised version of a rev counter published in an earlier issue of Elektor (see Elektor 1, December 1974). The input signal is derived from the contact breaker; the amplitude of the resulting pulse train being limited by zener diode D1 and then 'shaped' by T1 and the monostable N1/N2. The pulses are counted by IC3 (dual decade counter), whose outputs are connected to two BCD-to-7-segment latches/decoder-drivers. The reset pulse for the counters (i.e. the timebase signal) and the latch enable pulse are provided by a 555 timer (IC5). The circuit has three adjustment points. Preset potentiometer PI sets the width of the reset pulse. In the majority of cases it will be sufficient to set this potentiometer to the mid-position. However it may happen that the re- liability of the circuit can be improved by choosing an alternative position. The latch period, and hence the rate at which successive measurements are displayed, is set by means of P2. Finally, P3 is used to calibrate the counter. This can be done using either a tone generator with a calibrated tuning scale, or else by using a mains frequency signal. In the former case the frequency of the input signal will depend upon the type of engine with which the rev counter is to be used. The counter is calibrated for a nominal r.p.m. of 6000, and cepen- ding upon the number of contact breaker pulses produced for each revolution of the engine in question, a signal of suitable frequency (see table 1 ) is fed to the input of the circuit and P3 adjusted until a readout of 60 is ob- tained. If a tone generator is not avail- able, a low voltage signal of mains frequency (e.g. from a doorbell trans- former) can be used. P3 is then adjusted until the appropriate readout is obtained (see table 1, 'revs at 50 Hz'). M 10-16 — elektor i >ber 1979 digifarad dlgiJhrad digital capacitance meter Given the fact that many types of capacitor - especially electrolytics - have a wide tolerance (20% is fairly common), it is often desirable to be able to measure capacitances both quickly and with a reasonable degree of accuracy (e.g. when constructing precision timer circuits, matching the time constants of several RC networks, etc). Of course a capacitance meter also enables one to measure the value of those piles of unmarked capacitors which end up at the bottom of one's junk box, or to test 'suspect' capacitors for potential faults — in short it represents a useful addition to the test gear of any constructor. The circuit described here offers the advantages of a digital display, has 5 decade ranges, measuring from 1 nF to 9.999 pF, and is accurate to about 2%. The range of digital test equipment is growing ever more extensive. Voltage, current, frequency, resistance, tempera- ture — all these quantities are now commonly measured, and displayed, digitally. This not only applies to 'professional' applications, even the 'amateur constructor' has gone digital (see, for example, the 'universal digital meter', Elektor 45). Now it is time to add a digital capacitance meter to the range - the 'digifarad'. The block diagram of the 'digifarad' is shown in figure 1 . C x represents the unknown capacitance to be measured. Depressing the 'start' button momen- tarily closes the electronic switch, ES, so that C x is charged to a given voltage (Uc). When ES reopens, C x is discharged by a constant current source (I), with the result that the voltage on C x falls in a linear fashion. All other things being equal, this discharge rate is determined by the value of C x . The voltage on the capacitor is monitored by a window comparator, formed by two op-amps and a set/reset flip-flop. For the period that U c remains within the upper and lower reference voltages (U 1 and U2) of the 'window', the output of the comparator is low. This enables a three digit counter, which counts the number of pulses from a clock generator. Thus the greater the capacitance of C x , the longer U c takes to fall below the thres- hold voltage of the window comparator, and the more pulses counted by the counter. Finally, by varying the size of the constant current, I, we can arrange for capacitors of widely differing value to be measured in the same way. The complete circuit diagram of the digifarad is shown in figure 2, and a pulse diagram is given in figure 3. The latter is not only useful in the (unlikely) event that trouble-shooting proves neccessary; it is also a great help in the following explanation of the circuit. The various wave-shapes (A ... I) were measured at the corresponding points in the circuit. It is not too difficult to relate the block diagram, given in figure 1 , to the actual circuit shown in figure 2. The constant- current source, I, is formed by op-amp A1 and transistor T1. The size of the current is determined by the position of the range switch, SI (see table 1). The op-amp varies the current through T1 and the selected range resistor so as to ensure that the voltage at the inverting input is always the same as the fixed reference voltage at the non-inverting The electronic switch, ES, consists of transistor T2, which is turned on via the start button, S2, and flip-flop N3/N4. The voltage on C x is buffered by op- amp A2, and fed to the window com- parator formed by A3 and A4. N1, N2, Cl, C2, R18 and R19 form a set/reset flip-flop which is triggered by changes in the output state of the window comparator. When C x is fully charged, the outputs of A3 and A4 are both high. J. Guther However when the voltage on C x reaches the upper threshold of the 'window' (i.e. the voltage on the non-inverting input of A2 falls below that on the inverting input) the output of A2 goes low, with the result that the output of N2 also goes low, enabling the counter. As the unknown capacitance continues to discharge, the voltage on C x will reach the lower threshold of the window, whereupon the output of A4 will go low, taking the output of N2 high and stopping the count. In addition to turning on T2, the second flip-flop formed by N3 and N4 provides the reset and display enable signals for the counter. The display is inhibited during the count cycle, thus ensuring a stable readout. R20, C3 and the two diodes (D1 and D2) ensure that the two flip-flops assume the correct state upon switch-on. The clock-signal for the counter is provided by a 555 timer (IC3) con- nected as an astable multivibrator. The counter itself (IC6) is a single 1C, type 74C928. It performs the 7-segment decoding, and drives the three LED displays via transistors T4 . . . T6. The displays are of the common cathode type (e.g. HP 5082-7760, DL 704, etc.). In all, four 'supply' voltages are required for the circuit: the reference voltage (Uref) and the 16 V, 12 V and 5 V supplies. The obvious solution is to use IC's: one three-pin regulator (IC5) takes care of the 1 2 V supply, and a 'basic' 723 circuit (IC4, T3) provides all the other voltages, including the reference voltage. Construction Once again, printed circuit boards (available through the EPS service) reduce constructional problems to a minimum. Every single component, barring the mains transformer, is mounted on these boards - from supply circuit to displays. To increase the sense of achievement, three boards are required instead of one. A display board (figure 4c) is mounted behind the front panel, and the other two boards (figures 4a and 4b) are bolted together with spacers in a sandwich construction and mounted behind the display board. The display board contains the displays. Obviously. It also provides space for IC6, resistors R31 . . . R37, switches SI, S2 and S3; furthermore the on/off indicator D8 and 'banana plug' con- nection sockets for the unknown capacitor C x . The upper board in the sandwich (figure 4b) is intended for the supply circuit (all except IC5) and the clock generator, IC3. Finally, the lower 'sandwich' board (figure 4a) must provide space for the remainder of the circuit. Rest assured: it does. The inter- connections between the various boards are clearly marked with diagonal arrows. digifarad 1979- 10-19 Final notes The capacitance meter is as easy to use as a multimeter: switch it on with S3, select the desired range with SI, connect the unknown capacitor, press the start button (S2) and watch the result appear on the display. The measuring ranges are listed in the Table; the current I listed in this table is the constant-current used to discharge C x - If the capacitance value is completely unknown, it is a good idea to start in the highest range (position 5), and then switch back step-by-step until a useful reading is obtained. The circuit contains only one calibration point, namely preset potentiometer PI . Calibration can be carried out with the aid of a close tolerance capacitor of a known value. Silvered mica capacitors, for example, typically have a tolerance of 1%. One final remark. If a 12V/1 A trans- former is felt to be rather heavy, or if a smaller transformer happens to be available, resistors R31 . . . R37 can be modified as required. Provided a slightly less brilliant display is considered adequate, the value of these resistors can be increased to 22 Si; a 12 V/'/a A transformer is then good enough. m short-interval light switch KC.lt. fel* variable liira box Even in today's well-equipped modern houses there are various 'corners' where additional lighting is required. For dark cupboards, meter boxes etc. temporary lighting is usually sufficient, so that making a connection to the mains is hardly worthwhile; a simpler and cheaper solution is to use a battery-powered circuit which will light a lamp for a short period of time. As is apparent from the accompanying circuit diagram, such a circuit is by no means compli- cated. Using only one CMOS 1C, three resistors and one capacitor, the circuit will switch on a lamp for a presettable interval. The operation of the circuit is perfectly straightforward: when the button is pushed Cl charges up to the supply voltage. The outputs of the four parallel- connected inverters (N3 . . . N6) are then low, so that the lamp will be lit. When the button is released, Cl dis- charges via R1 until the input of N1 reaches half supply. The Schmitt trigger formed by N1 and N2 then changes state, with the result that the lamp is extinguished. The positive feedback resistor R3 ensures that the Schmitt trigger changes state very quickly. With the resistor values shown in the circuit diagram, the lamp will remain lit for roughly 2.5 seconds per pF of Cl. 1 Thus a 10 p capacitor would give an interval of roughly 25 seconds. The circuit can be powered by four 1.5 V cells connected in series. If a larger lamp is required, three 4.5 V cells connected in series can be employed. Alternatively, for really 'heavy-duty' applications, the four parallel-connected inverters can be replaced by a transistor, as shown in figure 2. The supply voltage should be matched to the voltage rating of the lamp and may lie between 4.5 and 1 5 V. The current through the lamp should not exceed 500 mA in that case. 2 The design for the 'variable fuzz box' was first published in the December 1978 issue of Elektor. Such is the popularity of this circuit, that we have decided to produce a printed circuit board for it. The variable fuzz box is a special effects unit for guitarists, which by allowing the amplifier signal to be clipped in a variety of different ways (symmetrically, asymmetrically, soft, hard, etc.) offers a greater degree of control over the resultant sound. The circuit of the fuzz box was described in detail in the original article, hence will not be repeated here. However one correction to the original description has to be added: symmetrical clipping of the output signal produces only uneven (not even, as was stated) harmonics, whilst asymmetrical clipping generates both even and uneven harmonics in theoutput signal. The alternative circuit diagrams of the fuzz box for symmetrical (figure 3 of original article) and asymmetrical (figure 4 of original article) power supplies are here combined into one (see figure 1). The circuit diagram contains a number of lettered connection points (a . . . h, j, k, m . . . w) which are marked on the printed circuit board shown in figure 2. The circuit diagram and accompanying parts list provides the relevant details on which connections should be made for either symmetrical or asymmetrical power supply require- ments. The current consumption of the circuit is less than 20 mA. A 741 can be used for IC1, however an LF 356 is a better choice. ^ "© (13,5 V) Literature: Variable Fuzz Box, Elektor 44, December 1978 frequency oscillator. The coil is held near the parallel-resonant circuit (the equipment containing the tuned circuit should be switched off for the purposes of the measurement). Series-resonant circuits can also be measured by shorting their inputs, so that a parallel-resonant circuit is obtained. The coil of the grid- the modern equivalent of the grip-dip meter dip meter is eiectromagneticaiiy coupled to the resonant circuit. As the frequency provides a quick way of checking the resonant of the oscillator approaches the resonant x , , « . . . frequency of the LC circuit, so the trequency OT LU tunea Circuits oscillator becomes increasingly damped. This is registered by the meter, so that when the needle deflection is at a maximum, and the oscillator frequency coincides with the resonant frequency of the tuned circuit, the latter can simply be read off a calibrated scale. The circuit of the gate dipper described here is based upon a device known as a lambda diode. As many readers may well never have heard of such a 'beast', it is worth devoting a little time to an explanation of this slightly unusual circuit element. Lambda diode If the term lambda diode is unfamiliar, the majority of our readers will have Tuning resonant circuits in high frequency equipment normally requires heard of tunnel diodes. These are diodes fairly expensive test gear which not every hobbyist can afford. However which exhibit a negative resistance over there is a reasonably aheap alternati.e available, namely a „a„ dipper, which allows the resonant frequency of the tuned circuit to be resistance may seem confusing, but in ascertained simply and quickly. fact it is quite straightforward. As the a certain portion of their voltage-current characteristic. The concept of a negative resistance may seem confusing, but in fact it is quite straightforward. As the A grid-dip meter (the name harks back to the good old days of valves, which actually had a wire grid between their anode and cathode and the meter measured the grid current of the valve) is a useful little device which enables the resonant frequency of tuned circuits to be determined without having to make any electrical connection to the circuit in question. The grid-dip meter contains a coil, which forms part of a variable- 1979- 10-23 gate-dipper voltage dropped across a 'normal' or 'positive' resistance increases, there is a directly proportional increase in the current flowing through that resistance. A negative resistance, however, ensures an inversely proportional relationship between voltage and current, i.e. the current increases as the voltage decreases. The typical voltage-current character- istic of a tunnel diode is shown in figure 1. Over the range — r the diode exhibits a negative resistance. Assume for example that the diode is forward | biased to point P; if the voltage is now I increased by a U, the current will fall by A I. The resistance of the diode is thus: _ - aU The negative resistance is smallest (i.e. there is the greatest drop in current for a change in voltage) at the point where the curve is steepest. The question now is: how can we utilise this negative resistance characteristic? Strictly speaking, a negative resistance can be regarded as an active circuit element (being just the opposite of normal resistance) , and it is as such that tunnel diodes are normally used. Figure 2 shows a simple example of a tunnel diode oscillator. The average current through the tunnel diode automatically settles at a value where the effect of the negative resistance is at a maximum (i.e. at the steepest point of the negative resistance portion of the voltage-current characteristic. Several advantages of tunnel diode oscillators are low power consumption, good frequency stability. Fqure 2. Only a few components are required to build a tunnel diode oscillator. The -Cerent simplicity is the great advantage of this type of oscillator circuit. Figure 1 . A peculiar feature of a tunnel diode is that it exhibits a negative resistance over a portion of its voltage v. current characteristic. When biased to this point, the diode effectively becomes an active circuit element. and last but not least, their inherent simplicity. More recently however, the advent of FETs has seen the design of oscillator circuits which offer even better per- formance, with the result that tunnel diodes are rarely used for this application nowadays. Despite this fact, the sim- plicity of tunnel diode oscillators has led to the search for ways of improving their performance whilst continuing to use the same basic principle. This attempt has resulted in the lambda diode, which consists of an N and a P-channel FET connected as shown in figure 3. Between the anode and cathode of the device there is the same negative resistance characteristic as in tunnel diodes. Thus the lambda diode can also be used as the active element in an oscillator circuit. This is in fact the type of oscillator employed in the grid-dip meter circuit. Gate dipper The complete circuit diagram of the gate dipper is shown in figure 4. By using a voltage regulator (IC1) the circuit can be powered by a 9 V battery, thereby making the meter portable and easy to use. The lambda diode is formed by FET T1 and transistor T2. Since P-channel FETs have a relatively shallow transfer curve, a bipolar transistor is used in its place. Although the configur- ation shown in the circuit diagram may appear slightly different from that of figure 3, as far as AC current is concerned its basic operation is the same. The oscillator circuit is formed by the fixed inductor, L x , and the variable capacitor, C3, by means of which the oscillator frequency is adjusted. The lambda diode is biased to the negative resistance region by means of PI . Diodes D1 and D2 clamp the adjustment range to suitable values. The output of the oscillator is rectified by D3. A negative DC voltage (L x can be considered a short circuit for AC currents) appears across this diode, which serves as the control voltage for the lambda diode (via the gate of T1). This voltage is smoothed by C4/R2 and fed to T3, which is connected as a source follower. Potentiometer P2 is adjusted such that a zero reading is obtained on the meter. If the coil, L x , is brought near the passive tuned circuit which is to be measured, the negative voltage across D3 will fall as the oscil- lator is increasingly damped. This causes the source voltage of T3 to rise, thus causing a deflection on the meter. When the deflection is at a maximum, the value of C3 is an index of the resonant frequency of the tuned circuit under test. Due to the effect of the lambda diode, the behaviour of the meter needle is the opposite to that of other types of grid-dip meter, where the oscillator frequency is adjusted for minimum deflection (hence the term dip meter). The grid-dip meter can also be used to check the operation of an oscillator. Once again the coil of the meter is held near the oscillator circuit, and C3 is adjusted until audible beat frequencies are obtained. These low frequency beat notes are not sufficiently smoothed to prevent them appearing at the source of T3, with the result that they are fed through to the output stage round T4 and T5, where they can be heard via a pair of headphones. P3 then functions as a volume control. When checking the operation of tuned circuits in radio receivers, if the grid-dip meter is tuned for zero beat, then it is possible to modulate the r.f. signal (in accordance with the direct-conversion principle). The lambda diode oscillator then functions as a self-oscillating mixer stage. This fact allows the meter to be calibrated with a precise frequency scale (the procedure is described in detail in the section on calibration). Construction The track pattern and component overlay of the printed circuit board for the grid-dip meter is shown in figure 5. The coil, L x , is not mounted on the board, but rather is connected to the 3 Figure 3. If a P-channel and N-channel FET are connected as shown, the result is a so- called lambda diode. Like a tunnel diode, this has a negative resistance over a portion of its voltage v. current characteristic. >ber 1979- 10-25 circuit via a plastic DIN loudspeaker plug. This provides the option of using D several different coils to obtain different measurement ranges. The accompanying table lists the winding details for each coil and the corresponding frequency The coils are wound on the plugs as far as possible from the metal terminals (see figure 6). If the qbil is near any metal, eddy currents wii) cause energy losses which increase ;with frequency. The result is that after adjusting C3, the zero point of the meter will tend to drift. Admittedly, that is not such a disaster, since the meter is not being read, but merely used as an indicator to obtain the correct position for C3. However if the energy losses are severe enough, the meter will deflect to the point where no 'dip' is obtained. The ends of the coil are fed through the inside of the plug and foldered to the terminal pins. The coil consisting of only one turn is mounted directly on the pins, and the plastic cap is omitted. J®' The socket for the plug is mounted on sho the case of the grid-dip meter and the connected to the printed circuit board m i r via short lengths of fairly thick wire. In this way it is a simple matter to inter- change coils should a different measure- 7 ment range be required. The variable capacitor, C3, is also mounted off board and connected to the circuit via short, thick wiring. If the wires are too long, measurements above roughly 80 MHz are no longer possible. Calibration and use Before providing the gate dipper with a calibrated scale one must first know how to use it properly. PI and P2 are set so that as positive a 'dip' as possible is obtained. The meter is here used essentially as an indicator, rather than a measuring instrument. Thus at this stage P2 is adjusted not so much in order to set the zero point of the meter but rather to ensure that the needle remains Fj) within the scale range of the meter. Af Thus P2 can be adjusted to compensate for energy losses induced by metals in an the vicinity of the coil etc. 10 As already mentioned, PI in fact deter- su mines the biasing of the lambda diode, and hence the sensitivity of the circuit. The optimum setting of PI can be deter- mined as follows: The wiper of PI is turned fully towards the cathode of D1 . The oscillator is then inoperative and the meter defelction at a maximum. Ensure that the needle is not hard up against the end stop, however (if necessary adjust P2 accord- ingly). Now turn the wiper of PI in the opposite direction. At a certain point the needle deflection will decrease (the oscillator is now running). Continue to turn PI until the deflection is at a mini- mum (here again it may be necessary to adjust P2). The meter range is then set between these two extremes by ad- justing P2 (note, P2 will need to be read- justed when the coil, L x , is changed). To gain proficiency in using the meter it is advisable to practice with a tuned circuit whose resonant frequency is already known. At the same time one can experiment with different settings of PI to obtain optimum sensitivity. Once accustomed to using the meter, one can proceed to provide a calibrated scale for the variable capacitor C3. For this, the gate dipper is used as an AM demodulator. A length of wire (minimum 10 metres) which can be positioned either horizontally or verti- cally is used as an aerial. The latter is coupled to the coil of the grid-dip meter via a single-turn coil (see figure 7). One end of the coupling coil should be earthed (to for example a water pipe (etc.). Capacitor C3 is then adjusted until a known AM station can be heard via the headphones. The oscillator fre- quency will then be the same as the carrier wave frequency of the trans- mitter. The scale for the variable capa- citor can be calibrated simply by tuning into a number of different stations. If desired, higher frequencies can be cali- brated by employing a number of tuned circuits of known resonant frequency. The position of PI at which reception is the strongest corresponds to the position which gives maximum sensitivity when using the circuit as a grid-dip meter. To facilitate tuning, it is recommended that a tuning^, capacitor with slow motion drive be use3. H 1 0-26 - elektor STRAIN Although the device described here is called a strain gauge, it is in fact being used to measure stress, i.e. the forces which are applied to it. Strain denotes the deformation of a material (change in form or bulk) as a result of the action of stress. However in all elastic materials (such as e.g. steel) there is a linear relationship between stress and strain, which is expressed by the following equation: 6 = e. E, where 8 is the stress, e. is the strain, and E is a coefficient termed the modulus of elasticity. Every elastic material has its own modulus of elasticity which remains constant within certain limits of stress. Since strain is proportional to stress, it is thus possible to measure the one via the other. The basic design of the strain gauge is shown in figure 1 . An electrical signal is derived from a transducer. This signal is then amplified and used to drive an LED scale display. If one looks ahead to figure 3, it can be seen that the elec- tronics involved are in fact extremely simple. The heart of the strain gauge is the stress absorber, the object upon which the forces to be measured actually act, and whose strain is measured. This part of the device cannot be bought, and must be made oneself. Stress absorber As is apparent from figure 2, the object which bears the brunt of the forces be measured is formed from a sheet of suitable metal, with a hole drilled in each end. The central portion is made narrower than the top and bottom, since it is at this point that the defor- mation of the metal is measured. The amount of strain is actually measured by a special type of transducer called an electric-resistance strain gauge. In its simplest form it consists of a grid of resistance wire cemented between two sheets of paper. The gauge is bonded to the metal, so that it undergoes the same deformations. The resultant changes in the length and cross-sectional area of the wire causes a proportional change in its resistance. As figure 2 makes clear, four resistance strain gauges are mounted in a bridge configuration, two on the front of the stress absorber and two on the back. The changes in the resistance of the W. van Dreumel few projects which have not formed the subject of an article in Elektor at one time or another, however a strain gauge falls into that category. This in itself is perhaps slightly surprising, since there are a number of possible applications for such a device - a training aid for 'strength sports', measuring loads on cables, etc. or simple weighing purposes. vertically oriented gauges (R2 and R3) are summed, whilst the horizontally oriented gauges provide temperature compensation. A further advantage of this arrangement is that flexing of the metal in the lateral plane will have no effect, since the bridge remains in equilibrium. The bridge is provide with a stabilised supply voltage. A current of roughly 20 mA can flow through the strain gauges, and since they have a resistance of approximately 1 20 S2, the voltage across the bridge is fixed at roughly 5 V. Circuit The circuit of the strain gauge is shown in figure 3, and, as has already been mentioned, is fairly modest in dimen- The low level output voltage of the measuring bridge must be considerably amplified before it can be displayed. This is performed by two 747 ICs, each of which contains two 741 type op-amps (it is of course also possible to employ four conventional 741's). A1 and B1 are connected as unity-gain amplifiers with high input impedance, so that the bridge is not loaded by the amplifier circuit. The latter is formed by A2 and B2, which are connected as a differential amplifier with a gain of approximately 1000, adjustable by means of P2. Under quiescent conditions (no force applied to the gauge), PI is adjusted for zero output voltage. The display takes the form of a column of LEDs, which are driven by the well-known UAA 170 LED voltmeter 1C. Depending upon the input voltage, this chip lights one of the LEDs D3 . . . D18. The input is protected against negative and excessively large positive voltages by zener diode D2. The power supply circuit is also quite straightforward. Two integrated voltage regulators (7812 and 7912) provide the + and -12 V rails, whilst the 5 V for the resistance bridge is obtained by the inclusion of two resistors (R9, RIO) and a zener diode (D1). Construction The amplifier, display driver and displays can easily be mounted on a strip of 1-10-27 Veroboard, or similar. The stress ab- sorber, however, is slightly more compli- cated, since it involves a certain amount of mechanical handiwork. The dimensions of the stress absorber will depend upon the type of material used and upon the desired measurement range. To obtain optimum sensitivity, the material should undergo as great a deformation as possible when under maximum load conditions. As can be seen from column 3 of table 1, the most suitable material from this point of view is hard brass, with duraluminium a good second. Column 2 of the table is used to calculate the cross-sectional area of the stress absorber (X x Y in figure 2). This is done by dividing the maximum permissible stress into the required range of forces to be measured. The ratio of X to Y can be chosen individually, however X should not be smaller than approximately 10 mm (because of the size of the strain gauges) and the overall shape of the stress absorber should remain similar to that shown in figure 2. The values of R6 and P2 in the circuit diagram are calculated on the basis of a stress absorber made of duraluminium and with a cross-sectional area of 20 mm 2 . Although electric-resistance strain gauges are not widely used by the amateur, various types are available commercially. For this particular application their dimensions should be in the region of 5x10 mm. Suitable types are (among others) the EA-XX-2506G-120 from Micro Measurements, the 3/120 LY 11 from HBM, and the PR9833 k/01 from Philips. y Calibration e Under zero load conditions PI is adjusted h such that the first LEO in the scale e lights up. A known weight is then t. suspended from the gauge and P2 configuration of four electric-resistance strain Figure 1. Basic principle of the strain gauge. sensors are bonded. E; kg/mm’ 6; kg/mm 1 stress: % hard brass 9000 42 0.46 duraluminium 7000 26 0.37 semi-hard brass 9000 24 0.27 hard aluminium 7000 14 0.20 sheet steel 21000 18 0.09 Table 1. The information contained in the table allows the suitability of various metals to be assessed, and the cross-sectional area of the "stress absorber" to be calculated in each case. adjusted until the corresponding LED However if PI is mounted such that it is lights up (obviously this will depend accessible externally, this should not upon the measurement range chosen), present too many problems. If, for example, 10-turn potentiometers are used for PI and P2, a fairly accurate scale can be obtained. For a variety of Literature: reasons, it is possible that the zero point Linear Applications, National of the scale may tend to fluctuate. Blektor 12, April 1976. M 10-28- jctober 1979 It is interesting to note that, by and large, our readers' comments and queries — yes, and problems, too — run parallel to our own. It is even more interesting that all our problems have been solved, as will be described. To make full use of a microprocessor, one should normally have access to the instruction manual. For the 2650, this is a 174-page book ... Fortunately, the main points can be summarised rather specifying negative numbers means that 00 . . . 3F are positive; 40 . . . 7F are negative; greater than 7F don't exist. All this may or may not seem simple in theory; in practice it has proved a source of endless programming errors. . . It is easier to miscalculate a relative address than to get it right! For simple programs, one may as well use 'absolute addressing' — the additional memory space required (the corresponding instructions are longer) is rarely a problem. I plapd TV games.... Everything you want to know about making software for the TV games computer, in two easy lessons . . . In Elektor 48, April 1979, we described how to build a 'TV games computer'. Included was a brief explanation of how it works; the 'instructions for use' consisted of little more than the Read Cassette routine, so that the programs given on ESS records can be entered. Apparently, however, the majority of our readers want more: they want to do their own programming. 'This will prove relatively easy', we said - and to prove it, the (sometimes fairly sophisticated) programs on the second ESS record for the TV Games computer were developed by a novice. The following article is based on the experience gained . . . Addressing modes When fetching or storing data, or jumping to and fro in a program, it is essential to specify the 'address' concerned. Obviously. In the TV Games computer, there are several different ways of doing this. However, practice makes perfect, and as programs get more complex it becomes worthwhile to start using relative addresses wherever possible. As an aid to the beginner, one of the programs on the new ESS record contains a calcu- lation routine for relative addresses — a useful check! Absoluts or relative An 'absolute' address is simply the address itself. For instance, in machine language the instruction for 'Load Absolute into register zero' starts with 0C (more on this later!); if the data is to be fetched from address 0F00, the full instruction will therefore be 0C0F00. A 'relative' address, on the other hand, specifies a small jump in the program. Basically, the processor will calculate an 'absolute' address by adding the specified number (between -64 and +63) to the address that follows that particular instruction. As an example, if the instruction 'Load Relative into register zero, 2F' (in machine language: 082F) is located at the two address bytes 093E and 093F, the following address is 0940. The 'absolute' address corresponding to this instruction is therefore 0940 + 2F = 096F, and the data will be fetched from there. The negative number required for a 'backwards' jump is entered as a '7-bit two's complement number'. In simple language, this means that you count down from 80 hex- For instance, if in the previous example the data was to be loaded from address 093D, the relative address would be 70: the 'following address', 0940 corresponds to 80, so 093F corresponds to 7F, 093E to 7E and 093D to 7D. The full instruction is therefore: 087D. Note that this way of 1 Direct or indirect The two types of addressing explained above are both referred to as 'direct' address modes: data is transferred from or to the specified address. An alternative possibility is a two-step operation: specify an address where the desired address can be found. This is referred to as 'indirect' addressing. Although both absolute and relative indirect addresses are possible, only the latter are useful in the basic TV games computer. A relative address is converted to an indirect relative address by adding 80. In the example given above, the 'load relative' instruction 082 F was located at addresses 093 E and 093F; the data was then fetched from address 096F. However, if the instruction is modified to 08AF (2F + 80 = AF) the elektor October 1979 - 10-29 08F0 08F4 08F8 08FC 0900 0902 C0 60 50 CE 3D CE 50 60 C0 00 28 FF 63 FE 00 00 7620 05C3 0400 (-► CD5F00 1 — 5978 050E ► 0D48F0 CD7F00 - 5978 CC1 FC0 c ?l I 5! 0922 0924 0926 0929 c CC1 FC1 0C1 E88 F420 9879 3F05CD 1F0014 PPSU. II LODI. R1 LODI. R9 STRA. I-R1 BRNR, R1 LODI. R1 LODA. I-R1 STRA, I/R1 BRNR. R1 LODI. R0 STRA. R0 LOO I. R0 STRA. R0 LODA. R0 TMI. R0 BCFR BSTA. UN BCTA, UN 3 instructions ar already 00 aft by modifying the data in the LODI • This slightly extended 'return to monitor' However, other cc contents of addresses 096F and 0970 will be used as the absolute address for this instruction: if the data stored at these addresses is 0A and 00, say, the 'load indirect relative, 2F' instruction will be carried out as if it read 'load absolute from 0A00'. Once again, for simple programs it is easier, quicker and more reliable to use the corresponding 'absolute' instruction, and forget about the 'relative indirect' mode. As an aid to courageous novices, the calculation routine mentioned above actually gives two results: if the relative jump in the previous examples is calcu- lated, the answer will appear as '2F Or AF'-for direct and indirect, respect- ively! Indexed In contrast to the 'relative' and 'indirect' addressing modes, 'indexed' addressing can prove extremely useful in even the simplest of programs. The basic idea is that the data stored in one of the registers is added to a specified 'absolute' address; the result of this addition is used as the absolute address for the instruction. The register containing the additional data for the address is referred to as the 'index register', and this register must be specified in the instruc- tion. The data are always transferred to or from register zero when indexed addressing is used. To specify the basic indexing mode, 6000 is added to the absolute address. Thus 0D6900 is not interpreted as ’load register one from absolute address 6900'; if we assume that the data already in register one is 0A, the instruc- tion will be read as 'load register zero from absolute address 090A' — i.e. from tion make it invaluable: 'indexed with auto-increment' and 'indexed with auto- decrement', specified by adding 2000 or 4000 to the absolute address. In both cases, the final address is calculated in the same way - by adding the data in the 'index register' to the specified absolute address. However, before calculating the final address, the data in the index register are increased by one ('auto-increment') or one is subtracted from the data ('auto-decrement'). The value of this instruction is best illustrated in an example. Let us assume that we want to clear all 'background data' in the PVI. This means storing 00 all addresses from 1F80 . . . 1FAC: in all! Instead of using 45 individual ire absolute' instructions, a single >re absolute, indexed with auto- decrement' instruction can be used, with a bit of padding: 052D LODI, R1 0400 LODI, R0 r>CD5F80 STRA, I-R1 I — 597B BRNR, R1 The 'shorthand abbreviations' given after the actual machine-code instruc- tions are referred to as 'mnemonics'. They are simply a quick way to jot down what the instruction does. This brief section of program is executed as follows. First, the 'index register', R1, is loaded ('LODI, R1'= Load Immediate, Register 1 - more on this later) and '00' is loaded into Register 0. This is followed by the 'Store Absolute, Indexed to Register 1 with auto-decrement' instruction - incidentally, the value of mnemonics is clearly illustrated here: it is a lot quicker to write 'STRA, l-RT than the mouthfull given above. At this point, the value in R1 (2D) is reduced by one and the result (20 is added to the basic absol'*** address 1F80 (5F80 = 1 F80 + 4000 for 'auto- decrement'). The value in R0 (00) is then stored in the resultant absolute address: 1 F80 + 2C = 1 FAC. One down, 44 to go! The next instruction, which will be explained in greater detail later, is 'Branch if Register 1 is Non-zero, Relative'. Since R1 is most definitely non-zero (it is still 2C at this point), the 'relative branch' is executed: the program 'jumps back' to the beginning of the previous instruction, as indicated by the arrow. This whole performance is repeated, storing 00 in progressively lower PVI addresses, until the data in 0993 0905 0907 O90A O90C 090 E 0911 0913 0915 0918 054E 0400 -* CD5F00 - 597B 0469 CC1 FC6 052D 04FF -»CD5F80 - 597 B LODI. R1 LODI. R0 STRA, I-R1 BRNR, R1 LODI, R0 STRA. R0 LODI. R1 LODI. R0 STRA, I-R1 BRNR. R1 HALT* :o end a program, as w 1979 played TV i R1 becomes zero. At this point, the BRNR, R1, instruction does not result in a jump back, since R1 is zero, and the rest of the program is carried out. For those who feel like trying out this program, it is more interesting to turn the background on instead of off. In that case, the background and screen colour must also be specified: '69' in address 1 FC6 gives yellow on blue. Furthermore, the objects will have to be cleared, since they are also used by the monitor program. A complete program is given in Table 1; the reason for starting at address 0903 (instead of 0900) will be given later. While on the subject of indexed addressing, one final point should be noted. In general, this mode is available as a variation of all absolute addresses, with the exception of branch instruc- tions. The only two indexed branch instructions, BXA and BSXA, will be discussed further on. FC1 STRA, R0) 80 LODI. R0 1 F91 STRA. RO 1 F93 STRA, R0 1 F9F STRA, R0 1 FA1 STRA. R0 0C LODI. RO 1 F98 STRA, R0 30 LODI. RO 1 F99 STRA. RO 01 LODI. RO 1 FAB STRA. RO 49 LODI, RO 1 FC6 STRA, RO E88 LODA, RO 120 TMI. RO !79 BCFR : 05CD BSTA, UN -0014 BCTA, UN Nearly all instructions involving transfer or manipulation of data require the use of a register. Obviously, the register to be used must be specified in the instruc- In the examples already given, and Table 1 in particular, this principle is clear. The first byte of each instruction specifies the basic instruction and the register involved. For instance, the basic instruction for 'Load Immediate' is 04xx (where 'xx' is the data to be loaded); adding the number of the register to this gives the complete instruction: 04xx for Register 0, 05xx for R1, 06xx for R2 and 07xx for R3. In practice, this means that four vari- ations exist for most instructions: one for each register. It also means that the second digit in an instruction specifies the register involved: 0, 4, 8 and C for register 0 (0803, for instance); 1, 5, 9 and D for register 1 ; and so on. Finally, some instructions refer to data transfer or manipulation involving two registers, one of which is always register zero. The instruction 'Load Register 0 from Register 1', for instance, is 01. Similarly, 'LODZ, R2' (to use the mnemonic) is 02. It should be noted that in some cases, but not all (I), both registers can be specified as Register 0. This can sometimes be useful, as will be explained under 'programming tricks', next month. Registers We have already mentioned ‘registers' several times. It is now time to take a closer look at them. To put it in a nutshell, a register can be visualised as a memory location inside the micro- processor itself. In the 2650, 8-bit registers are used; this means that they can store any data value from 00 to FF. In all, seven 'general-purpose' registers are available: register 0 and two 'banks' of three registers (R1, R2, R3 and R1', R2' and R3’). Of these seven, register 0 is always immediately available; at any given moment, however, only one of the register banks ( R 1 . . . R3 or R 1 ' . . . R3') is accessible. The other bank, and the Table C. data contained in those three registers, — sense: this bit is 'V for the duration is 'in cold storage'. (The way in which of the vertical reset pulse, at the end one or other of these banks can be of each 'frame'. It can be used, for selected will be discussed below: see example, to synchronise the program to "Program Status Word'). Any instruction the actual display on the screen, referring to R1, R2 or R3 is performed — flag: can be set, reset and tested at only on that register in the selected will, as an indication of some con- bank - it has no effect on the corre- dition relating to the program - for sponding register in the other bank. instance, to distinguish between the first and following runs through a particular Program Status Word section in the program. The 'Program Status Word' refers to two - Interrupt Inhibit. The PVI generates special-purpose 8-bit registers: the 'interrupts’ at the end of each frame "Program Status Upper" (PSU) and and eaclr time an object is completed. If "Program Status Lower' (PSL). Each bit this bit is set, these interrupt requests n these registers has a special meaning, are ignored; otherwise, program as illustrated in figure 1. Briefly, the execution 'jumps' from wherever it -nost important points as they relate to happens to be to address 0903 and runs the complete TV games computer are as the program section that it finds there follows: as a subroutine. Note that this can cause chaos, if one isn't aware of the mechanism; for this reason, it is advisable to start every program with the instruc- tion '7620' (i.e. set Interrupt Inhibit). In the simple programming example given in the original article (and in the corresponding program on the ESS record) this was forgotten . . . More on this later. The Interrupt Inhibit bit is set automatically by the processor when the interrupt routine is executed; it is only reset by an explicit command in the program. - Stack pointers. These three bits are set and reset by the processor, to keep track of the 'subroutine levels'. The stack is eight levels deep, which means that the main program may branch to a subroutine, that may branch to a further subroutine, and so on up to eight times before starting to 'climb back up' by means of Return instruc- tions. It is possible to modify the stack pointers deliberately, as part of a program, but this is unwise for beginners . . . - Condition Code. These two bits are set by (the results of) several different instructions, as shown in the Instruction Set given elsewhere. For instance, if the data loaded into a register is 00, the condition code will also be set to 00. Most of the branch and return instruc- tions can be made 'conditional', by specifying a particular condition code setting: in that case, a 'Branch on Condition True' instruction, for instance, will only be executed if the actual condition code at that point corresponds to the one specified. If the two don't correspond, the instruction is ignored. - I DC, WC, OVF, COM, C. These five bits will be dealt with later; see: Arithmetic and Compare. - Register bank Select. This bit is used 10-32 — ele 1979 Load registar zero (LODZ) Load immediate (LODI) Load relative (LODR) Load absolute (LODA) Store register zero (STRZ) Store relative (STRR) Store absolute (STRA) 92 from R2 to R9 08yy 'yv' = displacement OCzzzz 'zzzz' = address Cl to R1 from R0 C8yy -yy’ - displacement CCzzzz 'zzzz' = address to select one or other of the two 'register banks' described above. Various manipulations are possible on the two Program Status registers, as will be described. The Clear, Preset and Test instructions will prove the most useful; these can be used to set any bit (or combination of bits) to 0 or 1, as required, and to test the setting of any bit(s). An example was given above: '7620' is the code for 'Preset Program Status, Upper, Masked 20'; as can be seen in figure 1, this sets the Interrupt Inhibit bit. Instruction Set Several instructions have already been mentioned briefly; having laid the groundwork, it is now possible to examine the instruction set in greater detail. Load and store The principle of these instructions is obvious: data is transferred into (Load) or from (Store) a specified register. Load Register zero and Store Register zero transfer data between R0 and one of the other three registers. 'Cl', for example, transfers data from R0 to R1. Note that the instructions '00' and 'C0‘, for 'LODZ, R0' and 'STRZ, R0\ don't exist. Load immediate transfers the data given in the instruction to the specified register. '07CA' (= LODI, R3) loads the data 'CA' into register 3. Load relative and Store relative refer to the relative addressing mode described earlier. Relative Indirect addressing can also be used, as described earlier. Load absolute and Store absolute are used when absolute or absolute indexed addressing is required. are set according to the sign of the data transferred: they become 01 if the data is a positive number, 00 if it is zero and 10 if it is negative (i.e. 80... FF, corresponding to — 128 . . . -1). The Load and Store instructions can be summarised as shown in Table 2. (Subroutine) Branch Normally speaking, a program is executed step by step: in other words, the instructions are carried out in the order in which they are stored in the memory. If a jump to a different section of the program is required, a so-called Branch instruction must be used. There are two basic types of Branch instruction: those for a (main program) Branch and those for a Branch to Subroutine. In the former case, the main program itself jumps to a different point in the memory; a Branch to Subroutine, on the other hand, can be considered as an interruption in the main program: the main program is stopped at the branch-to-subroutine instruction, the subroutine (elsewhere in memory) is carried out, after which the main program continues at the point where it was interrupted. Several variations of both types of Branch instruction are available: Branch (to Subroutine) on Condition True, Relative or Absolute. For each of these four basic instructions, a particular setting of the Condition Code bits can be specified; the branch will only be executed if the actual condition code corresponds to the one specified. For example, the basic instruction for Branch on Condition True, Absolute (BCTA) is 'ICzzzz', where zzzz is the absolute address to which we want to jump. As it stands, this branch instruction will only be carried out if the condition code is 00. Similarly 'IDzzzz' and 'lEzzzz' specify the condition codes 01 and 10, respectively. Finally, 'IFzzzz' would seem to refer to a condition code 1 1 , but this code doesn't exist. In fact the corresponding instruction is used for an unconditional branch: a branch that is always carried out, no matter what the condition code. Branch I to Subroutine) on Condition False, Relative or Absolute, These four instructions are similar to those described above; the only difference is that the branch is executed if the actual condition code does not correspond to the one specified. The 'BSFA' instruction BCzzzz, for example, will cause a branch to subroutine if the condition code is either 01 or 10, but not if it is 00. Note that no 'unconditional' variations of these instructions exist: the corresponding codes 9Byy, 9Fzzzz, BByy and BFzzzz are used for other instructions. Branch (to Subroutine) on Register Non-Zero, Relative or Absolute. As part of these instructions, one of the registers (R0 . . . R3) is specified. If the content of this register is not zero, the branch instruction is carried out; otherwise it is ignored. ‘BRNA, R0' (5Czzzz), for instance, will cause a jump to address zzzz provided the data stored in Register 0 is not zero. Branch on Incrementing (Decrementing) Register, Relative or Absolute. These instructions are an extension of the previous set. Once again, a register is 1979- 10-33 I played TV games . . . Branch Itc example (BCTR) 18yy (BCTA) 1 Czzzz (BCFR) 98yy (BCFAI 9Czzzz (BRNRI 58yy (BRNA) 5Czzzz (BIRRI D8yy (BIRA) DCzzzz (BDRR) F8yy (BORA) FCzzzz (ZBRR) 9Byy (BXA) 9Fzzzz Branch to Subroutine: On Condition True, Relative On Condition True, Absolute On Condition False, Relative On Condition False. Absolute On Register Non-zero, Rel. On Register Non-zero, Abs. Zero Relative, Unconditional Indexed Absolute Unconditionf (BSTRI 38yy (BSTA) 3Czzzz (BSFR) B8yy IBSFA) BCzzzz (BSNRI 78yy (BSNAI 7 Czzzz IZBSRI BByy (BSXA) BFzzzz Return from subroutine: Conditional (RETC) 14 And Enable Interrupt. Conditional IRETEI 34 IByy- unconditional 1 Fzzzz = unconditional 9Byy: see below 9Fzzzz: see below R3only! 3Byy - unconditional 3Fzzzz = unconditional BByy: see below BFzzzz: see below R3 1 ■sly I The function of the various 'bits' in the Program Status Registers was explained above. At this point, we are only interested in the available instructions (as summarised in Table 4). The Load and Store instructions refer to data transfer between one of the Program Status Registers and Register 0 only. 'Load Program Status Upper' (LPSU: 92) for instance, loads the contents of R0 into the PSU. In practice, these instructions will not be used often, since in most cases Clear, Masked or Preset, Masked instruc- tions are more suitable. 'Clear Program Status Upper, Masked 40' (7440) will Program Status. Tast, Compare, at Store Clear Status. Upper Status. Lower Program Status, Upper Program Status. Lower (LPSU) 92 (LPSL) 93 (SPSUI (SPSLI ogram Status. Upper, Masked ICPSU) 74 m Program Status. Lower, Masked ICPSLI 75 m Program Status, Upper. Masked (PPSUI 76 m Program Status. Lower. Masked (PPSL) 77 m Test Pro| Test Under Mask Imp Compare to Register Compare Immediate Compare Relative Compare Absolute No Operation (TPSL) B5mm (TMI) F4mm . . . F7mm ICOMZ) E9 . . . E3 (COMI) E4xx . . . E7xx (COMR) E8yy . . . EByy (COMA) E Czzzz . . . EFzzz specified. In this case, however, 01 is first added to (increment) or subtracted from (decrement) the contents of the register, after which the branch instruc- tion is only carried out if the new contents are non-zero. Note that no 'Branch-to-subroutine' version of these instructions exists. Zero Branch (to Subroutine! Relative, Unconditional. These two instructions are relatively useless in the TV games computer, since they specify a branch relative to address 0000: the start of the monitor program! Branch (to Subroutine) Indexed, Absolute, Unconditional. These two instructions are the only two indexed branch instructions that exist. The value in the index register (which must be R3) is added to the basic absolute address given, and the branch is executed to the resultant address. Return from subroutine, conditional. As before, a condition code is specified as part of this instruction; if the actual condition code matches, the subroutine is terminated. An unconditional end of the subroutine is indicated by the condition code 11, so the instruction RETC, UN is 17. A variation on this instruction exists (RETE) that not only ends the subroutine, but also resets the Interrupt Inhibit bit. Not a good idea, until one has gained enough experience to start using the interrupt facility . . . The complete set of branch instructions is summarised in Table 3. clear the 'flag' bit, without having any effect on the other bits in the PSU. Similarly, 'PPSL, RS' (7710) will select the second register bank. Finally, any bit (or combination of bits) in each of the program status registers can be rested : 'Test Program Status Upper, Masked 40' (B440) will cause the Condition Code to be set to 00 if the 'flag' is set; otherwise the Condition Code will become 10. 10-34 -i played TV gar With the complete program given so far (in tables A ... C), it is possible to get the object into your sights. Now, what about shooting it down?! First, modify the instruction in address 0962: instead of '9C0991'. enter '9C099B' The existing program, from address 0990 is then extended as follows: (098E 0992 0994 0996 0998 099A 099B 099D 099 F 09 A 1 09A3 09A5 09A7 09A9 09 A 8 09 AO 09 A F 09B1 0983 0986 0989 09BB 09BO 09C0 09C2 09C4 09C6 09C8 09CA 09CC 09CF 09D2 09D4 09D7 09DA F80O COCO COCO CO CO CO CO coco Once the object is accurately (!) i the ’F* key. BORR. RO) 2x NOP 2x NOP 2x NOP 2x NOP 2x NOP RETC, UN BCFR PPSL, COM COM I. R3 BCFR COMI, R3 BCFR COMI, R2 BCFR COMI. R2 BCFR LODI, R1 LODA. I-R1 STRA. I/R1 BRNR, R1 LODI. R1 LODA. RO TMI. RO BCFR BDRR. R1 2x NOP 2x NOP 2x NOP BCTA. UN LODA, RO TMI, RO BCFA BSTA, UN BCTA. UN Test under Mask; Compare With all the conditional branching facilities available, is is obviously useful to have instructions that set the Condition Code. Basically, all types of data transfer to or data manipulation in a register do this; furthermore, the Test Under Mask Immediate (TMI) and Compare (COM) instructions set the condition code bits without altering the data in any way. The TMI instruction is the easiest to use: a register is specified in the first part of the instruction ('F4' for register zero. 'F5' for R1, and so on) and a 'mask' in the second part. The mask simply specifies the bits to be tested: '81', for instance, is 10(30 0001 in binary and so the first and last bits will be tested. If, in the data contained in the specified register, these two bits are 'Is', the condition code will be set to 0(3; if not, CC will become 10. An example. If the data in R1 is 05, the instruction F501 (TMI, R1, 01) will set the condition code to 00 —the data, 05, is 0000 0101. By contrast, F581 will set the CCto 10: 0000 0101. The compare instruction is basically similar, but it is both more precise and more versatile — and also more compli- cated to use. In this case, a data value is specified instead of a mask, and the condition code can be set in three ways: 01 for 'greater than', 00 for 'equals' and 10 for 'less than'. There are two main points to watch, when using this instruc- tion: what is meant by 'greater than' (data in register greater than data specified, or vice versa; see the footnotes in the instruction Set) and what type of comparison is required. With the 'COM bit' in the PSL set to 0, an 'arithmetical' comparison will be performed: all values from 80 to FF are treated as negative numbers (two's complement)! If the COM bit is set to 1 (by means of the instruction 7702 = PPSL, COM) a 'logical' comparison will result: the data is treated as a positive 8-bit binary number. No Operation A surprisingly useful instruction, thisl When the processor finds the code 'C0' it simply carries on to the next instruc- tion. There are two cases where this can be particularly useful: to 'delete' instructions that prove unnecessary, without having to re-enter the rest of the program, and to 'leave a gap' into which further instructions are to be added at a later date. This stops the processor, quite drasti- cally. The only way to start it up again is either to operate the 'reset' key or provide an interrupt — provided the interrupt inhibit bit is not set. in general, this is not a good idea; in the TV games computer, a 'return to Monitor' instruc- tion (1F0000 = BCTA, UN, for instance) will usually be more suitable. I played TV gan aber 1979- 10-35 A few tips The instructions explained so far are sufficient for simple programs. The remaining facilities will be dealt with next month. Meanwhile, however, a few practical tips on how to program should prove useful. First and foremost: remember to block the Interrupt facility if this is not required in the program! For the time being, it is advisable to start every program with the instruction ‘7620’ (PPSU, II). There are several ways to end a program. Usually, one of the keys ('PC', for instance) is used to initiate a jump back to Monitor. A few variations are given at the end of Tables A . . . D. The jump to Monitor itself can be done in several ways. The shortest is to use a ZBRR instruction: '9B00' should do the trick, but we've never actually tried it. A similar solution is '1 F0000', as mentioned earlier; this we have tried, and it usually works. Sometimes, however, for no apparent reason problems occur: in particular, a row of black squares or lines down the left-hand edge of the screen when the program is restarted. Without knowing why this happens, yet (maybe we will know more next monthl), we can offer three solutions: - return to monitor by means of the two instructions 0400 LODI. R0 1F0011 BCTA. UN Note that, in this case, the original value in R0 is lost; for that matter, returning via address 0000 always causes the data in R0 to become 09, as several readers have noticed! - similarly, but untried : 20 EORZ, R0 9B11 ZBRR This has the advantage that if fits in the same memory space as '1F0000', if the latter causes trouble. - finally, if the value in R0 is to be stored: 3F05CD BSTA, UN 1F0014 BCTA, UN Don't ask us to explain this one — that would require an extensive discussion of the monitor software! When it comes to the program itself, the first thing is to work out what you want to do. Obviously. For simple programs, this can usually be put into words quite [T 060A 0F1FCB F440 9879 FA77 LODI, R2 LODA. R3 TMI, R3 BCFR. * BDRR, R2 0900 0902 0904 0906 0909 0900 0910 0912 0914 0917 0919 091 C 091 E 0920 0922 0924 7620 05AD 0400 C CD5F0O 597 B [C CC1 FC6 052D 04FF CD5F80 060A 0F1FCB F440 9879 FA77 5970 PPSU, 1 1 LODI, R1 LODI, R0 L STRA, I-R1 | BRNR, R1 J LODI, R0 "1 STRA. R0 J LODI. R1 LODI. R0 STRA, I-R1 LODI, R2 "V LODA, R3 TMI. R3 > BCFR. * ( BDRR, R2 ) BRNR. R1 HALT background easily. The program given in Table 1 , for example, was originally specified as 'clear objects; define background colour; load FF in all background bytes'. For more complicated programs, some more extensive advance plotting may be required - using a flow chart, say - but usually a complicated program can be 'broken up' into several simple routines. These can each be tried and tested individually, before 'tacking them together' to obtain the complete final program. As each semi-complete routine is entered, it is highly advisable to store it on tape before the first test run. This lesson was learned the hard way, when one misplaced relative address caused 'garbage' to be stored at all sorts of awkward places throughout the program. The only solution was to laboriously re-enter the whole program . . . When it comes to 'de-bugging' a program — it always does, no program works perfectly first time! — the 'Breakpoint' routine can be very useful. There are two points to watch, however. In the first place, as mentioned in the original article, the Breakpoint address given must be the first address of an instruction. For instance, in the following section of program: 0900 7620 PPSU, II 0902 0400 LODI, R0 0904 0605 LODI, R2 breakpoints can be specified at addresses 0900, 0902 and 0904, but not at 0901 , 0903 or 0905! The second point to watch is that breakpoints modify the program at that point. If the breakpoint is found in the normal way, the original data will be restored automatically. However, if things really go wrong so that the reset key must be used to return to Monitor, it may be necessary to restore the data by hand! The PVI and keyboard The main points regarding the PVI were 10-36-1 • October 1979 I played TV gar Table E. Finally, what about adding a time limit? As follows: - first, fill in the space in the program starting at address 0990: (098E 0990 0994 (09C4 09C6 09C8 09CA F800 7710 E700 F977 7710 0700 7510 BDRR, R0) PPSL, RS COM I, R3 BCFR LODI. R3 CPSL, RS ting at 09C6: BDRR, R1I PPSL. RS LODI. R3 CPSL. RS i data at address 0981 : instead of '1 — at address 09D4. the instruction is modified i set the 'dock' IR3 in the upper register bank! going as soon as the object is first mowed | the object is hit 1 F0945'. the instruction becomes T F09DD' io '9C0976' (instead of 9C0945I. on. as follows: if 'clock' stopped (R3 - ■ 00). preset R2’ for one-second count } decrement R2' 1 reset R2' and / decrement R3‘ branch if R3' - 00 | repeat key check routine store 00 in score, make screen white ('you lose'!) and repeat all discussed in the original articles and the data supplied with the p.c. board. One point, however, did not receive all the attention it deserves - at the time, we didn't realise how useful it was! The 'VRLE' bit, at address 1FCB, goes high at the end of each frame; it is reset at the end of the VRST pulse or when read. This means that it can only be read as '1' once for each frame. As an example, a simple 'delay' routine is given in Table 5. Basically, what happens is that the processor waits until it finds VRLE = 1; it then decrements the value in R2 and repeats the VRLE scan if R2 is not yet zero. The result is a delay, approximately equal to the value in R2 times the frame period (20 ms). By way of demonstration, this routine can be included inside the 'load background' loop in Table 1. The result is given in Table 6. Finally, the keyboard. Each column corresponds to one address: 1E88 for the column above the '-' key, 1E89 and 1E8A for the next two columns, 1E8B for the column that includes the 'reset' key (note that this key itself is not scanned in the keyboard layout suggested!) and 1E8C . . . 1E8E for the last three columns. When reading the keyboard in this way, the four left-hand bits retrieved as data correspond to the four keys in the column — and the other four bits are all ones! 'IF' at address 1E88, for instance, means that the '-' key is operated; '4F' at 1E8A corresponds to key '8'. Note that contact bounce can sometimes be a problem with this type of rapid key-scan. A more sophisticated routine, using part of the Monitor software, will be described next month. RCAS, WCAS and ESS The Cassette routines were discussed in the earlier articles. Apparently, some readers have had problems loading the first ESS record, so a few words of advice may be appreciated . . , Assuming that a cassette recorder is used, the first point to check is that programs can be stored on tape from the computer and retrieved without any problems. This can be done without even loading a program: there is always some kind of data in the memory! The — test sequence is as follows: T , - operate the 'reset' key; - operate the 'start' key ('1111' should appear) ; - press the "WCAS' key CbEG ='); - enter 0900, followed by '+' I ('bEG = 0900, End ='); - enter 0FFF, followed by '+' I ('End = 0FFF, SAd ='); - enter 0900, followed by '+'1 ('SAd = 0900, FIL ='); - enter but not '+'('FIL = V); - start the tape in the Record mode, and set the level to about half way; - operate the '+' key. Hopefully, the recording level meter should indicate approximately nominal full modulation during the first second or so after the '+' key is operated; it will then drop back slightly (to a few dB below full modulation). If this is not the case, the level setting can be corrected, after which the whole sequence described above will have to be repeated. Having found the correct level, it is wise to make a note of it, for future reference. z* ' ' n * o i i; • . played TV games . . . elektor October 1 979 - 1 0-37 Having made a complete recording at correct level, the various addresses entered above will reappear on the screen. The test can now be concluded: - operate the 'RCAS' key ('FIL ='); - enter the file number, '1' ('FIL = V); - press the key ( not '+'!). The text 'FIL— 1' will jump to the top of the screen. The tape can now be played back, and the data recorded on it Mill be compared with the original data in the memory. During this time 'approximately 35 seconds) two dots will flash below the sign on the screen. At the end of this time, all the t original data will reappear on the screen a with the added line 'PC = 0900'. If this d nappens, all is well and the cassette i, nterface is working. II In the unhoped-for event that the check routine breaks off before the end of the recording, with the message 'Ad = 090A', for instance, then something is wrong . . . In our experience, moving the recorder further away from the TV set invariably cures the problem. Next step. The ESS record. You would expect that recording it on tape and then playing it into the computer should work. In practice it does, most of the time, but sometimes the computer rejects the program for no apparent reason. (Message: 'Ad = ...'). Since the programs are on the record (with the exception of the missing 'Interrupt Inhibit' instruction in file 6, as mentioned earlier) it must be possible to load them. In one particularly stubborn case, the following solution was found. The output from the preamplifier, after H LITTLE PrHCTICE dOE5 H LOT DF CUDd Table 7. d 0900 0902 0905 0907 0909 090C *■ 0913 0916 0918 ir 091 A ll 091 D d 091 F || 0921 3 0924 0929 093 B >0508 - 0E492D CD4890 - 5978 7710 3F020E 7510 -5A0A ► 0C1E89 F410 -1879 1 F0038 >-►7710 3F02CF 7510 1B5A PPSU, II BSTA, UN LODI. R2 LODI. R1 LODA, I-R2 STRA, I-R1 BRNR, R1 PPSL, RS BSTA, UN CPSL. RS BRNR. R2 LODA, R0 TMI, R0 BCTR BCTA, UN PPSL. RS BSTA. UN CPSL. RS BCTR. UN (clear/initiate PVI) (data) (load MLINEI '+' key the tone and volume controls, is fed to the TV games computer. A 'high' file number is entered (8 or 9) in the RCAS mode, and the record is started. After some manipulations with the volume control, two dots will start to flash rapidly under the '=' sign, and the actual file number should also appear on the screen. The trick is now to manipulate the volume control (and, if necessary, the treble control) until the dots flash regularly and the second file number remains constant for the duration of each program on the tape. Once this is achieved, the volume and treble controls are left strictly alone and each program in turn is loaded into the computer (this should work, now) and from there to the tape. From now on, the programs can be retrieved reliably from this tape. Rest assured, we are doing our utmost to make the second ESS record for the TV games computer easier to load . . . ESS 006 . . . the second record with software for the TV games computer, which is what this article was to have been about. However, it's long enough as it is. Some idea of the programs can be obtained from the photo's distributed liberally throughout these pages. One program converts the computer into a fairly comprehensive colour TV test pattern generator; the other can be considered as a programming aid. It contains routines for composing object shapes and background on the screen - so that you can see what you're doing-, the 'relative address calculation' mentioned earlier, and a routine for scanning a character set available in the monitor program as will be explained next month. Full details of how to use these programs will be included with the record, which will be made available next month. In conclusion With the information given in this article, it is possible to write simple programs. Some examples are included on these pages. Now is the time to start practicing — next month we'll discuss the rest of the instruction set, and give some rather more complicated routines . . . After that, you will know as much as we do! 10-38 - elektor October 1979 programmable sequencer There are a variety of different ways in circuit and the 'subsidiary' address which the control voltages can be counter, however, even longer (or) programmed and stored: e.g. via poten- indeed shorter) sequences are also tiometers, switches, sample-and-hold possible. The note length is controlled circuits or digital memories. The by a D/A converter and VCO, the method adopted here is to encode output of which varies the clock fre- the voltage digitally and store it in a quency of the main address counter. RAM. When the contents of the mem- The analogue voltages from output A ory are read out, they are fed to a D/A are fed to the synthesiser VCOs; at converter, which provides an analogue output B a gate pulse is generated to signal suitable for feeding to the syn- accompany each note. The gate pulse, thesiser VCOs. In addition to the pitch whose width can be varied, is used to of the notes (i.e. their frequency), their determine the start and duration of the relative length can also be programmed, envelope control voltage generated by The duration of each note can be the ADSR module of the synthesiser, selected in the ratio of 1 : 2 : 4 : 8. The complete circuit diagram of the The block diagram of the programmable programmable sequencer is shown in programmable sequencer Sequencers are extremely popular add-on units for music synthesisers. They are used to store pre-programmed sequences of control voltages for the synthesiser VCOs/VCFs; the control voltages can be 'played back' into the synthesiser, thereby generating note sequences which can be used for example to provide the backing to a manually played melody. C. Voss sequencer is shown in figure 1. The pitch (i.e. its position on the musical scale and its octave) and length of the note are set up in binary code on switches which are connected to the data inputs of the RAM (see figure 3). The address into which the data is stored is determined by an address counter. In actual fact, two address counters are employed, one of which (the 'subsidiary' counter) is clocked by the other ('main' counter). When the stored melody is to be played back, the address counter steps through each of the memory locations in turn. The data is read out and fed to the digital-analogue converters, which pro- vide the actual control voltages for the VCOs. During normal operation the circuit can store 16 sequences of 16 notes apiece, i.e. a combined sequence of 256 notes; with the aid of the reset figures 2a and 2b. Figure 2a contains: the digital section of the sequencer, comprising the memory, address counter and reset circuit, whilst figure 2b shows, the D/A converters and output stages. Two 2101 's, 256 x 4-bit R AMs, connec- ted in parallel from the memory in which the digitally encoded control, voltages are stored. The higher order: addresses of the input data are set up on switches S2 . . . S5. The flip-flop (IC11) interposed between the switches’ and the RAMs ensure that the new address set up on S2 . . . S5 is only presented to the address inputs of the RAMs after the previous note sequence! has ended. The main address counter is formed by IC10. The counter is clocked, via IC6, by the analogue section of the circuit! shown in figure 2b. This counter generates the 'low order' addresses,! iiiy i.e. it clocks from '0000' to Mill', whereupon the high order address is incremented by one (via S2...S5), before the counter resets and starts to cycle through another sequence of 16 addresses. The reset circuit is formed by N12 and N13. When the data outputs a ... f of the RAM all go high, N12 and N13 ensure that the binary counter is reset to zero. Thus the address containing the data word Mil 111' represents the reset address. Inverters II ... 14 form a NOR gate (the inverters all have open- collector outputs), so that only when the address counter resets (i.e. its out- puts all go low), is IC11 clocked. This ensures that a new (high order) address cannot be presented to the address inputs of the RAMs before the previous note sequence has ended. When S2 . . . S5 are set to position c, the ’subsidiary' address counter (IC12) is connected to the address inputs of the RAMs. This counter is clocked by IC10, via II . . . 15, so that it receives a clock pulse every time IC10 resets (i.e. every 16 addresses). Thus if all the outputs of IC12 are connected to the RAMs, the entire contents of the memory can be read out in sequence. Switch SI determines the operating mode of the sequencer. In position a the switch blocks gate N10, with the result that the address counter is im- mediately inhibited. In position b the sequencer operates normaily, whilst in position c the counter will stop once it reaches '0000'. To actually program a sequence of notes into memory, pushbutton switch S9 is first pressed, resetting the address counter via N12 and enabling the RAMs. The information relating to the pitch and length of the note to be stored is then written into the RAMs by pressing S10. Each of the mono- stable multivibrators MMV1 . . . MMV3 are now triggered in turn. The output pulse from MMV1 clocks the address counter (IC10) via N9. The pulse from MMV2 temporarily puts the RAMs into the write mode, so that the infor- mation present on the data mputs is in fact stored in memory. The Q output of MMV3 takes the output of N8 high, so that N13 is capable of recognising the reset code ('111111') on the data outputs of the RAMs. The next note is written into memory in the same way; the input data is set up on the corresponding switches whereupon S10 is pressed and the data is written into memory. Once the desired sequence of notes is stored, pressing S11 writes the reset code into the memory by taking the inputs of N1 . . . N6 low and hence the data inputs of the RAMs high. When N13 recognises the reset code, the address counter (IC10) is reset, so that via II... 15, flip-flop FF2 is triggered and the RAMs are returned to the read mode. Schmitt trigger N21 ensures that FF2 assumes a definite state upon switch-on and that the RAMs are inhibited for a brief initial period. The digital-analogue converters and output stages of the circuit are shown in figure 2b. IC1 ... IC3 produce the analogue control voltages which deter- mine the frequency of the notes, whilst the D/A converter round IC4 is used to control the length of the notes. Unlike the other two D/A converters (IC1/IC2), the output voltage increases in an exponential, not linear fashion. That is to say, when the digital input (potentiometers PI . . . P6), the circuit Fine tuning is performed by means of signal increments by '01', the output can be set up fairly simply, without the PI. A change in state of input 'a' voltage doubles. need for any special measuring equip- should correspond to a change of The output of IC4 is fed to a sawtooth ment. The circuit is adjusted correctly 1/12 V in the output signal. P5 should generator formed by IC4 and IC5; this when a change in the 'e' input from '0' be adjusted such that the output fre- both clocks the main address counter to 'V causes the voltage at output A to quency doubles when input 'g' goes (IC10 in fig. 2a) and, via the Schmitt increase by 1 V. This voltage can be high. P4 is used to compensate the trigger IC7, provides a variable-width adjusted by means of P3. P2 should be offset voltages of IC4 and IC5. Finally, gate pulse. set such that the output voltage changes P6 determines the width of the gate In spite of the six adjustment points by 0.5 V when inputs 'b' and 'c' go high, pulse. M July/August 1979 - Grcuit 25: linear them basic computer Elektor 49, May '79, p. 5-34. The circuit diagram (figure 3) contains of IC6 should be as D-C-B-A along the top s pin numbers 5, 4. 3 and 1 ively; along the bottom N1 . . . N4 are ANDs, not N ANDs; the output of N1 is point 27c. that of N2 is 31a and that of N3 contains Circuit 27: moisture sensor 1 pinning The sensor should be connected follows: j n parallel with R1. not in series nould be with R2 . ! respect- Circuit 30: automatic heated rear the pins windscreen 3. Gates To avoid co n f us j on; p j n 3 Q f |C6 NANDs; is the c i ock it is i ndeed JJ ’ operation, are types designed Long range photoelectric * appi switch 100% tested at The E3N-30 Photoelectric Switch for 100°C par from IMO Precision Controls has transistors, types an operating range of 30 metres. 2N6689-93, featL The E3N-30 incorporates the capability, with 1 latest innovations in design and voltage ratings of circuitry including the unique switching speeds, BI-COLOUR indicator to speed voltages and high setting up time and indicate the area ratings - 2N6674-78 and ire high voltage This can be achieved quite easily by removing the wire link con necting these pins to pin 24; : measuring only (including inductive turn-off tii 32a and 32c can then be ac Finally, it was perhaps no sufficiently clear that tl» Circuit 80: programmable digital function generator IC1 and IC2 should be type 2101, not 2102. Circuit 90: uP-programmable speed controller for model rail- elekdoorbell Elektor 50, June '79, p. 6-1 2. The numbering of the switches as used . ' ' bottom, the pin numbers should V , read: 7 6 ' 5. 4. 9. 10. 11 T t ere ore («Q7). | n figure 3, the supply voltage should be 5 V. Grcuit 100: 256-note sequencer In figure la, pins 4 of IC1 . . . IC3 i. 6-1 2. The should, of course, be connected :hes as used to -15 V. In figure 1c. a In rrespond to capacitor is shown between pin 3 and on the of N38 and supply common. This 90.5 m pin 14 can be left as it is), but ‘or some other semi-equivalents 'notably the Motorola 14034BCP) ■twill prove essential, aquarium thermostat Sektor 50, June 79, p. 6-29. In sw circuit diagram, D8 is shown =roected between pins 1 1 and *2 of IC3. This diode should in ■act be connected between pin 1 1 ^ 1 C3 and the +1 2 V line; pin 1 2 O' IC3 is connected only to D7. Pin 12 of N1 6 is shown connected via a diode to pin 7 of IC3b; it should, however, connect to pin 6. Furthermore, R28 is shown con- nected to the right-hand side of the Xtal, whereas it should be connected to the top of Cl. The author has suggested two im- provements to his circuit: the resistor values for R38 . . . R45 can be decreased by a factor of 10 (e.g. 47 k instead of 470 k), 2N6674-78 are JEDEC TO-20 metic packages supplied in the jedec MA (TO-61) package teel hermetic shell, a solid header/stud for low ther- RCA Solid State - Europe, Sunbury-on- Thames, Middlesex. TW16 7HW. Switching transistors designed for harsh environments 10-42 -ele October 1979 Miniature LCD panel clocks all usual timekeeping functions in both UK and US formats for time, day, date. The unit is quartz controlled fine adjustment), and includes an incandescent backlight feature. to drive a bleeper or some other external means of indication. With a running consumption of only 6pA, the PCIM161A is suited to a variety of applications - ranging from all types of to instrumentation, telephones. communications equipment etc. Ambit International. 2 Gresham Road, Brentwood, Essex, Telephone: 102771227050. 11280 M) New product range catalogue from Marshall's Marshall ‘s announce the publishing of their new 1979/1980 product range catalogue on October 12th 1979. This edition contains many new including an increased range of IC's, micro-power LCD clock modules, data and educational Marshall's retail branches. Mini- mum monthly repayment is £ 5.00 and goods 20 times this amount may be purchased. Further details from Marshall's branches after" October 1 2th 1979. Marshall's have reduced prices on their top line products, resulting in very competitive prices. Twin reply paid order forms are supplied in each catalogue to The catalogue costs 50 p from any Marshall's branch or 65 p post paid from their head office. Marshall's I Head Office), Kingsgate House, Kingsgate Place, London NW6 4TA. Tel.: 01-6240805. (1294 M) Four-colour plotter An easy-to-use 11 by 17 in. (A3 size) microprocessor-controlled plotter that produces low-cost, high-quality multicolour graphic plots with data sent from virtually any computer or controller has been introduced by Hewlett- Packard. Interface is via RS- 232/V24 asynchronous serial ASCII at any of eight switch 2400. Special design features also enable the plotter to be coupled into an existing com- puter terminal RS-232/V24 inter- face. The new 7220A four-colour plotter generates character sets, dashed lines, and implements scaling and other high-level func- tions internally. Plotting colours are selected and changed under program control to produce high resolution graphic plots and over- head transparencies. There are seven colours available for clear film plotting. Character plotting speed of over two characters per second allows fully annotated graphs to be produced in minutes. A buffer with over 1100 bytes has been incorporated to store incoming graphic plot data so that 1/0 cations between computer and plotter are minimised. As an option, an additional 2048 bytes of buffer storage can be made The plotter's built-in language contains two categories of in- structions: device control and graphic instructions. The graphic 45 two-letter mnemonic instruc- tions from the Hewlett-Packard Graphics Language (HP-GL) which equips the plotter with such capabilities as relative and absol- ute plotting, point digitising, labeling, character sizing, integer scaling and window plotting. No specialised programming experi- ence is needed to use the new For applications requiring unat- of the new plotter features automatic page advance, an inter- nal paper supply and paper cutter, and a detached paper tray to collect full- or half-page plots. Hewlett-Packard Ltd, King Street Lane, Winnersh, Wokingham, Berkshire RGI1 5AR (1286 M) Single-knob measuring bridge from Siemens Siemens Ltd is marketing a single- operated by one hand - a feature that greatly facilitates simul- taneous note-taking. The bridge is available in two types: model M273-A1 comprising a Kelvin double bridge for measuring low resistance values (200 p-ohms to 2200 milli-ohms) and model M273-A2 with a Wheatstone bridge for medium resistance values. The low resistance model has built-in measuring lead com- The bridge is balanced by an easy-to-read galvanometer read against a deviation scale. Both types are accurate to +/— 1% of the measured value (+/— 1.5% of the lowest range of model M273-A1 ) and can withstand a 2 kV voltage surge. The power source is two standard IEC R14 1.5 V cells. Alternatively, 2 or can be used which, generally, increase the reading accuracy. Both models are in a rugged moulded plastic housing. A leather case is available (extra) for heavy-duty use. Typical dimen- sions are 112 mrn (4.4in) wide X 84 mm (3.3in) deep x 192 mm (7.5in) long. The weight is 1 .1 kg (2.41b). Siemens Limited, Siemens House, Windmill Road, SUN BUR Y-on- THAMES. Middlesex. TW16 7HS. Tel: 109327185691. High quality transient signal processors Bryans Southern Instruments just announced the introduction of a new range of high-sampling- frequency, high-resolution tran- sient signal processors. Priced to suit modest laboratory budgets. Series 523A. They offer a 10-bit resolution (i.e. 1 part in 1024), at the high sampling rate of 10 MHz, so that the shortest sampling interval is 100 nanoseconds. When switched to dual timebase mode, the first part of the re- cording is recorded at timebase rate A, and the second part at rate B. The point at which the change is made, is set-up by the tiples of sweep time, with a resol- ution of 0,05 from 0 to 0.95 of ' the sweep time. These dual timebase facilities can be used even when pretriggering is in operation -a unique feature for this type of instrument. There- | fore, one can reference a short event of just a few microseconds during a trigger condition, many seconds in advance of a fast signal and still record the pre-trigger ■ information. At the same time, the 523A maintains an exception- i nally high resolution of the time and amplitude of the signal. These transient signal processors are available in single- or dual- channel versions, each with 4096- word memories. They can be interfaced to many peripherals and computers by RS232C, IEEE488/1975 (G.P.I.B.), or the general purpose interface board. If required, up to seven instru- digital output purposes. Bryans Southern Instruments Ltd., Willow Lane, Mitcham. Surrey, CR4 4UL. Tel.: 016403490 mlnp New, miniature, low-cost temperature recording spots The temperature responsive tri- angle turns irreversible black from original white after having been exposed to its rated temperature for fractions of a second. Such single temperature spots, or mul- tiple temperature sequenced strips and inductive loads. The amplifier front-end incor- porates a *iA 741 operational amplifier with additional voltage and current gain stages so enabling required for servo systems. The output is protected from voltage transients caused by inductive surges. Output current limiting is selected by placing appropriate resistors between the supply pins and the respective current limit pins. The case is electrically Absolute maximum ratings in- clude an internal DC power dissi- pation of 70 W with a case tem- perature of 25°C, input voltage differential 30 V end DC output current of 10 A. Camera & Instrument (UK I Ltd.. 230 High Street, Potters Bar, Herts EN6 5BU. Telephone: 10707) 51111 (1231 M) Switching regulator power supplies Now available from Amplicon Electronics Limited are four ad- ditional models to their existing range of switching power supplies. These new models, designated RT153, RT154, RT303 and RT304. are designed to meet increasing micro processor appli- They employ isolated auxilliary outputs of 5 V and 12 V or 5 V and 15 V in addition to the main 5 V output. RT153- 5 V @ 30 amps 12 V @ 5 amps 5 V @ 2 amps RT154 — 5 V @ 30 amps 1 5 V @ 4 amps 5 V @ 2 amps RT303 - 5 V @60 amps 12 V@ 5 amps cutting down the amount movement necessary on boar person to person exchanges. , The system is designed for con- > tinuous operation and can be left , on in the standby position for monitoring from lookout posi- tions in bad visibility. The Sea Com control, or master unit consists of a heavy duty watertight aluminium case coated in Rilsen nylon and the system is fitted with high output loud- speakers, hand microphone, vol- ume control, speaker selector switch and tone alert button. ing 32.5cm wide x 18cm high x 46.5 cm deep, and weighs 10 kg, and the carrying handle also functions as a fully adjustable The instrument has two input channels, Y1 and Y2, which provide maximum sensitivities of 2 mV/cm over the full 60 MHz bandwidth, and a special control circuit is incorporated to nullify The wide range of operating modes available on the OS 3500 includes comprehensive delayed timebase and triggering facilities. Vernier control of sweep delay timeallows accurate timing measurements to be made, and the delayed timebase base sweep or triggered after a preset sweep delay. The main and completely separate. For the study of complex wave- forms, an alternate timebase which allows the main timebase can display and be triggered from input channels remain free to study other important infor- Another feature which simplifies the triggering of complex wave- forms is variable trigger hold-off. which can be continuously ad- justed up to approximately one sweep length of the main timebase Gould Instruments Division. Roebuck Roed, Heineult. Essex 1G63UE. Telephone: 01-500 1000 (1221 M) market liiiL'iiJol pAirij a separate floating input, as well as increased voltage and time accuracies when switched to oper- ate with the oscilloscope. ‘bright-up’ section of the oscillo- scope’s main timebase sweep is introduced and controlled from the DM3010. The period between the first and second bright-up sec- tions is accurately displayed on the instrument's light-emitting- diode display. For amplitude sweep of the channel 2 signal is introduced, and the bottom of with the top of the basic display to provide an accurate digital Operated as an independent digital voltmeter with the separate floating input, the DM3010 measures voltages from 200 mV to 1000 V DC, with a resolution of 100 mV and an accuracy of t 0.1 5% of reading : one digit. measured. The combined accu- racy of the DM3010 and OS3500 is : 1% of reading j two digits for time and i 2% of reading * two digits for amplitude measure- ments up to 5 MHz. Above 5 MHz, the accuracy is conditioned by the vertical amplifier roll-off to -3 dB at 60 MHz. The additional accuracy offered by the DM3010 is of particular use in applications such as the measurement of digital-circuit time relationships, including memory timing and propagation Gould Instruments Division. Roebuck Road. Heineult, Essex 1G63UE. Telephone: 01-500 1000 ^222 I Model 771 ASCII Keyboard is 1 especially suited for use with the latest inexpensive video terminal I The combination of the 771 key- j board subsystem, and a video | terminal board mounted in the | user’s mainframe, provides an j attractive and versatile cost-saving alternative to conventional one- 1 piece CRT terminals. Compact. . reliable, and rugged, the 771 Key- board is ideal for use in small software development applications or educational microprocessor I Standard features include full | ASCII alphanumeric section; con- | venient cursor control and nu- 1 meric pad; two-key rollover for low error rate; Upper & lower case plus control codes; TTY mode for I upper-case only operation; Timed autorepeat on all keys; all modes standard parallel interface; detach- non-glare keycaps; robust steel desktop enclosure. The 771 Keyboard is supplied fully assembled and tested, with complete documentation, requir- ing only power and data connec- I tions to the user's system for I operation. Supplied mounted in I an all-steel desktop enclosure, I finished in textured IBM blueanjl black, this Keyboard is a perfect' complement to modern micro- 1 processor hardware. The KB771 is priced at a modest i £ 95.00, with discounts for quan- 1 tity. Electronic Brokers Limited, 49/53 Pancras Road. London NWI 2QB. Telephone No: 01-837-7781. (1216 M) UK 21 - elektor October 1979 advertisement Science of Cambridge Ltd Now, the complete MK 14 micro-computer system from Science of Cambridge