K S, 7^-4

U.K. 50 p

U.S.A./CAN. $ 1.50

1/4 GHz counter
mini frequency counter
easy music

Austria S. 33 Denm-rV Kr. 9 Germany DM.3 80

Belgium F.55 France F. 7 Netherlands DFL. 3.25

Norway Kr. 9

Sweden Kr. 9 incl. moms

Switzerland F.4.40

UK 4 - elektor june 1978

decoder

contents

elektor june 1978 - UK 5

Despite being relatively
inexpensive and simple to
build, the performance of
the % GHz counter puts
it safely in the
'professional' category.
Its. features include: five
measurement ranges,
from 15 Hz to 250 MHz;
a preset facility for use as
a digital tuning indicator;
up and down count
modes; automatic range
indication and flicker-
free last digit. p. 6-01

The time has come for
software support for
/iP users in the form of
ready-to-run programmes.
Most readers possess a
record player, so disc was
chosen as the recording
medium. It is hoped that
the Elektor Software
Service will prove a
welcome addition to
the existing range of
reader services.

p. 6-20

The versatile traffic light
controller should prove a
welcome addition to
model town, road or
railway layouts, and
could also be used as an
aid to road safety
demonstrations in
schools. The design has
provision for both British
and European traffic
light sequences, and can
also be adapted to
control a 'Pelican'

Cr ° SSing - p. 6-36

Only 50 years ago, this
type of cash register was
an example of up-to-date
technology and High
Frequencies started at
10 kilocycles. Now, a
250 Megahertz frequency
counter is a home
construction project. . . .
Just think about that for
a minute.

% GHz counter

constant amplitude squarewave

to sawtooth converter

servo polarity changer

Many model enthusiasts will be familiar with situations in
which they discovered that moving a servo control in one
direction prompted the model to steer in the opposite
direction! The circuit described is intended to offer a simple
solution to just this problem.

monopoly dice — W. Palmer, H.A. Westra . . .

elektor software service

coming soon

mini counter

Elsewhere in this issue a highly sophisticated 250 MHz
counter is described. The heart of that instrument is an LSI
counter 1C from Mostek, the MK 50398N. By using the same
I C it is possible to build a more modest counter which should
prove more than adequate for most home constructors.

digital clock using the SC/MP — M. Reimer . .

One of a number of programmes which will shortly appear on
disc, under the ESS label (see elsewhere in this issue).

programmable call generator

The automatic call-sign generator, which was published in
Elektor 10. February 1976, relieved radio amateurs of the
chore of having to periodically repeat their call-sign during
a QSO. The circuit described, which is an extension to the
above call generator, allows the operator to automatically
transmit a number of pre-programmed morse-encoded
messages.

TV sound modulator

reaction timer — H. Huschitt

Another programme which will shortly be made available on
the same disc as the clock programme is for a reaction timer.

automatic mono stereo switch

Since the end of February, owners of stereo FM receivers
will have noticed that the stereo indicator lamp stays on
continuously. This is due to a decision by the BBC to trans-
mit the 19 kHz pilot tone with all programmes.

As the mono-stereo switch in a stereo receiver operates by
detecting the pilot tone, this means that such receivers are
now incapable of distinguishing between mono and stereo
transmissions. The circuit described distinguishes between
mono and stereo transmissions by detecting whether or not
stereo information is present in the received signal, indepen-
dent of the pilot tone.

traffic light controller

easy music — P.J. Tyrell

link 77

market

advertiser's index

6-01

6-14

6-16

6-18

6-20

6-20

6-21

6-26

6-29

6-32

6-36
6-40
UK 15
UK 16
UK 26

The choice

isyours

When it comes to deciding on a general purpose oscilloscope
for the laboratory or the service department,
you have a choice between single or dual trace models
and medium or high bandwidth.

Telequipment’s D61a is an excellent instrument for the service bench,
particularly for TV work when dual trace 1 0MHz bandwidth
and special triggering features are needed.

For less demanding applications,
the single trace 5MHz S61 will make most of
your routine measurements.

You will get the same Telequipment reliability and
Telequipment value - whatever your choice.

TelequipmenT

Tektronix UK Ltd, P.O. Box 69, Coldharbour Lane, Harpenden, Herts.
Tel: 05827 63141 Telex: 25559

1/4 GHz counter

elektor june 1978 — 6-01

It is often difficult, if not downright
impossible, for the hobbyist to con-
struct test equipment which can lay
claim to offering truly professional
performance. The 1/4 GHz counter
described in this article however, not
only more than meets that requirement,
but is also extremely easy to build.
Once the components have been
mounted on the four printed circuit
boards, and once they have been inter- .
wired, all that remains to be done is to
connect up the mains transformer.
Calibration is limited to three non-
critical points in the circuit. Switching
between measurement ranges is ac-
complished by means of DC control
voltages. The main component in the
circuit, the LSI (Large Scale Integration)
counter, is controlled by means of a
system of buses which also carry the
control signals for the timebase circuit,
the input divider, and for decimal point
and range indication.

Block diagram

The block diagram of the complete
counter is shown in figure 1. As can be
seen, the circuit has two inputs, one for
low frequency signals and another for
high frequency signals. The low fre-
quency range covers 20 Hz to 10 MHz
and has an input impedance of ap-
proximately 1 M£2. The high frequency
input measures between 8 MHz and
250 MHz and has an impedance of 50 J2.
An ECL (Emitter-Coupled Logic)
prescaler and a TTL counter are used to
divide down the high frequency input
signals by a factor of 100.

After being amplified and boosted to
TTL level, the input signal is fed via the
divider select bus to a decade counter,
which, for certain measurement ranges,
can be bypassed by means of a system
of gates, so that the signal frequency is
unaltered.

The timing cycle for the timebase is
determined by the range/display de-
coder. The timebase supplies gate
control pulses, which determine how
long the counter gate is open, and the
control signals for the store and load
inputs of the LSI counter. The store
input latches the count data into the

Despite being relatively inexpen-
sive and simple to build, the
performance of the frequency
meter described in this article puts
it safely in the 'professional'
category. Its features include:
five measurement ranges, from
15 Hz to 250 MHz; a preset
facility for use as a digital tuning
indicator; up and down count
modes; automatic range indication
and flicker-free last digit.

display, whilst the load input enables
the counter to be preset to a particular
value, so that it can be used as a digital
tuning indicator for FM receivers. The
input signal is fed from the output of
the decade divider to a sync gate, which
synchronises the input and timebase
signals. This ensures that the gate pulse
always maintains the same phase re-
lationship with the input signal. For a
fixed input frequency successive counts
will therefore be identical, thus elimin-
ating flicker on the last digit of the
display.

At the same time, the range/display
decoder provides the necessary control
signals for correct indication of measure-
ment range and decimal point. The LSI
counter contains an internal scan oscil-
lator which controls the multiplexing
for the displays. The frequency of the
scan oscillator is determined by an
external capacitor between Vss or
Vdd at| d scan input. Another bus
system connects the counter to a
number of dual-in-Line switches, by
means of which the counter can be
preset to the desired frequency using
BCD code. The counter is switched
between the ‘preset’ and ‘count’ modes
by means of S2, whilst S3 switches
between the ‘up’ and ‘down’ count
modes.

The MK 50398N

Figure 2 shows the internal block
diagram of the component which forms
the heart of the 1/4 GHz counter,
namely the MK 50398N, a six decade
counter/display driver; the diagram also
shows the system of bus lines used to
drive the seven-segment displays and the
BCD switches for preloading the coun-
ter.

When the load counter input is high,
each of the digits corresponding to the
BCD counter inputs is loaded in turn,
starting with the most significant digit.
This process is illustrated in the timing
diagram shown in figure 2b.

The clear input is asynchronous and will
reset all counter decades to zero when
taken high. However this input does not
affect the six digit latch or the scan
counter. As long as the store input is

' 1/4 GHj

elektor june 1978 — 6-03

low, data is continuously transferred
from the counter to the displays. Data
in the counter will be latched and
displayed when the store input is taken
high.

Range selection

The degree of prescaling and the pos-
ition of the decimal point for the
differing gate times and measurement
ranges is shown in figure 3.

Figure 3 a shows the situation for the
lowest frequency range (Hz), which has
a gate time of 1 0 seconds and a resol-
ution of 1/10 Hz. In this case the LF
amplifier is connected direct to the sync
gate.

With the arrangement shown in figure
3b, the counter will measure up to
1 MHz; the gate time here is 1 second.
Figure 3c illustrates the highest of the
low frequency ranges, namely up to
10 MHz. Since the MK 50389N cannot
count frequencies higher than about
1 MHz, a decade divider is connected
between the preamp and sync gate. This
divider is either bypassed or switched
into circuit by the arrangement of gates
shown in figure 4.

Figure 3d, -e, and -f depict measurements
made in the HF-range. Once again the
decade divider is either bypassed (figure
3d and 3f) or connected in circuit
(figure 3e) by means of the associated
gating.

The situation in figure 3f shows the
counter used as a digital tuning indi-
cator for FM receivers. With a view to
using the counter for this particular
application, the counter was designed so
that in this configuration the gate time
is only 0.1 s, with the result that the
display closely tracks the tuned fre-
quency. In addition, the least significant
digit is blanked, since small variations in
the oscillator frequency of the receiver
would cause this digit to be continu-
ously flickering between different num-
bers.

Timebase and control signals

The simplified circuit diagram in figure
5 shows how the control signals for the
counter are generated from the timebase.
A signal, the frequency of which is 1000
times lower than that of the timebase
(1 kHz), is presented to the input of
IC 1 3 . This IC simultaneously clocks the
three decade dividers 1C 14 . . . IC 1 6.
The gate times are determined by means
of switch Sx, which in reality consists
of a number of gates, these being
clocked in turn by control pulses from
the timing bus. The positive transitions
of the signal is selected by SX trigger
flip-flop FF1 , so that the Q output goes
low. At the same time, the Q output of
FF2 is also taken low, with the result
that gates A, B and C are inhibited. As
long as the Q output of FF1 is held low,
the sync gate, IC19, remains open, and
the clock pulses from the input signal
are fed to the count input of the LSI
counter. As was already mentioned, the

2a

BBBBBB

Figure 3. This diagram illustrates the different
degrees of prescaling used for each of the
measurement ranges. Figures 3a ... 3c show
the low frequency ranges, whilst 3d and 3e
show two high frequency ranges. Figure 3f
illustrates the HF range intended for digital
tuning indication for VHF-FM receivers. In
this mode, the right-hand digit is blanked.

Figure 4. The gating circuit which decodes the
position of the range select switch and routes
the input signal either through or past the
extra decade divider.

Figure 5. This simplified diagram shows how
the control pulses for the counter are derived
from the timebase signal.

clock pulses are synchronised to the
timebase, so that, for a given input
frequency, the counter will always
count the same number of whole pulses.
The sync gate is formed by a special
TTL IC, the pulse synchroniser 74120.
The sync gate will continue to feed
clock pulses to the count input of the
50398N until a second positive going
edge of the gate signal clocks FF1 ; this
causes the Q output of FF1 to once
more swing high, thus inhibiting the
sync gate, and, via gate N38, it also
enables the clock input of FF2, so that,
on the next positive going edge of
output 2 of IC13, the Q output of FF2
will go high. This removes the inhibition
on gates A, B and C, and hence on
outputs 4, 6 and 8 of IC 13. The reset
pulse at the output of gate C resets
IC14 . . . IC16. A new gate period
commences after approx. 1 ms.

Control- and counter circuits

Figure 6a shows the detailed circuit
diagram of the control- and counter
circuits of the 1/4 GHz counter.
Inverters N13 . . . N15, together with
their associated components, form the
crystal oscillator, the frequency of

which can be slightly varied by means of
trimmer capacitor C2. By means of the
three decade counters IC10 . . . IC12,
the oscillator frequency is divided down
from 1 MHz to 1 kHz. As has already
been explained, the control signals are
derived from the timebase with the aid
of IC 1 3 and the circuit shown in figure
5.

Together with transistors T15 and T16,
gates N32 . . . N35 and N39 perform the
functions of gates A, B and C in figure 4.
Gate periods of 0.1 s, 1 s, and 10 s are
available at output 1 of IC14, IC1S and
IC 1 6 respectively. In the final version of
the circuit switch Sx in figure 5 is
replaced by gates N19, N21 . . . N23,
N36 and N37. As explained above,
flip-flop FF1 is triggered at the end of
the gate period selected by switch SI.
Depending upon the position of the
range switch, gates N25 . . . N27 and
N31 switch the decade divider IC 1 8
either into or out of circuit. Gates N20,
N24, N28 . . . N30 are used to switch
between the low- and high frequency
inputs. The use of electronic switching
ensures that inductive crosstalk between
the inputs is effectively eliminated.

The decimal points in the displays are
driven via buffers N1 . . . N6, whilst

1/4 GHz

elektor june 1978 — 6-07

6b

BD242

Figure 6a. Detailed diagram of the main
circuits of the 1/4 GHz counter, which are
mounted on the boards shown in figures 7
and 8.

Figure 6b. The power supply.

N7 . . . N12 buffer the LED displays
for range indication (MHz, kHz, Hz). As
is apparent from the diagram, switching
between ranges is effected via the six-
line bus which is controlled by the range
switch, S 1 . When one of the six lines is
taken low, this state is decoded by the
above-described logic gating, so that the
correct gate time, input amplifier and
decimal point are chosen.

The counter can be preset to any
desired value by means of the dual-in-
line switches S4 . . . S6. At the beginning
if each count cycle the counter will then
increment starting from that figure. By
setting S2 to the ‘preset’ position the
preset frequency can be shown on the
displays. When S2 is set to ‘count’, the
counter begins a new count cycle, thus
S2 can also be used as a reset switch. If
desired, the DIL switches and diodes
D1 . . . D24 can be omitted, in which
case the counter is reset to zero after
every ‘load’ pulse.

Via transistors T1 . . . T6, the com-
moned anodes of displays DPI . . DP6
are connected in turn to the supply
voltage. The segments are driven by
transistors T7 . . . T13. Inverters N17,
N18 and transistor T14 ensure that the
least significant digit is blanked when
the counter is operated as a digital
tuning indicator.

The ‘carry’ output of the 50398N is
available externally for possible exten-
sion of the circuit to include automatic
ranging.

Wherever possible, CMOS devices were
used for the gate- and divider ICs. Where
the frequencies involved were too high
for CMOS, TTL was used.

The power supply (figure 6b) provides
two supply voltages. IC21 stabilises the
rectified transformer voltage to 12 V,
whilst IC20 together with the series
transistor T26 provide a regulated 5 V
supply.

Printed circuit boards for counter,
displays and control circuits

The entire circuit shown in figure 6 is
mounted on two printed circuit boards.
The board for the left hand portion of
the circuit, which includes the timebase
and associated control circuitry, is
shown in figure 7, whilst that of the
right-hand section of the circuit, com-
prising the counter proper and the
displays, is given in figure 8. To ensure
good solder connections all the boards
for the counter are tinned.

The HF amplifier

Figure 9 shows the circuit diagram of
the preamp for the high frequency input
(8 ... 250 MHz). The two-stage transis-
tor amplifier consisting of T27 and T28
provides a gain of around 60. After
being amplified, the high frequency
input signal is fed to the decade divider,
IC24. This is an ECL (emitter-coupled
logic) device, which can operate at the
very high frequencies involved. The
trigger level of the divider is set by
means of P2. It is essential that a cermet
(preferably multi-turn) preset be used
for P2, to permit the threshold level of
the divider to be set accurately. Transis-
tor T29 boosts the signal to TTL level,
whereupon it is fed to a second decade
divider, IC25, a ‘normal’ TTL IC. The
frequency of the output signal of the
HF amplifier is thus 100 times lower
than that of the input signal. The
printed circuit board of the HF ampli-
fier is shown in figure 10, the preamp
and both decade dividers being mounted
on the same board.

The LF amplifier

The circuit of the low frequency input
preamp is given in figure 1 1 . The input
signal is fed via a super source follower,
consisting of T17 . . ,T19, to the
cascode amplifier, T20 . . .T23. An
integrated transistor array, the CA 3086,
is used to form this amplifier, since the
integrated transistors have an extremely
small feedback capacitance. In this way
it is relatively easy to obtain a reliable
10 MHz broadband amplifier. The low
impedance output of the cascode
amplifier drives two series-connected
Schmitt triggers (N46, N47), which
buffer the amplified input signal to TTL
level.

Figure 12 shows the printed circuit
board for the low frequency amplifier.
An MKM or MKH type capacitor should
be used for C26.

1/4 GHz

elektor june 1978 — 6-09

ICG = 7402
IC7 = 7400
IC8 = 401 1
IC9 = 4001

IC10... 1016 = 4017
IC17 = 4013
IC18 = 7490
IC19 = 74120
IC20 = 723
1C 21 =7812

IC22 = MK 50398N (Mostek)
IC23 = 4049
IC24 = 95H90
IC25= 74196

IC26 = T20 . . . T24 = CA 3086
(DIP)

IC27 = 7413

Miscellaneous:

LI . . . L4 = chokes 10 pH
Xtal * 1 MHz series-resonant

Dp7. . . DP6 = HP 5082-7750
(common anode)

SI = 1 way 6 position switch
S2.S3 = SPDT switch
S4,S6 = 8 way SPST Dl L switch,
if preset facility is required.
Transformer 15 V/1 A

Figure 7 and 8. Track pattern and component
layout of the printed circuit boards for the
circuit given in figure 6 (in view of the limited
space, these boards are shown to .88 scale).
Figure 7 shows the board for the timebase
and control circuitry (EPS 9887-1), whilst
figure 8 contains the counter and the displays,
(EPS 9887-2).

<? 5 OP O 0

Figure 8. Printed circuit boerd and
ponent layout (to .88 scale) for the o
and display circuitry (EPS 9887-2).

Figure 9. Circuit diagram of the high fre-
quency input amplifier, which is followed by
two decade dividers, IC24 and IC25.

high frequency input stage (EPS 9887-4). The
ECL decade divider, IC24, should be soldered
direct to the board; using an 1C socket would
result in undesirable parasitic capacitances
being produced.

6-12 — elektor june 1978

1/4 GHz

ns

Construction of the complete
counter

When mounting the components on the
four boards, it is best to begin with the
wire links, and then solder the resistors,
capacitors and diodes into position,
leaving until last the ICs. All the ICs
which are to be mounted on the counter
board (figure 7) should be soldered
direct, i.e., no sockets should be used.

Figure 11. The circuit diagram of the low
frequency input amplifier.

Figure 12. Printed circuit board for the circuit
of figure 11 (EPS 9887-3).

Figure 13. A suggested layout for the front
panel of the 1/4 GHz counter (to .88 scale).

This allows the front panel to be
mounted within a reasonable distance of
the displays. With the exception of the
ECL divider, IC24, on the HF amplifier
board, the rest of the ICs on the three
other boards can be mounted using
sockets. In order to avoid parasitic
capacitances, IC24 must be soldered
direct to the board.

Once the components have been
mounted on all four boards, they should
then be interwired. For preference, it is
recommended that 1 mm tinned con-
necting wire be used. Space has been
left between the boards for the high-
and low frequency inputs for a panel of
screening material, such as, e.g., a piece
of copper laminate board.

After connecting up switches SI ... S3
and the BNC-sockets all that remains to
be done is to connect the circuit to the
transformer voltage (15 V, 1 A) and the
counter is then ready for use.

Calibration

The calibration procedure for the
1/4 GHz counter is extremely simple. If
one can get hold of another accurate
frequency counter, then the frequency
of the crystal oscillator can be set to
exactly 1 MHz by means of the trimmer,
C2. This frequency can be measured at
the clock input (pin 14) of IC10. If a
second frequency meter is unavailable,
then the trimmer should simply be set
to its mid-position, halfway between the
end stops. Alternatively the 200 kHz
Droitwich transmissions can be used to
calibrate the counter if a suitable
receiver is available.

The HF amplifier can be tuned with the

aid of a normal FM receiver. The input
of the HF amplifier is connected via a
length of 50£2 coaxial cable to a simple
coil, consisting of one or two turns of
insulated connecting wire and with a
diameter of 10 mm. This coil is then
placed near the oscillator coil of the FM
receiver. It should then be possible to
measure the oscillator frequency of the
receiver (depending upon the tuning of
the receiver, this should be somewhere
between 70 and 1 20 MHz). By means of
P2, the HF amplifier can be tuned for
maximum sensitivity by gradually mov-
ing the pickup coil away from the
oscillator coil in the receiver, and
adjusting P2 for a stable display on the
counter. Only when the display is
completely stable will the sync gate
(IC19) on the main board be receiving a
jitter-free signal.

The LF amplifier is even simpler to tune.
In most cases it will be sufficient simply
to set PI to the midposition. If desired,
the LF amplifier can be tuned for
maximum sensitivity by using a 10 kHz
test signal with an amplitude of 50 mV.

Using the 1/4 GHz counter

Since the 1/4 GHz counter is equipped
with a preset facility and may count
either up or down, it is considerably
more versatile than a simple frequency
meter. One possible application is null
method tuning. If, for example, one
wishes to tune an oscillator to a fre-
quency of exactly 145.163 MHz, then
it is not easy to tell at a glance just how
far the oscillator frequency is from the
desired figure. In such a case it is simpler
to preset the counter to 145.163 MHz
and then let it count down. The oscil-
lator in question is then adjusted until
the counter displays 0 Hz. When using
this method of tuning, the null point
can be approached from both sides.

The 1/4 GHz counter can also be used
as a digital tuning indicator for FM and
AM receivers. As is well known, the
intermediate frequency in an FM
receiver is 10.7 MHz. The oscillator
frequency in the tuner is thus 10.7 MHz
greater or smaller than the carrier
frequency. If one were to measure the
oscillator frequency directly, the dis-
played result would obviously deviate
from the carrier frequency by that
figure. To obtain an accurate reading of
the carrier frequency the counter should
be preset to compensate for the i.f. ; i.e.
a preset of 989.300 MHz in the case
where the i.f. is greater than the carrier
frequency, and a preset of 010.700 MHz
where the oscillator frequency is lower
than the carrier frequency.

It is clear from the above mentioned
possibilities that the 1/4 GHz counter
should prove a highly useful tool for
both hi-fi enthusiasts and radio ama-
teurs. Not only that, but the counter
offers the hobbyist a standard of
performance which compares favour-
ably with commercially available fre-
quency meters which are considerably
more expensive. H

6-14 - elektor june 1978

constant amplitude square

' sawtooth converter

constant amplitude
squarewave
to sawtooth
cmwartar

Most electronic organs use octave
dividers, which produce a symmetrical
squarewave output. The harmonic con-
tent of this waveform is then altered by
filtering to give the required organ
voices. However, a symmetrical square-
wave contains only the odd harmonics
of the fundamental frequency, and
those voices requiring even harmonics
cannot be realistically imitated, since no
amount of filtering can add harmonics
which are absent. For this reason a
sawtooth waveform, which contains
both odd and even harmonics, is pre-
ferred as the ‘raw material’ for many
organ voices.

A sawtooth waveform can be obtained
from a squarewave as illustrated in
figure 1. A capacitor is allowed to
charge, either from a voltage source in
series with a resistor or from a constant
current source. The positive-going edge
of the squarewave is used momentarily
to close a (electronic) switch, which
rapidly discharges the capacitor. This
charging and instantaneous discharging
of the capacitor produces the familiar
sawtooth waveform.

Figure 2 illustrates the differences in
the spectra of the square and sawtooth
waveforms. If the capacitor is charged
from a voltage source then a sawtooth
with an exponential curvature results,
the spectrum of which is shown in
figure lb. If a constant current source
is used then the sawtooth is linear, and
has the spectrum shown in figure lc.

For musical purposes an exponential
sawtooth is preferred.

The disadvantage of this simple method
is that the amplitude of the sawtooth
waveform falls as the frequency on the
input squarewave is increased, since the
capacitor has less time to charge. This
means that a different capacitor or
charging resistor value would have to be
used for each note of the organ to
maintain equal amplitude over the
entire compass of the instrument.

This problem can be overcome by
arranging that the voltage of the source
from which the capacitor is charged
automatically increases as the frequency
increases. This increases the charging
current, which causes the capacitor to
charge more rapidly and thus maintains
a constant amplitude. A practical,

Most electronic organs use
squarewaves as the basic signal
from which all the organ voices
are obtained by filtering, simply
because squarewaves are easy to
generate and process. However,
from a musical point of view, the
sawtooth is a much more useful
waveform, since it contains both
odd and even harmonics of the
fundamental frequency, whereas
the squarewave contains only the
odd harmonics. The main
problems involved in generating
sawtooth waveforms for organ
circuits have been those of cost
and reproducibility. However, the
circuit described here, for which a
patent is pending, suffers from
none of these drawbacks and
could, in principle, be integrated
into a microcircuit.

constant amplitude, squarewave-to-
sawtooth converter is shown in figure 3.
Capacitor C3 is charged via R4 from
the voltage U 2 , present on C4. The
leading (positive-going) edge of the
input squarewave is differentiated by C2
and R2, producing a short pulse which
briefly turns on T1 to discharge C3.

The trailing edge of the squarewave is
differentiated by Cl and Reproducing
a short pulse which briefly turns on T2
and charges C4 via R3. Since T2 is
turned on for a fixed time, as the input
frequency increases T2 will be turned
on for a greater proportion of the total
time, so that C4 will charge to a higher
voltage. This causes the charging current
into C3 to increase, thus compensating
for the fact that C3 charges for a shorter
time as the frequency increases.

The circuit given in figure 3 will
produce a sawtooth of constant ampli-
tude over the frequency range 60 Hz
to 10 kHz.

A slight disadvantage of this circuit is
that the shape of the sawtooth (and
hence the harmonic content) alters as
the frequency changes. This is no great
drawback from a musical point of
view. However, in some applications a
linear sawtooth is preferred, and this
can be achieved by replacing R4 with a
current mirror (T3, T4) as shown in
figure 4. This circuit is also equipped
with a FET-source-follower, T5, which
acts as buffer between C3 and the
output and allows low impedance loads
to be driven without degrading the
sawtooth linearity.

The performance of this circuit is better

elektor june 1978 — 6-15

than that of the simpler circuit in that it
will produce a constant amplitude
sawtooth over the frequency range
10 Hz to 20 kHz.

The sawtooth output may be switched
on and off by a switch at the input or
output of the circuit, or by a switch in
the supply line. This latter method is
particularly useful if several sawtooth
converters are in use, since it allows
them all to be controlled by a single
switch. However, if switching of the
supply line is employed then D1 must
be included to prevent the squarewave
signal from breaking through the base-
collector junction of T1 when the
supply is switched off.

C4’ can also be included to ensure that
the sawtooth has a finite initial ampli-
tude at switch-on. The amplitude
depends on the value of C4", which
should be no more than 4.7 n maximum.
Figure 5 shows the effect of different
values of C4'. If C4' is omitted then the

6-16 — elektor june 1978

constant amplitude square wave to sawtooth converter

servo polarity changer

/ servo
polarity
changer

Many model enthusiasts will be
familiar with situations in which
they discovered that moving a
servo control in one direction
prompted the model to steer in
the opposite direction! The circuit
described here is intended to offer
a simple solution to just
this problem.

amplitude of the sawtooth builds up
slowly after switch-on as C4 charges via
T2 (figure 5a). After switch-off the
sawtooth will decay gradually as C4
discharges.

The times taken for the sawtooth to
build up to its steady-state value and
to decay are dependent on the input
frequency, being longest at low fre-
quencies and shortest at high fre-
quencies. This behaviour corresponds
quite closely to that of conventional
musical instruments.

If C4' is included then the sawtooth
signal will assume a finite amplitude
immediately after switch-on. In

figure 5b this is shown as being equal to
the steady-state amplitude. However, if
the value of C4' is made very large then
the initial amplitude will exceed the
steady-state amplitude, as shown in
figure 5c. This effect will be more
noticeable at low input frequencies.

In conclusion, it can be said that these
circuits offer an economic solution
to the problem of providing a sawtooth
signal in squarewave divider instruments
By taking advantage of the high input
resistances offered by MOS technology
it should be possible to make the
capacitor values sufficiently small to
allow total integration of the circuit. M

polarity changer

elektorjune 1978 -6-17

Figure 1. The circuit diagram of the servo
polarity changer.

Figure 2. The finished circuit when mounted
on a board occupies very little space.

Figure 3. In order to set the servo in the
neutral position a pulse duration of 1.5 ms
a required. The top channel shows the input
signal of the circuit, whilst the bottom
channel shows the output pulse. The pulse is
shifted along the time axis, but this has no
effect upon the operation of the servo.

Figure 4. This photo shows the output pulse
obtained for an input pulse duration of 1 ms.
As is apparent the duration of the output
pulse is 2 ms, so that the servo will now be
moved exactly the same amount (the distance
corresponding to a pulse of 0.5 ms) as in the
case of the input signal, but in the opposite
direction.

The best results are usually obtained
from a servo mechanism if it is
mounted in the model so there are as
few joints and bends in the steering rod
as possible. However the direction in
which the servo moves should be such
that it coincides with the direction of
the control knob or joystick, i.e. moving
the joystick to the right causes the
model to steer to the right. However, in
certain cases these two conditions prove
mutually incompatible. Often the result
is that the model builder has to tamper
with the delicate mechanics of the
steering system or with the finnicky
electronics of the servo.

Servos are generally controlled by
means of pulse width modulation; a
pulse width of 1 .5 ms corresponds to
the neutral or ‘straight ahead’ position,
whilst 1 and 2 ms represent the extreme
settings of the control. The polarity of a
servo can simply be reversed, so that
a pulse width of 1 ms causes the servo
control to assume the position that was
previously adopted with a pulse width
of 2 ms, and vice-versa, by modifying
the width of the control pulses.

Since in both cases the neutral position
of the control will correspond to a pulse
width of 1.5 ms, it is possible to calcu-
late the pulse width for all other
positions on the basis of this figure. This
can be done quite simply by subtracting
the original pulse width from 3 ms in
order to obtain its counterpart in the
opposite direction. Thus in order to
reverse the polarity of the servo one
simply arranges for the control pulses
to be subtracted from a reference pulse
of 3 ms.

There are two different types of servo
which are currently available, namely
those which operate with positive going
control pulses, and those which require
a negative going pulse. The circuit
described here can only be used with
servos which use positive going pulses,
however this represents the large
majority of commercially available
devices. The finished circuit occupies
very little space (see figure 2) and hence
there should be no problems mounting

it in whatever model is under construc-
tion.

The circuit

N3 and N4 along with Cl , C2, R1 , R2
and D1 form a monostable with a pulse
duration of approx. 3 ms. This
monostable is triggered by the control
signal, which is also fed to one of the
inputs of N1 and N2. The other inputs
of these two gates receive negative
going pulses of approx. 3 ms duration
from the output of N3. Since N1 and
N2 (like N3 and N4) are NOR gates,
their output will produce a positive
going pulse, the duration of which is
equal to the difference between 3 ms
and the original control pulse. N2 is
connected in parallel with N 1 to
increase the fan-out of the circuit.

The oscilloscope photos show the result
before and after a pulse has been
processed by the circuit. In the proto-
type model the duration of the
monostable pulse was 3.15 ms. In most
applications where the servo is perma-
nently built into the model, allowance
for slight tolerances in pulse width can
be made at the transmitter. However, if
a pulse duration of exactly 3 ms is
required, then a value of 27 n should be
chosen for Cl and C2. Smaller capaci-
tors can then be connected in parallel
with these until a pulse of precisely
3 ms is obtained on the scope. Without
a scope the pulse width can still be
accurately set by altering the value of
Cl and C2 in the above fashion until,
with or without the polarity changer,
the servo remains in exactly the neutral
position.

The circuit consumes very little current
(1 mA), and is unaffected (< 2%) by
variations in the supply voltage between
3 and 10 V. In order to reduce the
dimensions of the circuit to a minimum,
a tantalum type is recommended for
C3. As a result of the symmetrical
construction (R 1 = R2, C1=C2) the
circuit has a very low temperature
coefficient. M

6-18 — elektor june 1978

monopoly dice

The basic die circuit is given in figure 1 .
A 555 timer, ICi, is connected as an
astable multivibrator. This feeds clock
pulses to a divide-by-six counter, IC2,
the outputs of which are decoded by
gates N1 to N6 to drive an array of
LEDs in the familiar die pattern.

When switch SI is in position (b) the
reset input of ICI is pulled low and the
oscillator is inhibited. Power is fed to
the LEDs via Sib so that the display is
activated. When the die is ‘rolled’ by
switching SI to position (a) the display
is blanked. C4 is connected to positive
supply via SI a, producing a short pulse
which resets IC2 via N7 and N8. The
reset input of ICI is pulled high via R5,
so the multivibrator begins to oscillate
and feeds clock pulses to IC2 via N5.
When S 1 is switched back to position (a)
the multivibrator is again inhibited so
that the counter stops, whilst power is
applied to the LEDs which display the
value of the ‘throw’.

Loaded die

Operation of the ‘cheat’ switch is ex-
tremely simple. The base of T1 is con-
nected via R1 to a pair of (disguised)
touch contacts. When these are bridged
by a finger, current flows from the
positive supply rail into the base of T 1 ,
turning on T1 and T2. This connects a
large value capacitor, Cl, in parallel
with C2, which lowers the clock fre-
quency to between 1 Hz and 2 Hz. If
the die is now rolled it is quite easy
(with a little practice ) to count in time
with the clock and to switch SI back to
position (a) at the appropriate time to
stop the counter at any desired number.
The touch contacts may easily be dis-
guised as a pair of screwheads in the
housing of the die.

Monopoly dice

Board games such as Monopoly 1 "^* fre-
quently use a pair of dice, and the rules
of such games often allow a player a
second throw if a ‘double’ is scored (i.e.
both dice show the same number). The
principle of a pair of dice, controlled by
a single start switch, and with an ‘extra

Many circuits for electronic dice
have previously been published,
and it might be thought that the
possibilities of the subject have
been thoroughly exhausted.
However, the dice described in
this article incorporate one or two
little refinements. The single die
circuit incorporates a concealed
'cheat' switch, which allows the
die to be stopped at any desired
number, whilst the double
'Monopoly TM dice' circuit is
equipped with an 'extra turn'
lamp, which lights when a double
has been thrown.

W. Pamler
H.A. Westra

throw’ indicator, is illustrated in fi-
gure 2. Each die circuit is a duplicate of
the circuit of figure 1 , the only differ-
ence being that switch SI is common to
both circuits.

The four outputs of the counter (IC2)
of each die are connected to the inputs
of a 7485 four-bit comparator. The
‘extra throw’ LED, D1 5, is connected to
the A = B output of the comparator.
When both dice register the same score,
the two, four-bit binary numbers fed to
the inputs of the comparator will be
identical, the A = B output will go high
and D15 will light.

Testing the dice

A great deal of care goes into the
manufacture of a conventional cubical
die to make it perfectly symmetrical.
This ensures that there is an equal prob-
ability of throwing any number from 1
to 6, i.e. the die is unbiased. Since the
total probability of throwing a number
at all is 1 (barring accidents) the prob-
ability of throwing a particular number
is, of course, 1/6.

An electronic die must also obey the
laws of probability, and it is quite easy
to test the single die by making several
hundred throws to check that each
score occurs with equal frequency.

With a pair of dice the situation becomes
considerably more complicated. Since
two dice are being thrown the possible
scores range from 2 to 12, but the
number of ways in which the dice can
be thrown is 36. Some scores can be
thrown in more than one way, and thus
have higher probabilities. For example,
2 can only be thrown in one way, (1 + 1)
as can 12 (6+6). The probability of
throwing 2 (or 12) is thus 1/36. A score
of 3 can be thrown in two ways, (1+2,
2+1), as can a score of 11 (5+6, 6+5).
These scores each have a probability of
2/36 or 1/18. A chart showing the 36
possible results of throwing two dice is
given in figure 3, and the probability of
each of the twelve possible scores is
shown in figure 4.

If a pair of electronic dice is to obey the
laws of probability it is essential that
each die should function independently.
When two dice circuits are built on the

monopoly dice

elektor june 1978 — 6-19

same board and operate from the same
power supply, great care must be taken
to ensure that they do not interact. This
means that careful attention must be
paid to circuit layout and supply
decoupling.

Because of the large number of throws
possible with two dice, checking that a
pair of electronic dice obey the laws of
probability is inevitably a time-consum-
ing process, since several thousand
throws would have to be made to
obtain a true assessment of the prob-
ability of each score. In practice this
test is not really necessary, since any
gross bias in the dice will be noticed
fairly quickly when they are used. H

6-20 — elektor june 1978

elektor software service

Elektor

Software

Service

The ready-made printed circuit boards
available from the Elektor p.c.b. service
(EPS), which greatly simplify the con-
struction of Elektor projects, have
always been extremely popular with
readers, for obvious reasons. Having
printed circuit boards available just like
any other component eliminates the
time-consuming chore of designing and
producing a suitable p.c.b., and the high-
quality EPS boards mean that projects
can be given a really professional finish.
With the rapidly-growing interest in
microprocessors it was felt that this
‘hardware’ service should be comp-
lemented by software support for fiP
users in the form of ready-to-run pro-
grammes for various applications.
Simple programmes for the Elektor
SC/MP system have previously been
given in the form of a hexadecimal
listing, but for longer programmes this is
not really feasible, for a variety of
reasons. Firstly, programmes published
in this way must be loaded by hand. If
the programme is of an appreciable
length this can be extremely tedious,
and furthermore there is the possibility
of entering data incorrectly. Secondly,
and perhaps more importantly from the
reader’s point of view, such programme
listings take up a great deal of space,
and certainly do not make compulsive
reading. It was felt that to monopolise
magazine pages in this way would be
unfair to those readers who do not
possess a microprocessor. Such readers
might study a practical microprocessor
article out of casual interest, but it is
unlikely that they could find much
interest in a programme listing!

For the above reasons it was decided to
look for some alternative method of
supplying software. The possibility of
using optical barcodes was examined.
This would have solved the problem of
tedious manual loading and errors, but
barcodes still occupy a lot of magazine
space, and a special ‘light pen’ is
required to read them.

However, most readers possess a record
player or cassette recorder, so the possi-
bility of recording programmes on disc
or cassette was investigated. These could
be played into the microprocessor via a
cassette interface such as that described
in the April issue for the SC/MP system.

After much discussion, disc was chosen
as the recording medium, since discs are
cheaper to produce than cassettes and,
if reasonably well-treated, will retain the
recorded information indefinitely.

As the only /iP system so far described
in Elektor is the SC/MP, programme
discs will initially be available mainly for
this system. Since a disc has a large
storage capacity compared to the length
of the average programme, several
different programmes can be recorded
on each discs. In most cases it will be
possible to record each programme at
least twice so that, in the event of
damage to a section of the disc, the pro-
gramme will not be lost. Nevertheless, it
is recommended that if a programme is
frequently used it should be transcribed
onto a cassette and the disc stored
safely as a ‘master copy’.

It seems an obvious choice to record
data on the discs in the form of an FSK
(frequency -shift keyed) signal to CUTS
standard (300 baud, 0 = 8 cycles at
1200 Hz, 1 = 4 cycles at 2400 Hz).

The first disc will include the ‘Reaction
Tester’ and ‘Clock’ programmes listed
elsewhere in this issue. Three further
programmes are presently under con-
sideration, so that the first disc should
contain four or five programmes.

It is hoped that the Elektor Software
Service will prove a welcome addition to
the existing range of reader services. M

coming soon

coming

soon

Summer circuits:

car battery monitor

power flasher

stereo width control

pseudo random running lights

symmetrical supply

butterworth hi/lo pass

headphone amplifier

touch tone control

variable power supply

metronome

hum filter

cable tester

dishwasher watcher

fluid detector

electronic soldering iron

a/d converter

marker generator

roger squawker

slide synchroniser

cold shower warning

stereo vectorscope

railway crossing bell

front and back door chime

trafficator warning

bicycle speedometer

loudspeaker protection

video combiner

brake efficiency meter

kojak siren

mini stabilisers

bat receiver

programmable address decoder
hf gain tester
model railway lighting
touch controlled dimmer
infrared light gate
power-fet amplifier
sc/mp interface
quadrature oscillator
aquarium light control
fet millivoltmeter
zero crossing detector
universal data-bus buffer
square-to-triangle converter
ultrasonic alarm system
ic fm tuner

broadband rf amplifier
automatic battery charger
voltage controlled audio mixer
digital delay line
disc jockey killer
disc preamp
data multiplexer
and some 50 other circuits!

(Commercial note:

How about a subscription?) H

elektor june 1978 -6-21

The mini-counter is a simple, but
nonetheless highly functional, fre-
quency counter which will measure
signals between 10 Hz and 1 MHz and
display them on a four-digit readout.
The counter consists of six ICs, four
seven-segment displays and a handful of
discrete components. The entire instru-
ment, with the exception of the mains
transformer, can be mounted on a
relatively small p.c. board. The mini-
counter does not use a crystal timebase
oscillator, but takes its reference fre-
quency from the mains, so the accuracy
of this circuit will obviously be inferior
to that of the quarter-gigaherz counter.
However, for non-professional appli-
cations its performance should prove
more than adequate.

Figure 1 shows the complete circuit
diagram of the mini-counter. The
heart of the circuit is the MK S0398N
IC (Mostek). This LSI (Large Scale
Integration) chip contains a six-digit
BCD counter and latch (memory), a
BCD-to-seven-segment decoder, and the
multiplexing for the displays. A more
detailed description of this IC is given in
the 250 MHz counter article.

The mini-counter actually only uses
four of the six available digits. This is
not only to reduce the dimensions of
the counter to a minimum, but also
because the accuracy of the counter
does not warrant the use of more than
four digits. The displays are multiplexed
in the usual fashion, the common
cathodes of the four digits being con-
nected to ground via inverters N1 . . .
N4, which in turn are enabled by the
strobe outputs D5 . . . D2 of the
50398N. The anodes of the segments
receive their supply voltage via resistors
R3 . . . R9 from the segment outputs
a . . . g. The multiplexing is controlled
by the 50398N itself. The digit scan-
frequency is determined by Cl 1, and is
in the region of 2 kHz.

The input signal is fed via the input
stage T1 to the clock input of the
counter; diode D6 protects this input
against large negative voltages.

The counter counts the pulses at the
clock input as long as the count-inhibit
input is at logic ‘O’, i.e. as long as the Q
output of flip-flop FF2 is at logic ‘O’.
This flip-flop is in turn gated by the

Elsewhere in this issue a highly
sophisticated 250 MHz counter is
described. The heart of that
instrument is an LSI counter IC
from Mostek, the MK 50398N.

By using the same IC it is possible
to build a more modest counter
which should prove more than
adequate for most home
constructors.

actual clock generator of the mini-
counter. The clock pulses are derived
from the mains frequency. By means
of inverters N5 and N6, which together
form a Schmitt-trigger, the mains
sinewave voltage is squared up to a
CMOS level signal, which is then divided
down to 10 and 1 Hz squarewaves by
IC4 and IC5 respectively. (N.B. the
mini-counter can be used with either
50 Hz or 60 Hz mains frequencies. This
is accomplished by using the proper
jumper connection on the p.c. board).
Depending upon the position of the
range switch SI , either the 10 Hz or the
1 Hz signal is fed to the clock input of
flip-flop FF2. In the former case the Q
output of this flip-flop goes low for
0. 1 s, whilst in the latter case it is low
for a period of 1 s (these are the two
gate periods of the counter).

At the end of this interval the Q output
of FF2 swings high, the count stops and
FF1 is triggered. The result of this is
that the store-input of the 50398N goes
low, the status of the six BCD counters
is transferred to the latch, and the four
middle digits are displayed.

After a short time capacitor C7 charges
up and FF1 resets itself (FF1 along with
C7 and R 1 1 thus actually functions as a
monostable). Q once more goes high, so
that the store-input of the 50398N is
also taken high and the contents of the
counter are retained. Shortly after FF1
has reset, capacitor C2 will charge up
and the clear-input of the counter will
be taken high. This zeroes the six BCD
counters in preparation for the next
count cycle, but has no effect upon the
latch, so that the display data are not
lost. Diode D5 protects the clear-input
against negative pulses.

Specifications:

sensitivity : 1 V peak

max. input voltage : ± 5 V peak

input impedance : min. 4k7

max. measurement range : 1 MHz

It should be noted that the counter
cannot measure the frequency of input
signals with a (superimposed! DC voltage
component.

In addition to the frequency of the
clock pulse fed to flip-flop FF2, the
range switch SI also controls the
position of the decimal point. The
maximum values which can be displayed
on these two ranges are 99.99 kHz (gate
period 1 s) and 999.9 kHz (gate period
0.1 s) respectively.

The power supply for the mini-counter
simply uses the common voltage regu-
lator IC type 7812.

Printed circuit board

The printed circuit board, the track
pattern and component layout of which
are shown in figure 2, will accomodate
all the components shown in figure 1,
with the exception of the mains trans-

Figure 1. Complete circuit of the mini-

Figure 2. Printed circuit board and component
layout for the mini-counter (EPS 9927).

former and the mains switch S2. If the
components are mounted fairly low on
the board, then the result should be a
compact and handy little instrument.
For use with 50 Hz mains frequency the
wire link shown as a continuous line
next to C8 on the p.c.b. should be
mounted; in the case of a 60 Hz power
line frequency (North America), the
‘dotted’ link is used.

The voltage regulator IC6 should be
fitted with a heat sink.

The frequency range of the mini-counter
can be extended to 10 MHz by con-
necting a 7490 decade counter between
T1 and the clock input of IC1. If
desired, the accuracy of the mini-
counter can be increased by using a
crystal timebase.

elektor june 1978 - 6-23

2

Parts list to figures 1 and 2

Resistors:

R1 ,R14 = 4k7
R2= 2k2

R3 . . . R9 = 270 li
R10,R13 = 10k
R 1 1 = 22k
R12 = 330 0
R15 = 47 k

Capacitors:

C1.C11 = 1 n
C2,C10,C12 " 100 n
C3 . . . C6= 150 p
C7 = 470 n
C8 = 1 000 p/25 V
C9 = 47 m/16 V

Semiconductors:

IC1 = MK 50398N (Mostek)

IC2 = 4049
IC3 = 4013
IC4.IC5 = 4017
IC6 = 7812
T1 = BF 494

D1 . . D4= 1N4004orequ.
D5.D6 = 1 N4148 or equ.

Miscellaneous:

DPI . . . DP4 = display HP 7760
(common cathode)

Tr = mains transformer
12 . . . 18 V/500 mA

51 = DPDT switch

52 = DP mains switch

Mains frequency stability

Under normal conditions, the mains
frequency in the whole of Europe is
maintained at 50 Hz ±0.1 Hz, i.e.
to within 0.2%. In exceptional cases
the error may increase to 0.4%, but
this happens so rarely that the
possibility may safely be ignored
when using the mains frequency as
a reference for frequency counters

and the like.

For electric clocks, the cumulative
long-term error is important. For
instance, if the frequency were to
remain at 50.1 Hz for one full day,
this would lead to a total error of
nearly 3 minutes. However, such
errors are compensated for in such
a way that the total error over any
period (day, month or even year)
rarely amounts to more than one

minute.

For equipment using the mains fre-
quency as a reference or timebase,
the accuracy is as follows:

• instantaneous accuracy, import-

ant for frequency counters and
the like, nominal: ± 0.2%

worst-case: ± 0.4%

• long-term accuracy,
important for clocks: ± 1 minute

H

6-24 — elektor june 1978

the SC/MP

Nowadays digital clocks are something
of a commonplace. For some time now
ICs have been available which contain
all the necessary logic for a digital clock,
and frequently these ICs also include
decoder- and display driver circuits, so
that one simply has to connect up the
displays to have a digital clock which is
fully operational. However it is also a
fairly simple task to write a programme
which will enable a microprocessor to
perform all the complex functions of a
clock chip. Naturally enough, one does
not build a microprocessor system with
the sole intention of using it as a digital
clock. However if such a system is
already available, then a clock
programme represents an interesting and
useful example of the possibilities
afforded by a microcomputer.

The flow diagram of the software clock
is shown in figure 1. Basically the pro-
gramme sets up a software counter for
each of the three variables involved, i.e.
seconds, minutes and hours. For each
of these counters a byte is reserved in
memory, the contents of which are
continually incremented.

When the programme is started, the
clock must be set to the correct time.
This is done by presetting the counters
to the desired values.

The state of the counters is displayed on
the HEX I/O unit, with, as is normal in
the case of digital clocks, the digit
furthest to the right indicating seconds
(units), whilst the digit on the extreme
left on the display indicates hours(tens).
The contents of the seconds counter are
incremented by 1 every second, and the
new value indicated on the displays.
When the seconds counter reaches 60
(decimal), then this counter is reset to
zero and the minutes counter is in-
cremented.

The new contents of the seconds- and
minutes counters are then displayed,
whereupon the seconds counter is once
more incremented, and so on. When the
minutes counter reaches 60 (decimal),
this counter is reset and the hours
counter incremented. The hours counter
of course counts only to 24, and is then
reset to zero.

One of a number of programmes
which will shortly appear on disc,
under the ESS label (see elsewhere
in this issue), is the following
clock programme, which enables
the SC/MP to be used as a digital
clock.

Programme

The simple flow diagram of figure 1

digital clock using the SC/MP

elektorjune 1978 -6-25

Table 1.

0F00 08

0F01 01

0F02 C40F
0FO4 50
0F05 01

0F06 1C
0F07 1C
0F08 1C
0F09 1C
0F0A C80F
0F0C C280
0F0E C900
0F10 C009

0F12 01

0F13 C280

0F15 C901

0F17 3F
0F18 90E7

0F1 A

0F1B 3F
0F1C 06
0F1D 5B
OF IE 4F
0F1F 66
0F20 6D
0F21 7D
0F22 07

0F23 7F
0F24 6F
0F25 08

0F26 C417

0F28 33

0F29 C40F
0F2B 37
0F2C C407
0F2E 35
0F2F C400
0F31 31

0F32 C41 B

0F34 32

0F35 C40F
0F37 36

DIS: display routine

NOP

XAE

LDI 0F

ANE

XAE

SR

SR

SR

SR

ST BYTE
LD-128 (2)

ST 00(1)

LD BYTE
XAE

LD-128 (2)

ST 01 (1)

XPPC3
JMP DIS
BYTE

TAB: table of
7-segment

NOP; start
LDI17
XPAL3
LDI 0F
XPAH 3
LDI 07
XPAH 1
LDI 00
XPAL 1
LDI IB
XPAL 2
LDI 0F
XPAH 2

address

0F38

0F3A

0F3B

0F3D

0F3E

0F40

0F41

0F43

0F44

0F46

0F47

0F49

0F4B

0F4D

0F4E

0F50

0F52

0F53

0F55

0F57

0F59

0F5B

0F5D

0F5F

0F61

0F63

0F65

0F67

0F68

0F6A

0F6B

0F6D

0F6F

0F70

0F72

0F73

0F75

0F77

0F79

C07A LD SEC

3F XPPC3

C403 LDI 03

31 XPAL 1

C075 LD MIN

3F XPPC 3

C406 LDI 06

31 XPAL 1

C070 LD HOU

3F XPPC 3

C400 LDI 00

C9FC ST-4 (1)

C9FF ST-1 (1)

00 HALT

S 1

C407 LDI 07

8F01 DLY01

08 NOP

S 2

C402 LDI 02

8F01 DLY01

S 3

C461 LDI 61*

8F00 DLY 00

S 4

C482 LDI 82

8FC9 DLY C9

8FFF DLY FF

8FFF DLY FF

8FFF DLY FF

C400 LDI 00

31 XPAL 1

C04A LD SEC

02 CCL

EC01 DAI 01

C845 ST SEC

3F XPPC 3

C042 LD SEC

03 SCL

FC60 CAI 60

9CD7 JNZ S 1

C83B ST SEC

3F XPPC 3

0F7A

0F7B

0F7C

0F7D

0F7E

0F7F

0F80

0F82

0F83

0F85

0F86

0F88

0F8A

0F8B

0F8D

0F8E

0F90

0F91

0F92

0F94

0F96

0F97

0F98

0F99

079A

0F9C

0F9D

0F9F

0FA0

0FA2

0FA4

0FA5

0FA7

0FA8

0FAA

0FAB

OFAC

0FAE

0FB0

0FB1

0FB3

0FB4

0FB5

08 NOP

08 NOP

08 NOP

08 NOP

08 NOP

08 NOP

C403 LDI 03

31 XPAL 1

C030 LD MIN

02 CCL

EC01 DAI 01

C82B ST MIN

3F XPPC 3

C028 LD MIN

03 SCL

FC60 CAI 60

08 NOP

08 NOP

9CBF JNZ S 2

C81F ST MIN

08 NOP

08 NOP

08 NOP

3F XPPC 3

C406 LDI 06

31 XPAL 1

C017 LD HOURS

02 CCL

EC01 DAI 01

C812 ST HOURS

3F XPPC 3

C00F LD HOURS

03 SCL

FC24 CAI 24

08 NOP

08 NOP

9CA9 JNZ S3

C806 ST STD

3F XPPC 3

90A8 JMP S 4

• SEC

• MIN

• HOURS

Figure 1. This figure gives the simplified flow-
diagram of the clock programme.

Table 1. The detailed listing of the pro-
gramme in machine code together with
mnemonics.

provides an overview of the programme.
A detailed listing of all the programme
steps in machine code is given in table 1 .
Since the programme runs to more than
200 bytes, it was considered long
enough to be recorded on disc.

The section of memory from 0F00 to
0FB6 is reserved for the programme.
The first section of the programme,
from 0F00 up to and including 0F24
represents the display routine, which
converts the contents of the various
counters into the correct 7-segment
code for the displays. This means that
the start address of the programme is
not 0F00, but 0F25. Before the pro-
gramme is run, the correct time should
be entered at addresses 0FB3 (seconds),
0FB4 (minutes) and 0FB5 (hours).
Since the programme treats the contents
of these locations as decimal numbers,
one simply has to enter the correct time

in decimal by means of the MODIFY
routine.

When the programme is started, the
values entered at these locations will
appear on the display, but the clock
does not run. The clock is started at
exactly the right moment by means of
the HALT-RESET key.

If, after a certain period, the clock starts
to run fast or slow, then the reason for
this is that the clock frequency of the
SC/MP is not exactly 1 MHz. To correct
the clock, the contents of location 0F58
(in the listing, this is the second half of
the instruction at address 0F57) should
be altered accordingly. If the clock is
running fast, then the contents should
be increased, whilst if the clock is
running slow then they should be de-
creased. M

6-26 - elaktor june 1978

programmable call genera 1

programmable

calf

generato r

The earlier version of the automatic call-
sign generator was designed to transmit
a morse-encoded version of a station’s
call-sign every 5 or 10 minutes. The
morse code for the call sign was stored
in a diode matrix memory. This means
that in order for the unit to transmit
other messages it is necessary to set up
new diode matrices. The matrix is thus
similar to a ROM- (Read Only Memory)
type of storage, in that the contents of
the memory cannot be altered or
replaced, but only read out. However it
would be prefectly feasible to replace
the ROM by a RAM (Random Access
Memory), the contents of which can
easily be altered, and hence used to
store different messages. In addition it
is possible to arrange matters such that
the basic function of the call-generator,
i.e. to automatically transmit the
station’s call-sign, remains unaffected.
The modified version of the circuit is
shown in figure 1 . The most important
difference between it and the original
circuit is that two pairs of analogue
switches are incorporated into the
connections leading from the call
generator to the diode matrix. When
the selector switch is in the ‘ROM’
position, the corresponding pair of
switches simply forms a through con-
nection, and the call generator con-
tinues to regularly transmit the call-
sign stored in the diode matrix. When
the selector switch is moved to the
‘RAM’ position, the other pair of
switches is activated, with the result
that the B and C inputs of the call
generator are connected to the outputs
of two RAMs. For these it was decided
to use the relatively inexpensive 2102, a
1024 x 1 bit static RAM, which means
that the length of the message which is
to be automatically transmitted is lim-
ited to a maximum of 1024 morse
characters (dot, dash or space).

In order to read out the contents of
each location in the RAMs, two coun-
ters are used to continuously increment
the address of the RAMs.

The circuit diagram of the add-on
circuit to the call generator plus part
of the address circuitry is shown in
figure 2. The counters used to address
the RAMs are 4029’s. These are
equipped with a preset-facility, and this

The automatic call-sign generator,
which was published in
Elektor 10, February 1976,
relieved radio amateurs of the
chore of having to periodically
repeat their call-sign during
a QSO. The circuit described here,
which is an extension to the above
call generator, allows the operator
to automatically transmit a
number of pre-programmed
morse-encoded messages.

is used to actually programme the
RAMs. The desired address of a par-
ticular bit of data is set up by means of
switches S8a . . . S8h, whilst the data
itself is determined by switches 4 and 5.
Table 1 shows how the various combi-
nations of morse characters are encoded
digitally. For a ‘O’, the D inputs of the
RAMs should be connected to earth
(using switches S4 and S5), whilst a
‘1* is obtained by connecting them via
a resistor to plus supply (+5 V). As long
as switch S7 remains in the ‘prgm’
position, successive addresses can be
entered using S8a . . . S8h.

With 8 address switches it is only
possible to address 256 bits of memory,

MORSE CODE

2102C

2102B

dot

0

0

dash

1

0

dot + sp

0

1

dash + sp

! !

1

table call genere

elektor june 1978-6-27

whilst the two RAMs have a combined
capacity of 1024 bits. To be able to
address all of the available memory, it
is divided into four sections of 256 bits,
each of which can be selected by means
of switch S9 (see figure 3). This arrange-
ment was chosen for practical reasons,
since it means that four different
messages can be stored in memory.

For this system to operate however, the
two highest address bits of the RAMs
must be addressed separately. The
circuit which performs this function
is shown in figure 3. Whilst the RAMs
are being programmed, or before a
message is to be transmitted, the section
of memory to be accessed can be
selected by means of switch S9. When in
position ‘1’, only the contents of the
corresponding section of RAM will be
transmitted, and the same is true for
positions 2, 3 and 4. However it is also
possible to automatically transmit
several messages one after another. This
is done by selecting the appropriate
combination-position for S9. For
example, in position 3 + 4, the contents
of sections 3 and 4 are transmitted
successively.

Figure 1. The block diagram of the add-on
'programmer' circuit for the automatic call-
sign generator.

Figure 2. The circuit diagram of the add-on
circuit minus the logic gating for the two
highest address bits of the RAMs.

The state of the two highest address
bits is controlled by the outputs of two
flip-flops (FF1 and FF2), which can be
set or reset (via N1 . . . N4) by selecting
one of the first 4 positions of S9. When
the call-generator is switched on, the
monostable round N12 ensures that
both flip-flops are reset. When the third
and fourth sections of memory are to
be transmitted, the monostable round
N1 1 presets flip-flop FF2.

It may, of course, be the case that the
message stored in memory is consider-
ably shorter than the available 256 bits.
It is then necessary to interrupt the
transmission immediately after the
message in question by operating the
reset switch (S2) on the call generator.

Wiring and power supply

The wiring diagram for the connections
between the call generator and the add-
on circuit is given in figure 4. As has
already been mentioned, the extra
circuit is situated between the call
generator proper and the diode matrix.
The original connections between these
two points are therefore Broken, and

rogrammable call generator

TV sound modulator

elektor june 1978 — 6-29

TV sound
modulatorJ

highest address bits of the RAMs. This
arrangement enables the available memory
capacity to be divided into four separate
blocks.

Figure 4. The wiring diagram for the con-
nections between the call generator and the
add-on circuit.

Figure 5. A suggested power supply for the
add-on circuit, whereby the required voltage
is derived from the existing supply voltage of
the call generator.

the points marked Brom and Crom
are joined to the diode matrix. Outputs
B and C in figure 2 are taken to the
corresponding inputs of the call
generator, whilst input A is taken to
point A of the call generator. Points F
and G and address bits A8 and A9
in this figure refer to the diagram of
figure 3.

Points D and E in figure 3 are connected
to the corresponding points in the call
generator. In the case of point E a small
modification affecting the reset switch,
S2, in the call generator is required.
Originally this switch was connected in
parallel with capacitor C3. For use with
the add-on circuit however, the contact
of S2 which was joined to point E
should be disconnected and joined to
earth. This step ensures that the reset
facility is preserved.

The complete add-on circuit is fed from
a 5 V supply, this being the voltage
required by the two RAMs. Since the
original call generator operated at a
supply voltage of between 10 and 1 5 V,
an extra supply stage is required.
Figure 5 shows a suitable circuit which
derives the necessary 5 V from the
existing supply voltage of the call
generator.

Literature:

Elektor 10, February 1976, Automatic
call-sign generator. M

A video signal can be fed into the
antenna socket of a domestic TV receiver
by amplitude modulating the signal
onto a UHF carrier. This is the function
of the UHF modulator described in the
December 1977 issue of Elektor. How-
ever, if it is also necessary to feed a
sound signal into the receiver, this
cannot be modulated directly onto the
UHF carrier, since an audio signal lies
within the spectrum of the video signal,
and the two would interact. It is first
necessary to place the sound signal
outside the video signal band by modu-
lating it onto a subcanier, using fre-
quency modulation for better sound
quality. The frequency-modulated
subcarrier is then modulated onto the
UHF carrier together with the video
signal.

Since the sound subcarrier is itself not
usually amplitude modulated (see table
1) it does not produce amplitude
modulation of the UHF carrier, but
causes the appearance of a second carrier
(frequency-modulated) whose centre
frequency differs from the video carrier
by 6 MHz. This is illustrated in figure 1
and clarified in table 1 .

In a broadcast TV system most of the
lower sideband (LSB) is suppressed.
This suppression generally starts at
about 1 MHz from the carrier, leaving
only a small part of the video sideband
and none of the sound. However, for a
modulator which is to be used in the
home, no suppression is necessary.

Block diagram

Figure 2 shows a block diagram of a
sound modulator. The first stage of the
modulator is a high-frequency pre-
emphasis network, which boosts the
high end of the audio spectrum to
improve the signal-to-noise ratio. A

Specifications

The specifications given below are based
on measurements made on the prototype
at a supply voltage of 15 V.

Frequency deviation: 25 kHz/V. Maxi-
mum ± 75 kHz for 6 V p-p input.

Output level: 3 V p-p from 1 k.

When used in conjunction with
the UHF modulator described in
the December 1977 issue of
Elektor, or other UHF modulators,
this sound modulator will allow
audio signals to be fed to the
antenna input of a domestic TV
set and reproduced via the audio
circuits of the receiver.

TV sound modulator

elektor June 1978 — 6-31

mode and

sound IF deviation (Af) country or region

4.5 MHz FM. 25 kHz North and South America,

Japan

5.5 MHz FM, 50 kHz Most of Western Europe,

East Germany, Yugoslavia,
most of north Africa

6.0 MHz FM. 50 kHz UK, Northern Ireland, most of

the southern part of Africa.

6.5 MHz FM. 50 kHz USSR, and most east European

6.5 MHz AM France, Luxembourg, Monaco

Note: this table is only valid for audio systems, not

complementary de-emphasis network in
the TV set cancels this boost to give a
flat frequency response.

The heart of the sound modulator is a
6 MHz voltage-controlled oscillator,
whose frequency varies in sympathy
with the amplitude of the audio input
signal.

The final stage of the modulator is an
output buffer which allows the 6 MHz
output to be fed direct to the second
input of the UHF modulator.

Complete circuit

The full circuit of the TV sound modu-
lator is given in figure 3. The input stage
around transistor T1 functions as an
input buffer and pre-emphasis filter.
This has unity gain at low frequencies,
rising to 10 at the high end of the audio
spectrum. The pre-emphasis is deter-
mined by the time constant R5/C3, and
corresponds to the European standard
of 50 fis.

The oscillator section ‘T2’ is a standard
Clapp circuit, chosen for its exceptional
stability. The frequency of this oscillator
is modulated by using the audio signal
from T1 to alter the capacitance of a
varicap diode, D1 .

The circuit is completed by an output
buffer, emitter follower T3.

Construction

Construction of the sound modulator is
extremely straightforward using the
printed circuit layout of figure 4, To
minimise stray radiation and frequency
drift the circuit board should be built
into a screened, i.e. metal, box. Connec-
tion from the output of the sound
modulator to the input of the UHF
modulator should be by coaxial cable as
shown in figure 5. The current con-
sumption of the circuit is extremely low
(1 mA) so power can be taken from the
existing supply to the UHF modulator.

Adjustment

Setting up the modulator is extremely
simple, since incorrect adjustment is
immediately apparent. Firstly, a suitable
video signal is fed into the TV set via
the UHF modulator and the set is
correctly tuned to this.

The sound signal is then fed in and C4 is
adjusted to tune the centre frequency of
the modulator. Incorrect tuning will
manifest itself as distortion, intercarrier
buzz or no sound at all being present.
Distortion may also occur if the audio
input level is too high, but this can be
adjusted using PI on the sound modu-
lator board.

The sound carrier level may be set by
adjusting P2 on the UHF modulator
board. K

6-32 — elektor june 1978

reaction

Like digital clocks, reactions timers have
conventionally been built using TTL- or
CMOS logic ICs. However, providing it
does not operate at exessively high
speeds, the function of any logic circuit,
including that of a reaction timer, can
be duplicated by a suitably programmed
microprocessor.

In most reaction timers the user simply
has to respond as quickly as possible to
a signal generated by the timer after a
random lenght of time. By using the
SC/MP system however, it is possible to
add an extra twist to the callenge.
Instead of having only one button to
push, the user must select the correct
data key from all those on the HEX I/O
unit, never knowing in advance just
which key it will be.

How the programme works can be
gathered from the flow diagram shown
in figure 1. Once the programme is
started the text ‘START’ will appear on
the displays on the HEX I/O unit,
whereupon one of the data keys
(O - F) can be pressed. After an unde-
fined length of time a random (hexa-
decimal) number will appear in display
2. As quickly as possible the user must
then depress the corresponding key on
the keyboard. For example, if the
display shows ‘7’, then key ‘7’ should be
pressed, and so on. If, within 10 seconds
of the number appearing on the display,
no key or an incorrect key has been
pressed, then the text ‘START’ will be
regenerated on the display. If however
the correct key has been pressed, then
the time between the number appearing
on the display and that key being
pressed will be displayed. This interval is
measured by a software counter which
is incremented every millisecond, which
means that the reaction time shown on
the displays is also in milliseconds. If
the reaction time is less than the pre-
vious best time, T 0 , the SC/MP will
express its admiration by displaying the
text ‘SPLENDID’. The displays will
then alternately show this text and the
reaction time until one of the keys is
pressed, causing ‘START’ to reappear
on the displays.

If the reaction time is greater than T 0
however, then it alone will remain on
the displays until one of the data keys is
pressed, whereupon ‘START’ will re-

Another programme which will
shortly be made available on the
same disc as the clock programme
is for a reaction timer. With the
aid of the SC/MP this programme
allows a person's reactions to be
timed down to the last milli-
second.

H.Huschitt

appear.

For the first test T 0 equals 1 second. If
the reaction time is longer than 1
second then T 0 remains at this value. If,
however, it is shorter than 1 second,
then the initial reaction time of the user
is taken as the new value of T 0 , so that,
at the second attempt, he must be faster
than his previous time to elicit
‘SPLENDID’ from the SC/MP.

The text ‘START’ must always appear
on the displays before another attempt
can be made to improve one’s previous
score. When no further improvement is
possible the programme can be started
again by means of the NRST switch.

Listing

In conclusion, the listing for the reac-
tion timer programme is given in table 1 .
Although the programme is not compli-
cated, it is nonetheless considerably
longer than the clock programme. In
order to take up a minimum of page
space therefore, the listing contains only
the programme addresses and the
instructions in machine code, so that if
necessary they can be entered by hand.
The section of memory reserved for the
programme runs from 0C 00 up to and
including 0CFF, and the start address is
0C00. Like the clock programme, the
reaction timer is intended for systems
with SC/MP 1 and a 1 MHz crystal or
SC/MP 2 and a 2 MHz crystal. M

Figure 1. Flow diagram of the reaction timer
programme.

Table 1. The programme listing together with
addresses.

reaction timer

elektor june 1978 — 6-33

Table 1.

0C0O C40O
0CO2 C857
0C04 C410

0C06 C854

0C08 C46D
0C0A C904
0C0C C478
0C0E C900
0C10 C903

0C12 C45F
0C14 C902

0C16 C450

0C18 C901

0C1A C409
0C1C C905
0C1E C906
0C20 C9FF
0C22 A 836
0C24 Cl 08
0C26 94FA
0C28 8FFF
0C2A C400
0C2C C900
0C2E C901
0C30 C902

0C32 C903

0C34 C904

0C36 C022

0C38 CA01
0C3A C4A0
0C3C CA1D
0C3E 8F20
0C4O B818
0C42 9CFA
0C44 C40O
0C46 37C4

0C48 5533

0C4A 3F
0C4B C40O
0C4D C9FF
0C4F C900
0C51 C902

0C53 C903

0C55 C904

0C57 9007

0C59 00

0C5A 0000
0C5C 0000
0C5E 90A8
0C60 C400

0C62 C8F9
0C64 C8F8
0C66 02

0C67 C401

0C69 E8F2
0C6B C8F0
0C6D C400
0C6F E8ED
0C71 C8EB
0C73 06

0C74 9402

0C76 90E6

0C78 C4A6
0C7A 8F00
0C7C C108
0C7E 94E7
0C80 C40A

0C82 CA1 D
0C84 3F
0C85 C201

0C87 D40F
0C89 E209

0C8B 9CD1
0C8D C0CE
0C8F CA01
0C91 C0CB
0C93 CA02
0C95 C4A0
0C97 CA1D
0C99 3F
0C9A C4O0
0C9C C9FF
0C9E C900
0CAO C408
0CA2 C8B6
0CA4 8FFF
0CA6 B8B2
0CA8 9CFA
0CAA C40A
0CAC CA10
0CAE 03
0CAF C0AA
0CB1 F8AA
0CB3 C0A7
0CB5 F8A7
0CB7 9403
0CB9 3F
0CBA 90A2
0CBC C09F
0CBE C89B
0CC0 C09C
0CC2 C898
0CC4 C46D
0CC6 C906
0CC8 C473
0CCA C905
0CCC C438
0CCE C904
0CD0 C479
0CD2 C903
0CD4 C437
0CD6 C902
0CD8 C45E
0CDA C901
0CDC C408
0CDE C820
0CE0 C430
0CE2 C900
0CE4 0808
0CE6 C45E
0CE8 C9FF
OCEA 8FFF
0CEC C108
0CEE 9403
0CF0 3F
0CF1 90C7
0CF3 B80B
0CF5 9CE9
0CF7 C400
0CF9 C905
OCFB C906
0CFD 908E
0CFF 00

1

automatic
mono stereo

switch

When an FM stereo transmission has
been demodulated, but before it has
been decoded, it consists of two distinct
channels. The left plus right (L+R)
signal occupies the frequency band
0 . . . 15 kHz. This signal is essential for
mono compatibility, as it is the only
part of the stereo signal that a mono
radio can receive. The frequency band
from 23 ... 38 kHz is occupied by the
lower sideband of a 38 kHz subcarrier,
onto which the L-R (left minus right)
signal is modulated. In principle the
stereo signal is decoded by demodulating
this signal, adding it to the L+R signal
to get 2L, and subtracting it from
the L+R signal to get 2R. Since the
23 ... 38 kHz signal is absent during a
mono transmission, a circuit which can
detect this signal will be able to dis-
tinguish between mono and stereo trans-
missions. This is the principle of the
automatic mono-stereo switch.

Block diagram

The principle of the automatic mono-
stereo switch is illustrated in the block
diagram of figure 1. A portion of the
signal from the output of the detector
stage of the tuner is fed to a selective
amplifier with a centre frequency of
35 kHz. If a signal is present in its
passband it will be amplified, then recti-
fied by an envelope detector. The re-
sulting positive voltage is applied to a
comparator, whose output swings nega-
tive and switches on the stereo decoder.
If the transmission is mono then no
signal will be fed through the selective
amplifier and the comparator output
will remain high, switching off the stereo
decoder.

Complete circuit

The circuit of the mono-stereo switch is
shown in figure 2. A1 to A4 are the four
sections of a TL084 quad FET op amp.
The selective amplifier is built around
A1 and A2, the passband being deter-
mined by LI, L2, C4 and C5. A positive
bias voltage of just less than half supply
voltage is applied to the selective ampli-
fier from the junction of R2 and Dl.
This is fed through the rectifier A3 to
appear on capacitor C6 and hence at the
inverting input of comparator A4. The
non-inverting input of A4 receives a

Since the end of February, owners
of stereo FM receivers will have
noticed that the stereo indicator
lamp stays on continuously. This
is due to a decision by the BBC to
transmit the 19 kHz pilot tone
with all programmes, ostensibly to
eliminate annoying clicks that
occur when switching the pilot
tone on and off. The commercial
radio stations have, of course,
followed this practice for some
time.

As the mono-stereo switch in a
stereo receiver operates by
detecting the pilot tone, this
means that such receivers are now
incapable of distinguishing
between mono and stereo trans-
missions and will be permanently
switched to stereo unless the
'mono' switch is pressed. Apart
from the minor annoyance of not
knowing if a programme is in
stereo (unless one buys the Radio
Times) there is the greater
inconvenience of listening to
mono transmissions with the
poorer signal-to-noise ratio
inherent in stereo transmission.
This is particularly a problem in
areas of fringe reception.

The circuit described in this article
distinguishes between mono and
stereo transmissions by detecting
whether or not stereo information
is present in the received signal,
independent of the pilot tone.

positive bias slightly higher than half
supply voltage from the junction of R1
and Dl. Under no-signal conditions
the output of A4 is therefore positive.
The output signal of the tuner is fed to
the input of A1 via sensitivity control
PI and C3. If stereo information is
present this will be amplified by A 1 and
A2 and rectified by A3, causing the
voltage on C6 to rise above that at the
non-inverting input of A4. The output
of A4 will thus swing down to 0 V,
turning on the stereo decoder.

The attack time of the rectifier is ex-
tremely short, about 2.7 ms, so the
decoder will be switched to stereo im-
mediately a stereo signal is received.
However, to avoid the decoder switching
back to mono during pauses in the
audio signal, the decay time constant,
R7-C6, is made fairly long, and the
circuit will not switch back to mono
operation until about 20 seconds after
the cessation of a stereo signal.

The mono-stereo switch can be con-
nected to most IC stereo decoders, such
as the MCI 31 OP, as shown in figure 3.
Operation of the manual mono switch,

Figure 1. Block diagram of the automatic
mono-stereo switch.

Figure 2. Complete circuit of the mono-stereo

Figure 3. Showing the connection of the
mono-stereo switch to an IC stereo decoder.

Figure 4. Printed circuit board and component
layout for the circuit of figure 2 (EPS 99231.

Parts list for
Resistors:
R1,R2 = 10 l
R3 = 470 k
R4 = 33 k

2 and 4

R6 = 270 fl
R7 = 2M2
R8 = 1 k

Capacitors:

Cl ,C2 = 470 n

C4.C5 = 2n2
C6 = 1 0 m/ 25 V
C7 = 47 p/25 V

Semiconductors:

IC1 = TL 084
D1.D2 = 1N4148
D3 = zener 2V7

Miscellaneous:

PI = 47 k preset
LI ,L2 =10 mH choke

which allows selection of mono oper-
ation if stereo reception is too noisy, is
unaffected.

Construction

A printed circuit board and component
layout for the mono-stereo switch are
given in figure 4. This p.c.b. should be
sufficiently compact to be built into
most FM tuners, and the wide supply
voltage range should allow the circuit to
be powered from the supply rail of
almost any tuner.

The circuit has only one adjustment, the
sensitivity control PI. This should be
adjusted so that the circuit operates on
any stereo signal which is sufficiently
strong for noise-free stereo listening. On
the other hand, the sensitivity of the
circuit must not be so great that it
switches on spurious noise. K

traffic light
controller

The heart of the traffic light controller
is a pulse sequence generator based on a
self-shifting register, the basic circuit of
which is given in figure 1. N1 and N2
form an input monostable. A positive
pulse, of arbitrary length, applied to the
input, will be differentiated by Cl and
R1 to give a short positive spike at the
input of NOR gate Nl. The output of
N1 will thus go low, pulling the input of
N2 low via C2. The output of N2 will go
high, which will take the other input of
Nl high. The output of Nl will thus
remain low even after the input pulse
has terminated.

C2 will now charge via R2 until the
logic 1 threshold of N2 is exceeded,
when the output of N2 will go low and
the monostable will reset. The input of
N3 will now be pulled low via C3, and
its output will go high. C3 will charge
via R3 until the logic 1 threshold of N3
is exceeded, when the output of N3 will
go low, pulling the input of N4 low via
C4, and so on. The result is that a
positive-going pulse appears at the
outputs of N2 to N6 in turn. The length
of each pulse is individually determined
by the RC time constant at the input of
the relevant inverter. This makes the
system much more versatile than designs
which rely on clocked digital counters,
since each pulse length, and hence the
duration of each phase of the traffic
lights, can be individually adjusted. N6
produces a short pulse at the end of the
sequence, which is used for trigger
purposes.

To simulate a traffic-light controlled I

This versatile traffic light
controller should prove a welcome
addition to model town, road or
railway layouts, and could also be
used as an aid to road safety
demonstrations in schools. The
design has provision for both
British and European traffic light
sequences, and can also be
adapted to control a 'Pelican'
crossing.

pedestrian (Pelican) crossing a phase of
the lights is needed where the amber
light flashes. This is provided for by an
astable multivibrator (N7, N8) which
oscillates at approximately 2 Hz.

The sequence of pulses generated by the
circuit of figure 1 is shown in the timing
diagram of figure 2a, the output pulses
from N2 to N6 being labelled A to E
respectively, and the astable output
being labelled F. Any desired sequence
for a single set of traffic lights can be
derived from these pulses by simple
logic gating, always remembering that
the length of each pulse can be individu-
ally varied to suit particular require-
ments.

Pelican crossing

The Pelican crossing probably has the
most complicated lamp sequence that is
likely to be encountered. In the quiesc-
ent state the traffic lights are green,
whilst a red, standing figure is illumi-
nated to warn pedestrians not to cross.
When a pedestrian presses the push-
button there is an initial waiting period,
during which a WAIT sign is illumi-
nated in the control console. The
waiting period in a full-size Pelican
crossing depends on when the crossing
was last activated, but for the purposes
of the model a fixed delay is simpler.

At the end of the waiting period the
traffic lights change to amber, then to
red. When the traffic lights are red the
WAIT sign is extinguished, the green,

traffic light >

roller

slektor june 1978 - 6-37

Figure 1. Showing the principle of a pulse
sequence generator using a 'self-shifting
register'. An astable multivibrator provides
2 Hz pulses for the flashing amber' phase of
the Pelican crossing.

Figure 2a. Timing diagram of the pulse
sequence generator.

Figure 2b. Timing diagram of the Pelican
crossing.

Figure 2c. Timing diagram of one set of
traffic lights at a crossing.

walking figure is illuminated and an
audible warning sounds. After several
seconds the audible warning ceases and
the green figure and amber traffic lights
begin to flash. The traffic lights then
change to green and the red figure is
illuminated.

By drawing a timing diagram for this
sequence of events, as shown in
figure 2b, it is easy to calculate the
necessary logic functions. The wait sign
is illuminated during pulses A and B,
therefore WAIT = A + B (A OR B). The
amber traffic light is lit during B and
flashes during D, so AMBER = B + D • F.
[B OR (D AND F)] The red traffic light
is illuminated only during C, so
RED = C. The green figure is lit during
C and flashes during D, therefore
GREEN FIGURE = C + D • F.

The two last conditions, the red figure
and green traffic light, are slightly less
obvious. The only time the red figure is
NOT illuminated is during C a nd D.
Therefore RED FIGURE = C+~D. Simi-
larly, the only time the green traffic
light is NOT illuminated is during B, C
and D. Therefore, GREEN LIGHT =
(B + C + D).

Since the logic functions required are
mostly OR and NOR functions, the
practical circuit is most easily designed
using NOR gates. CMOS gates were
chosen because their high input resis-
tance allows the use of large value
resistors in the shift register, which
allows long delays to be achieved even
with small, non-electrolytic capacitors.
Since NOR gates are used in the circuit,

RED

AMBER-f [_

r

| RED

AMBER-f |

GREEN 1

f l TRIGGE R

6-38 — elektor june 1978

3

where an OR function is required a
PNP transistor is used as an inverter/lamp
driver. When the input to the transistor
is high it is turned off and the lamp is
extinguished; when the input is low the
transistor is turned on and the lamp
lights. For example, the WAIT sign
requires A + B, so NOR gate N9 is used
to drive a PNP transistor. When a NOR
function is required an NPN transistor
is used as a lamp driver, and does not
invert the output of the NOR gate.
Diodes D1 and D2 at the input of N10
perform the AND function required for
the amber lamp (B + D • F) while diodes
D3 and D4 at the input of N13 perform
an OR function to turn N13 into a
3-input NOR-gate for the green lamp
(GREEN LIGHT = B + C + D).

Since operation of the Pelican crossing
is a ‘one-shot’ affair initiated solely by
the pushbutton, the trigger output from
N6 is not required, so only 12 gates
(3 ICs) are required.

The maximum current that can be
supplied to the lamps before the drive
transistors come out of saturation is
limited by two factors; the base current
which the CMOS gates can supply to the
transistors, and the gain of the transis-

tors. With a 5 V supply and a transistor
gain of 400, the maximum lamp current
is about 37 mA. This improves as the
supply voltage is increased to about
122 mA at 15 V. If incandescent
filament lamps are to be driven then it is
preferable to use the higher supply
voltage. Otherwise higher gain (e.g.
Darlington) transistors could be used. If
LEDs are used they must be equipped
with a suitable series current limiting
resistor. The value of the resistor is
given by:

Rl =

supply voltage - LED forward voltage
required LED current

(kf2, V, mA)

The number of lamps connected to each
driver transistor depends on the actual
physical arrangement of the crossing.
For example, on a two-way street with
no central reservation there would be
four traffic lights of each colour and
two sets of pedestrian lights. The lamps
may be connected in series or parallel,
but series operation is preferable to

reduce current consumption. Of course,
if four LEDs are connected in series the
supply voltage must be greater than the
sum of their forward voltage drops.
(Note that in a real crossing series
operation would not be used, since if
one lamp failed all would be ex-
tinguished). For the audible signal a
‘sonalert’ or similar audible warning
device may be used, driven by T7 and
T8.

Traffic-light controlled road
junctions

There are many variations of traffic
light sequences at road junctions,
depending on the complexity of the
junction and the whim of the engineer.
However, the discussion here will be
confined to a simple crossing, which
should be adequate for most modelling
applications. Here, the operating se-
quence is as follows: one set of lights
remains at red whilst the other set goes
through its sequence from red, through
green, back to red again. There may
then be a short delay (though fre-
quently not) during which both sets of

lights are red. start in an invalid sequence at switch-on, time constant can be calculated for any

The first set of lights then changes to S2 is included. When this is switched to given delay time. However, it should be

red + amber, then green, then back the clear position it applies a trigger noted that the threshold voltage of a

through amber to red. After a short pulse to the input and also breaks the CMOS gate is subject to a considerable

delay the second set repeats the same loop so that the register can be cleared tolerance, so the actual time delays

sequence, and so on. In some countries of any invalid states. Once the lights obtained in practice may vary by

the red + amber phase is omitted and have ceased to change, S2 is switched i 50%. M

the lights change straight from red to back to the run position, then briefly

green. back to the clear position to start the

The timing diagram for this sequence is circuit in the correct sequence, and

shown in figure 2c, and it can be seen finally back to the run position.

that it bears a great similarity to that for The comments that were made about

the Pelican crossing, although it is lamp driving with regard to the Pelican

simpler and the duration of some of the crossing apply equally to this circuit.

phases is different. The required logic

gating is quite simple: GRE EN = C,

AMBER = B + D and RED = CTD. If _ . . .

the red + amber phase is omitted then Calculation of time delays

AMBER = D. The time delay (t) generated by each

The practical circuit for one set of section of the shift register is deter-

traffic lights is given in figure 4. The mined by the exponential charging of

two different possibilities for amber are the capacitor to the voltage at which the

catered for by switch SI. Two sets of inverter output changes from logic 1 to

lights are required to control a crossing, logic 0. For this application, the

so the circuit of figure 4 must be equation

duplicated. The two circuits are then

arranged to trigger each other by t = —

connecting them in a loop as shown in 2

figure 5 . is sufficiently accurate.

Since it is possible that the circuit may Using this equation the value of RC

The principle of ‘Easy music’ is ex-
tremely simple, as can be seen from the
block diagram of figure 1. The ‘mu-
sician’s’ whistle is picked up by a crystal
microphone and amplified by op amp
Al. A portion of the signal is fed to an
envelope follower, which rectifies and
filters it to produce a positive voltage
that follows the amplitude envelope of
the input signal. The signal is also fed to
two limiting amplifiers, which convert
the variable amplitude sinewave of the
input signal into a constant amplitude
squarewave having the same frequency

For those who do not have the
time (or perhaps the patience) to
master a musical instrument, but
would nonetheless like to make
their own music, this simple
circuit may provide the answer.
The only musical accomplishment
necessary is the ability to whistle
in tune.

P.J. Tyrrell

as the input signal. This squarewave is
used to clock a binary counter whose
division ratio can be set to 2, 4, 8 etc.,
so that the output is one, two, three etc.
octaves below the input signal.

The counter output is used to switch
transistor T1 on and off, and the col-
lector signal of T1 is fed to the output
amplifier A4. Since the collector
resistor of T1 receives its supply from
the output of the envelope follower, the
amplitude of the collector signal, and
hence of the output signal, varies in
sympathy with the amplitude of the

ink 77

elektor June 1978 - UK 15

Figure 1. Block diagram of 'Easy music'.
Figure 2. Complete circuit diagram.

original input signal.

The output is therefore a squarewave
whose frequency may be one or more
octaves lower than the input signal and
whose amplitude dynamics follow the
amplitude of the input signal.

Complete circuit

The complete circuit is given in figure 2,
and the sections of the circuit shown in
the block diagram are easily identified.
The output of the crystal microphone is
fed to PI, which functions as a sensitivity
control. A1 is connected as a linear
amplifier with a gain of approxi-
mately 56. A portion of the output
signal from A1 is rectified by D1 and
the resulting peak positive voltage is
stored on C4. The output signal from
A1 is further amplified by A2 and A3,
the combined gain of A1 to A3 being
sufficient to cause limiting at the
output of A3, even with very small
input signals. P2 is used to adjust the
gain of the limiting amplifier so that
limiting just occurs with the smallest
input signal, this avoiding limiting
caused by extraneous noises.

The output of A3 is used to clock a
CMOS binary counter, whose division
ratio may be set by means of SI. The
output of IC2 switches transistor T1 on
and off. Since the collector resistor of
T1 (R6) receives its supply voltage from
C4, the amplitude of the collector signal
varies in sympathy with the input signal.
This signal is amplified by a small audio
power amplifier built around A4, which
drives a small loudspeaker.

Additions to the basic circuit

However, the possibilities do not end
there. The more ambitious constructor
may wish to add filters and other circuits
to produce different output waveforms
which will extend the tonal possibilities
of the instrument. Such variations on
the basic design are, however, beyond
the scope of this short article, and are
left to the ingenuity of the individual
reader. M

The Link appears each year in the June issue of Elektor. It contains an
index to all 'Missing Links' published in 1977 plus all 'Missing Links'
published so far this year. The intent of the Link is to assist the home
constructor by listing corrections and improvements to Elektor
circuits in one easy to find place. A simple check of the Link will
show whether any problems were associated with a project.

Don't forget to check Link 76 and Link 75 if the project in question
was published before January 1977 or January 1976, respectively.

Ell

BC 516/51 7
Feb. 77 (E22)

TV sound front-end
Feb. 77 (E22)

E 1 5/1 6
Piano tuner
March 77 (E23)

Speech shifter
May 77 (E25)

E17

SQL-200 SQ decoder
Oct. 77 (E30)

E18

FM on 1 1 meters
March 77 (E23)

E19

Sensitive metal detector
March 77 (E23)

E20

Phasing and vibrato
June 77 (E26)

E21

1C audio
March 77 (E23)

E24

LED VU/PPM
May 77 (E25)
Variometer tuner
Dec. 77 (E32)

E27/28

Automatic NiCad charger
Sept. 77 IE29)

Drill speed control
Sept. 77 (E29)

Knotted handkerchief
Sept. 77 (E29)
Multipurpose time switch
Sept. 77 (E29)

Phaser

Sept. 77 (E29)

Reaction speed tester
Sept. 77 (E29)
Short-wave converter
Sept. 77 (E29)

Sept. 77 (E29)
Spot-frequency sinewave
generator
Sept. 77 (E29I

Voltage controlled monostable
Sept. 77 (E29I
0 ... 10 V supply
Sept. 77 (E29)

3V4 digit DVM
Sept. 77 (E29)

E29

Formant — part 3
March 78 (E35)

E30

Formant — part 4
Jan. 78 (E33)

E31

Formant - part 5
Jan. 78 (E33)

SC/MP

Feb. 78 (E34), p. 2-38
E32

Formant — part 6
Feb. 78 (E34), p. 2-16
Phase meter
Dec. 77 (E32)

E33

Noise generator
March 78 (E35)

E34

SC/MP - part 4
March 78 (E35)

E36

Elektornado
May 78 (E37)

Moving coil preamp
May 78 (E37)

LINK 76
June 77 (E26)
LINK 75
June 76 (E14)

UK 16 - alektor june 1978

Programmable pulse
generator

Programmable timing accuracies
of 2% of programmed value with
a repeatability of 0.5% is avail-
able in this new Hewlett-Packard
Model 8160A Programmable
Pulse Generator. All pulse
parameters are programmable
- width, period, delay, transition
times, amplitude with both high
and low levels separately setable
while holding the other level
stable. Pulses are generated from
1 Hz to 50 MHz. Transition time
of ± 1% is specified for
programmed repeatability.

The basic pulse generator is single
channel with a dual channel
option available. The ability to
store and recall up to nine
complete instrument settings is
one of the features in the 8160A.
Complete operating mode settings,
pulse parameters and output
settings are recalled by simply .
pressing two buttons, or by
addressing one of nine storage
registers via the HP-IB (IEEE-488)
interface bus.,This built-in
versatility in a precision pulse
generator lets the user switch
rapidly between different pulse
parameters without knob twisting
and verification of pulse para-
meters with an oscilloscope.
Built-in batteries maintain data
storage when the instrument is
turned off. Because both
keyboard and bus operation are
possible, the Model 8160A is

suited for both bench and system
applications. Pulse period is
settable from 10.0 ns to 999 ms
with three digits of resolution
(100 ps min.). Internal and
external trigger modes as well as
external gate and counted burst
are provided. Up to 49.9 ns, pulse
width and delay are set using

delay lines which provides pulses
with negligible jitter.

The delay lines also allow delays
longer than one period. Above
50 ns, delay and width are
generated using a combination of
an internal 20 MHz clock and the
delay lines. Delay is from zero to
999 ms, pulse width is from 3 ns
to 999 ms both with three digits
of resolution.

Transition times, with both
leading and trailing edges
independently programmable
within a ratio of 1 to 20, are from
5 ns to 9.90 ms with three digits
of resolution. Programmed
accuracy is ± 5% with a
repeatability of ± 1%. Both upper
and lower levels of the output
may be separately set from
+9.99 V to -9.89 V and +9.89 V
to -9.99 V respectively.
Maximum difference between
levels with a 50 ohm load and
source is 9.99 V with a minimum
difference of 0.1 V. All output
levels may be doubled by
operating with the internal load
disabled.

In the two channel version, an
A+B mode allows doubled
output amplitude with a 20 V
swing within a t 20 V window
from 50 ohms into 50 ohms. In
addition, the A+B mode permits
variable, three-level signals.

It costs $1 1,000 (Domestic U.S.)!
Hewlett-Packard Ltd.,

King Street Lane, Winnersh,
Wokingham, Berkshire, England.

(722 M)

Low-cost computer kit

A new low-cost do-it-yourself
computer kit, the COSMAC VIP
(Video Interface Processor) has
been launched by RCA Solid
State. The new system, designed
to interface with a cathode-ray
display or, via a suitable
modulator, with a TV receiver,
allows the user to assemble a
complete microcomputer for
creating and playing video games,
generating computer graphics and
developing microprocessor
control functions.

The VIP offers a complete

computer system on a printed-
circuit card, with a powerful,
uncluttered operating system
using only 4k bits of read-only
memory. Programs can be
generated and stored in an audio
cassette tape recorder for easy
retrieval and use.

The heart of the VIP is RCA’s
COSMAC CDP1802 micro-
processor, incorporating C-MOS
circuitry for low power
consumption and an 8-bit
architecture for ease of
application. The VIP is based on a
single 814 x 1 1 inch card
containing the CDP1802 micro-
processor chip, a 2048 byte
random-access memory, a single-
chip graphic video display
interface, a built-in hexadecimal
keyboard, a 100 byte/s audio tape
cassette interface, power supply
and facilities for expanding both
memory and input/output
interfaces.

An interpretive programming
language known as CHIP-8
simplifies the programming of
video games using hexadecimal
code. Extremely compact CHIP-8
programs can be stored on
cassette tape for immediate use.
CHIP-8 has 31 easy-to-use
instructions in a 2-byte format for
such programming tasks as
displaying a pattern on the
cathode-ray-tube display,
generating a random byte,
sounding a tone, providing 1 6 one-
byte variables, and allowing
subroutine nesting.

The 5 1 2-byte read-only memory
operating system simplifies tasks
such as loading program into the
random-access memory via the
hexadecimal keyboard, recording
random-access-memory contents
on cassette tapes, transferring
tape-recorded programs into
random-access memory,
displaying memory bytes in
hexadecimal format on a cathode-
ray tube, stepping through
random-acccss-memory contents,
and examining the contents of the
central-processor registers.

The VIP system is readily
expandable, both on the printed-
circuit card and through
connectors. Random-access-
memory capacity can be doubled
on the card to 4096 bytes by
adding four 4k bit devices, and
can be expanded to 32k bytes by
adding further memory capacity
through a 44-pin connector
socket in the card. Parallel
input/output expansion to
1 9 lines can be achieved for use
with music synthesisers, relays, a
low-cost printer or an ASCII
keyboard. The 44-pin connector
socket on the board also allows
the addition of other circuitry for
miscellaneous applications.

A VIP hobbyist manual contains
detailed information on kit
assembly, VIP operating
procedures, CHIP-8 interpreter
programming technique, machine-
language programming, logic
description, test programs,
troubleshooting guides and

system expansion. The manual
also includes program listings for
20 video games, with simple
instructions to nonprogrammers
for using the hexadecimal
keyboard.

At present, the VIP is available in
a form compatible with American
NTSC monochrome television
standards, but a PAL interface
chip with full colour and
programmable sound capability
will be available shortly.

RCA Solid State-Europe,
Sunbury-on- Thames,

Middlesex, TW16 7HW, England.

(720 M)

3-Terminal adjustable
negative regulators

National Semiconductor Corp.
has developed a series of negative
three-terminal adjustable voltage
regulators.

The LM 137/LM 237/LM 337 are
adjustable 3-terminal negative
voltage regulators capable of
supplying in excess of -1.5 A
over an output voltage range of
-1.2 V to -37 V. These
regulators are exceptionally easy
to apply, requiring only 2 external
resistors to set the output voltage
and 1 output capacitor for
frequency compensation. The
circuit design has been optimized
for excellent regulation and low
thermal transients. Further, the
LM 137 series features internal
current limiting, thermal
shutdown and safe-area
compensation, making them
virtually blowout-proof against
overloads.

The LM 137/LM 237/LM 337
serve a wide variety of applications
including local on-card regulation,
programmable-output voltage
regulation or precision current
regulation. The LM 137/LM 237/
LM 337 are ideal complements to
the LM 117/LM 217/LM 317
adjustable positive regulators.
Features

■ Output voltage adjustable
from -1.2 V to -37 V

■ 1.5 A output current
guaranteed, -55°C to
+150°C

e Line regulation typically
0.01%/V

■ Load regulation typically 0.3%

■ Excellent thermal regulation,
0.002%/W

National Semiconductor
19, Goldington Road
Bedford MK40 3 LF
England (727 M)

elektor june 1978 - UK 17

DC standard

The YEW Type 2554 is a new DC
Voltage and Current Standard
designed for bench or field use.
The unit is housed in a compact
and rugged case, and may be
powered by mains or rechargeable
batteries. The five voltage ranges
are from 12 mV to 120 V, and
current ranges are from 12 mA to
120 mA.

Resolution on the lowest ranges is
ljiV and O.lfiA respectively, and
stability is 0.001%/hr. Accuracy is
0.05% making the instrument
suitable for calibration of most
general purpose measuring
instruments, recorders, data
acquisition systems, and process
control recording and controlling
instrumentation. Functions
include polarity reversal switch,
over-voltage and over-current
protection and warning systems,
and an optional reference
junction compensator unit for use
when thermocouple systems are
being calibrated.

Martron Ltd., 20 Park St.,

Princes Ris borough, Bucks,
England

(769 M)

•6" Leds

Industrial Electronic Engineers,
Inc., (IEE), is now offering a new
line of red -63” LED digital
displays designated as IEE-
HERCULES Series 1800.

Series 1 800 makes available high
brightness, dual element models,
and also, economy, single element
models. The dual element LEDs
consist of two chips of light
emitting material which are

electrically interconnected in
series and act functionally as
single segments. Both types of red
LEDs have wide angle and long
distance viewing with a high
contrast ratio. Common anode
and cathode versions are available
with right and left hand decimal
points and ± 1 overflow. These IC
compatible LEDs offer reliability
and long operating life with low
power consumption and low
forward voltage.

^0

Series 1800 LEDs are directly
interchangeable with Litronix.
Delivery is immediate; these
devices are available through IEE
Stocking Distributors.

IEE, 7740 Lemona Avenue.

Van Nuys, California, 91405,

USA

(770 M)

Plastic boxes

Vero Electronics Limited have
expanded their range of plastic
enclosures for electronic
equipment by the introduction of
the Verobox Series II Case Boxes.
These boxes are moulded in light
grey high-impact polystyrene in
two parts, and feature an
attractively-styled bezel. The
anodised aluminium front panel
supplied with the box is retained
between the two halves, avoiding
the need for fixing screws. Slots
and bosses are moulded into the
interior of the box, so that a wide
choice of mounting positions,
either horizontal or vertical, is
available for circuit boards or
component decks. Many of the
boxes have a battery compart-

ment which is accessible without
dismantling the box.

The standard range consists of
fifteen boxes, varying from
110 mm x 68 mm x 33 mm to
190 mm x 138 mmx91 mm, and
other sizes arc available to special
order at a minimum quantity of
100 .

Vero Electronics Limited
Industrial Estate. Chandler's Ford.
Eastleigh, Hampshire, SOS 3ZR,
England

(766 M)

Stickies

Concept Electronics, producers of
TTL Stickies, the IC-size self-
adhesive labels showing pin-outs
for most frequently used TTL ICs,
announce the addition of CMOS
Stickies to their range of aids for
users of digital ICs.

CMOS Stickies are packed in sets
of 480 labels, each set covering 65
different 4000-series ICs. Both
TTL and CMOS Stickies are
available from Concept Electronics
at £ 2.80 per set, 2-10 sets at
£ 2.50 each.

The company have also
introduced 120-label sets for TTL
or CMOS. Designed especially for

hobbyists, they sell at 80p per set.
Each set of Stickies is packed in a
sturdy plastic wallet, complete
with data sheet and full
instructions.

As a new service for specialised
industrial applications, Stickies
can be custom produced in a wide
range of materials and adhesives.

Concept Electronics,

8 Bay ham Road, Sevenoaks,

Kent, England

(773 M)

De-soldering

To complement its professional
range of de-soldering guns, A.B.
Engineering Company has
introduced two new models.

Both feature single handed
operation, a plunger is depressed
then the tool is placed over the
joint to be desoldered - a
soldering instrument is used to
melt the solder. A press button
releases the plunger creating
sufficient suction to remove the
molten solder.

The new Popular model is
designed for field engineers and it
fits easily into a pocket. Two
versions arc available, the
Standard has an orange body
fitted with 3/4” long by 1/2”
diameter nozzle, and the Micro
has a red body and a 1” by 1/16”
diameter nozzle.

The ‘Top of the Range' De-luxe
model incorporates an anti-recoil
system to eliminate the jolt
caused by the return of the
plunger and it features three guide
rods for smooth action.

A removable guard is fitted to aid
precise control. With the guard
removed the De-luxe can be reset
single handed by simply pressing
the plunger against the bench.

The Popular Standard and Micro
De-soldering guns are priced at
£ 4.75 and the De-luxe is priced
at £ 7.25. All prices are plus
V.A.T.

A.B. Engineering Company,

Apem Works, St. Albans Road,
Watford, Herts, WD2 4AN.
England

(767 M)

04 guard

Licon’s 04 illuminated push
button scries has now been fitted
with a switch guard which can be
specified with their bezel barrier
lighted switches and indicators
(for uniform display appearance).

The integral hinged cover prevents
accidental depression of the
display screen.

Both clear and smoky hidden
legend versions are available.

Licon, Norway Road,

Hilsea Industrial Estate,
Portsmouth P03 5HT. England

(772 M)

UK 18 -elektor june 1978

Ink-jet

A unique ink-jet system for
creating alphanumeric characters
on moving recorder charts has
been introduced by Gould
Instruments Division. The ink-jet
annotation device, available as an
option on Gouid Mk 2000 Series
and Mk 200 oscillographic
recorders, prints uniform, highly
readable alphanumeric characters
in a 5 x 7 dot matrix along the
edge of the chart over a wide
range of chart speeds.

With the new ink-jet annotation
system, the user no longer has to
stop the recorder (and possibly
lose valuable analogue data) to
make manual notations. Printing
and analogue recording occur
simultaneously, so that
annotations are closely associated
with the analogue traces to which
they refer.

The device also facilitates use of
the recorder on an ‘exception’
basis, rather than consuming chart
paper whether or not an important
signal is coming in. Printing and
recording can be operator-, event-
or computer-initiated in either
attended or unattended service,
and the device eases the
incorporation of recorders into
automated computer controlled
test systems.

Important measurement
parameters such as instrument
sensitivity settings and chart
speed can also be entered on the
keyboard and automatically
noted on the chart along with the
analogue traces to become a part
of the permanent record.

The patented Gould ink-jet

mechanism is a capillary ‘drop-on-
demand’ system which forms and
ejects an individual droplet of
fluid only when its piezoelectric
transducer is pulsed by the drive
electronics. Unlike continuous-
stream systems, which require a
catcher to collect drops not
required for character formation,
the Gould system eliminates the
need for ink pumping, filtering
and recirculating.

Ink consumption is very low. One
10 cm 9 cartridge will print over
two million characters, and is
easily replaced.

Standard ASCII characters are
formed on the moving chart paper
by electrostatically deflecting
each drop to a preassigned
position in a character colum.
Characters are formed by
scanning each of the five 7-dot
character columns from the
bottom up in raster fashion, and
either depositing or omitting an
ink drop in each of the 35
possible matrix positions.
Character width is held constant
over a 1000 : 1 chart-speed range
(from 0.05 mm/s to 50 mm/s) by
electronically synchronising the
character-generation rate with
chart speed.

An optional Gould real-time
clock module is also available
and an interface allows time to
be printed from other clock
modules. All inputs arc TTL-
compatiblc.

Gould Instruments Division,
Roebuck Road, Hainault,

Essex, England.

(765 Ml

PROGRESSIVE RADIO

SEMICONDUCTOR OFFERS ALL FULL SPEC.

BC212. BC182. BC237. BF197. BCI59. BCY71 - ALL Bp each. RCA 201!
T03 POWER TRANSISTOR (SIM TO 2N3055I - 35p. ACY18 - 18p.
BF200 — 20p. MOTOROLA MRD 306! PHOTOTRANSISTORS - 35p.

N CHANNEL F.E.T.S. SIMILAR TO 2N3819 - 17p. MOSFET SIM TO
40673 - 35p. 3N140 MOSFETS - 50p. M203 DUAL MATCHED
PAIRS MOSFETS, SINGLE GATE PER F.E.T - 40p. SL301 DUAL
MATCHED PAIR SIL. NPN POWER TRANSISTORS FT 300MHz -
30p. INTEL Cl 103 BIT MOS RAMS - 95p. MULLARD BB1 13 TRIPLE
VARICAP DIODE - 35p. MC1310 STEREO DECODER I.C.s - £1.20.
TBA 800I.C. AMPS - 90p. CD4051 CMOS - 50p. 741 8 PIN O.I.L. 23|
500. 600mA BRIDGE RECS (EX EQUIP.I - 2Sp. 1N4002 lOOv 1A DIOD

NIXIES ITT 5870ST 13

MICROPHONES, GRUNDIG ELECTRET INSERTS Wl

IS. CASSETTE CONDENSER Ml

IL IMPEDANCE 50K/600 Ol

MORSE KEYS. HI-SPEED TYPE ALL
METAL - £2.26. 8 OHM STEREO HEADPHONES. PADDED
EARPIECES AND HEADBAND. CURLY LEAD. 30-18KHZ.. ONLY
£3.00. LOW PASS IN-LINE FILTERS. 30MHz CUTOFF. 50 ohm
IMPED - £3.30. XTAL MARKER GEN. 300 KHz STEPS TO 60MHz,
SUPPLIED WITH XTAL FOR THISCOVERAGE - £7.90. SWR/
POWER METER, TYPE SWR50SWR: 1:3: 1:1. POWER 0-1 KW, 3.6-250
MHZ. 520HMS IMPEO. - £12.75, SWR AND F.S. METER, 3-150MHZ,

CRYSTALS. 300 KHz HC6U - 40p. 4.43MHz C.T.V. XTALS - 45p.

0.1" EDGE CONNECTORS 64 WAY - 65p. 32 WAY - 40p.

RELAYS. MIN SEALED RELAYS ALL 4 POLE CHANGEOVER.

36 16* OCt - 45p. 700 (24v DCI - S5p. MIN. 220v AC SEALED
RELAY 2 POLE C/O - 45p. 240v AC SEALED RELAY 3 POLE C/O
RELAY- 20p.

MOTORS. 1.5 TO 6v DC MODEL - 20p. 1 2v DC 6 POLE - 35p.

115v AC MIN. 3 RPM WITH GEARBOX - 30p. 240* AC SYNCH.
MOTOR %th RPM - 65p. 240* AC SYNCH. MOTOR '24th RPM - 65p.
BOXES. BLACK A.B.S. PLASTIC WITH BRASS INSERTS AND LID.

75 x 56 x 35 mm - 40p. 95x 71 x35mm-49p. 1 15 x 95 x 36 mm S7p.
RADIO PLIERS 5" INSULATED HANDLES £1.40. DIAGONAL SIDE
CUTTERS 5" INSULATED HANDLE £1.40.

DE-SOLOERING TOOLS. SOLDER SUCKER. PLUNGER TYPE. EYE
PROTECTION; REPLACEABLE NOZZLE. HIGH SUCTION - £4.95.
TAPE HEADS. CASSETTE STEREO £3.00. BSR MN 1 330 V* TRACK
DUAL IMPEDANCE REC/PLAY-BACK - £1.95. TD10 ASSEMBLIES
TWO HEADS TRACK REC/PLAY BACK STAGGERED STEREO
WITH BUILT-IN ERASE. PER HEAD - £1.20. TAPE HEAD DEMAG
240* AC - £1.95. EIGHT TRACK STER EO H EADS - £1.75.

BUZZERS. GPO TYPE 6-12v - 30p. MIN. SOLID STATE BUZZERS 6-9-12
OR 24vl5mA - 7Sp. LARGE PLASTIC 150mm) DOMED 12v BUZZER,

LOUD NOTE - 50p. ALL METAL 6-12* 30mm BUZZERS, 25p.

U.H.F. T.V. TRANSISTORISED PUSH BUTTON TUNERS (NOT VARICAP)
NEW AND BOXED - £2.50.

N U ME R*?C A B L°DI SPLAYS.'wn-'
POT CORES. ADJ. VINKOR 2!
MILLI HENRY CORES - lOpi

E. ISp METRE. TIL305 ALPHA -

I MICRO H - 20p. 260 OR 600

METERS. STEREO TUNING METERS 100 PER MOVEMENT - £2.75,
GRUNDIG BATT. LEVEL METER 1mA 40 x 40 mm - £1.10, MIN LEVEL
METER 200 26 x 16 mm-- 76p. FERRANTI 600* AC METER - £3.96.

BOARDS. GPO BOARD WITH 6

REED, 1 MERCURY RELAY El .

I.F. PANELS. 6 I.F.T.s - 30p. BOARD Wl

■E TRANSISTORS. 2

- .. H 6* c/o REED RELAY -£1.20.

.L MERCHANISMS WITH LOCKING ARM,

DIAL SCALED 0-100, WINDOW SCALED 0-30,

AEROSOLS. SERVISOL SWITCH CLEANER * LUBRICANT 8oz -
55p. FREEZER 6oz - 50p. GEAR CLEANER & TAR REMOVER
14oz - 85p.

SOLENOIDS. 240* AC - 45p. 1 2v DC H DUTY - 76p. 240* AC
MURATA MA40LI ULTRASONIC TRANSDUCERS 40KHz -

T. INCLUDED IN ALL PRICES.

ORDER ADDRESS

PROGRESSIVE RADIO 3 l Iv C er E pool D 2 E i

W i \

B

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