mi September 1977 45r/USA $ 1.50 L - dCTR (standard/ 1 TV test pattern generator darkroom timer with logarithmic i scale 'FM mains 'intercom system with oabyphone' &?ttfePsion y, then . . .’, and these must be written into the programme step by step. How- ever, this makes a computer infinitely more versatile than a calculator. A calculator is limited in its operation to the mathematical functions available on its keyboard, whereas (within reason) any desired manipulation of data or complex mathematical operation may be performed by a computer by building the correct sequence of instruc- tions into the programme. A typical computer system might consist of four units. 1 . A separate (or sometimes peripheral) unit for preparation (and sometimes even verification) of programmes. This might consist of a teletype or visual display unit (VDU) and punched tape or card equipment. 2. A peripheral input/output unit such as tape/card reader to read in the programme and data, and tape/card punch to output the results. The programme preparation and input/ output units may frequently be com- bined, especially in applications where the computer and the user interact directly, e.g. by means of light pens, Over the past two decades increasing miniaturisation, and in particular the advent of integrated circuits, has revolutionised the electronics industry. Nowhere is this more true than in the field of digital electronics, especially in the area of data processing and calculating machines, where large- scale integration (LSI) has made possible low price units of a small size and high performance unheard of even ten years ago. Currently, microprocessors are the 'in thing', so this series of articles is intended to provide a simple introduction to these extremely versatile devices. voice recognition units etc. 3. A memory unit to store the data and programme instructions. The same memory may be used to store both data and programme, especially in small computers, or there may be separate programme and data memories. 4. A central processing unit (CPU). This carries out arithmetic operations, data comparison, manipulation and move- ment in accordance with the programme instructions. Many readers will have seen photographs of early computers built using valves, and may have marvelled at their apparent complexity and wondered just why they were so complex. The answer is really very simple. After a few initial attempts to build computers operating in decimal notation it was quickly realised that to represent decimal numbers 0 to 9 electronically was not a very practical proposition when applied to a large computer system. It soon became apparent that it was much simpler to make computers operate in the binary number system, since this system uses only digits 1 and 0 (‘0’ is used instead of ‘0’ for the digit, to clearly distinguish it from the letter ‘O’), which can be represented electronically by ‘on’ and ‘off’ conditions. A computer system must be able to handle and store large amounts of information (i.e. numbers), and to store one digit of a binary number requires an electronic circuit that can be set in one state or another depending on whether the digit is 0 or 1. Such a cir- cuit is the common flip-flop. To store and handle many large numbers requires a correspondingly large number of flip- flops, and when one considers that in the days of valves each flip-flop would require one double-triode valve, it is not difficult to see why valve computers were so bulky. In those days each of the four units of a computer might have occupied a room to itself, depending on the complexity of the computer system. The introduc- tion of transistors made possible much smaller computers, and after the intro- duction of TTL and later MOS inte- grated circuits the size of computers could be reduced even further. Finally, with the perfection of LSI MOS tech- introducing microprocessors (1) Figure 1. A computer system comprises a memory unit (MEM), CPU. input/output unit (I/O) and peripherals. Development of LSI technology now means that the CPU can be integrated into a single 1C — the micro- processor. nology the microprocessor appeared on the scene. Thus the functions of the CPU, which in the days of valves occu- I pied several racks of equipment, and in the days of TTL occupied several printed circuit boards, could now be integrated onto a single chip. Of course large scale integration has also brought about a reduction in the physical size of memories, and large amounts of memory capacity can also be accommodated on one chip. Applications of Microprocessors The most obvious use to which a micro- processor can be put, is to couple it to a memory and peripherals to build a microcomputer system. However, much more exciting applications are possible where the microprocessor is ‘dedicated’ to a particular task. A good example of this is the electronic I sewing machine recently introduced by the Singer company. Until the advent of this machine patterned sewing was accomplished by purely mechanical arrangements of cams and levers oper- ating in a fixed sequence. Once the production line was tooled up to pro- duce a machine it was an extremely costly business to make any alterations to the patterns that could be produced. Using a microprocessor to control the sewing patterns all that needs to be changed is the programme. A similar argument applies to automatic washing machines, which normally use cam timers to control the washing sequence. Here again the introduction of any new washing sequences would be extremely costly once the machine was past the prototype stage. Using micro- processors the design can be made much more flexible. During the development phase the programme can be changed many times at relatively little cost and once it is perfected it can be ‘frozen’ into a memory for production use. Even if a design change is necessary during production it is simply a matter of substituting a memory with a new programme, which is considerably less costly than re-tooling to produce a new mechanical part. In general, it is safe to say that micro- processors offer considerable advantages in applications where they can replace a large number of mechanical, electro- mechanical or electronic parts, such as in control applications in industry, in domestic appliances and in automobiles. (to be continued) 9-18 - elektor Sept ember 1977 FM — mains intercom A design for a simple mains intercom has already been published in the June ’76 issue of Elektor. It was stated then that a future issue would contain a design for an improved version, which in a number of respects, would ‘offer considerably better performance. The original design was for an AM- system with roughly the same charac- teristics as most commercially available (AM-) devices. However, since there is very little that can be done to alleviate the problem of mains interference with such a system, it is often the case that users soon revert back to ‘normal’ intercom-installations. The superior performance of the mains intercom described here is due almost entirely to its reduced sensitivity to interference. This is achieved by using an FM system. The advantages of using an FM- as opposed to an AM-trans- mission system, were extensively discussed in the article ‘modulation systems’ which appeared in the February ’75 issue of Elektor. Although the system does in fact employ a transmitter and a receiver, it is somewhat uncommon to use these terms when talking of an intercom system since it is the mains wiring which is being used as the medium to carry the signals. An intercom system is used in the first instance for the transmission of the spoken word, so that high fidelity reproduction is not required. This means that narrowband FM will give sufficient intelligibility for spoken signals. The use of a very narrow bandwidth has the advantage that, if the transmission and reception frequency is made adjustable over a reasonable range, then the number of available channels is thereby greatly increased. The system I described here takes advantage of this possibility, since increasing the number of channels reduces the chance of one frequency overlapping with another and producing interference or ‘splatter’. The transmitting power of the intercom has to be fairly high to take account of the potentially very severe mains inter- ference. However, under normal circum- stances the output power (which may be varied) will be kept to a fairly low level in order to prevent the transmitter The disadvantage of conventional AM-mains intercoms is that they are subject to the often highly disruptive effect of mains interference. The system described in this article hovwver, obviates this problem by employing FM; in addition, by reducing the bandwidth to a minimum, the number of available channels is thereby greatly increased, so that there is little chance of interference ('splatter') between I different intercom systems caused by channel overlap. being picked up outside the building. The construction of the intercom is simplified by the fact that a complete station, consisting of a transmitter, a receiver and a supply section, can be mounted on one printed circuit board. In addition the circuit is simplicity itself as far as tuning is concerned. Design Figure 1 shows the block diagram for a complete intercom station. The trans- mitter and receiver sections inter- connect at point B, so that the mains connection functions as both the in- and output of the station. The transmitter section is shown on the upper half of the diagram. The signal from the microphone is first amplified, limited and filtered, then used to fre- quency modulate an oscillator. After being amplified, the resulting FM-signal is fed into the mains via an isolation transformer. Signals transmitted from other stations are picked up by the transformer and fed to the receiver section. After being amplified and limited, the received signal is demodulated and fed, via a simple audio-amplifier, to a loudspeaker. Switching between ‘speak’ and ‘listen’, i.e. between transmit and receive, is accomplished by switching the supply voltage between the output stage of the transmitter and the AF-amplifier of the receiver. The Transmitter Figure 2 shows a more detailed block diagram of the transmitter section of the intercom. The circuit diagram for the first three blocks is reproduced in figure 3a, whilst figure 3b shows the circuit diagram for the rest of the transmitter. As is apparent from the block diagram, the signal from the microphone is first amplified by the stage round Tl. In order to reduce the bandwidth of the transmitted signal to a minimum approx. 10 kHz in this case), Tl is followed by a clipper, consisting of the differential stage round T2/T3. Although the signal is severely clipped, the intelligibility of the audio signal is I virtually unaffected. The clipper is k followed by a lowpass filter (R9, RIO, R] 1 , C5, C6 and C7) with a cutoff frequency of approx. 5 kHz, which ensures that the sidebands of neigh- bouring channels do not overlap causing splatter. The resulting signal (we have now reached figure 3b) is used to modulate the frequency of the VCO built up round T4, T5, T6 and 11 . The size of the frequency deviation can be adjusted by means of P2. The frequency of the VCO (i.e. the desired channel) is tuned using P2 ; the range of the oscillator runs from approx. 70 kHz to approx. 500 kHz. The frequency-modulated oscillator signal is then fed via the buffer stage T8 to a power amplifier consisting of T9, T10 and Til. The latter two transistors are connected as class-C amplifiers. However the efficiency of the output stage is not as great as one might expect, since the stage has no facility for tuning, thereby making it impossible to match to the load. Although an adjustable matching network would considerably increase the power of the transmitter, it was decided that it would not be practicable in this case. The reason for this is that when using more than one channel, it is not sufficient merely to alter the VCO-frequency to select a different channel, the matching of the output stage would also need to be adjusted accordingly, thereby making the system much more complicated to operate. Operating the output stage in the wideband mode guarantees an output power of at least 1 W over the entire frequency range of the VCO. The trans- mitter power is adjusted by means of P3 (a S W type should be used). Components D3, D4, D7, D8, Cl 7 and Cl 8 protect the output stage of the transmitter from possible voltage transients occurring on the mains. LED D9 is included to provide a visual indication of the transmitter power. Power transistor Til should be fitted with a heat sink (for which sufficient room has been left on the printed circuit board). The Receiver Figure 4 shows the block diagram of the receiver section of the intercom. The circuit diagram of the most important part of the receiver, namely the phase locked loop, is given in figure 5a, whilst figure 5b shows the circuit diagram of the last block in figure 4, i.e. the AF- I amplifier. Incoming signals from other intercom stations are fed via the isolation trans- former Trl (see figure 3b) to the input of the receiver. The output of the trans- ] mitter and the receiver input are thus connected directly to one another I (point B). However, in order to prevent the clamping diodes at the input of the receiver from burning out when the station is transmitting, a series resistor (R31 in figure 3b), is included. For the same reason that there is no facility for matching the transmitter output stage, the receiver input is also j untuned. For the present application the receiver is sufficiently selective as it is, and a wideband input has the added advantage that it is less susceptible to shock excitation caused by transient voltage peaks. The block marked ‘Lim.’ in figure 4 represents the stage which amplifies (to approx. 1 Vpp) and limits the input signal. This is done by T12/T13 and D12/D13 respectively. The signal is then demodulated using a phase locked loop fitted with ‘lock squelch’, i.e. the receiver will only deliver an output when the PLL is locked in. As is apparent from figure 5a, this stage employs an 1C (IC1). The 1C used (available from, among other, Signetics FM — mains intercom elektor September 1977 — 9-21 It It 0 it d o it it id :n 'P it je :d cs I and Exar under type number 567) is a [ tone decoder, and contains a PLL, a I phase detector, a comparator/amplifier and a driver amplifier with open collector. When the received signal is within the capture range of the PLL, the | PLL locks on to the input signal. The I built-in detector functions as a ‘lock- indicator’; when the PLL is locked in, there is a sharp increase in DC-output voltage of the detector. This voltage is converted by the amplifier and output driver transistor into a logic state. In the quiescent state pin 8 of the IC is high, whilst during lock, the logic state at this | pin is low. The FM-input signal is demodulated by taking as the LF-signal the control voltage for the PLL-VCO present at pin 2. The lowpass filter which is connected to this pin is formed by C31 (see figure 5a) together with a resistor in the IC. The LF-signal is fed via R41 and C30 to the base of transistor TI4. However the DC-bias voltage of tiu» transistor is determined by the logic state at pin 8 of the IC. The transistor will turn on only when the PLL is in lock and pin 8 is low. If the input frequency band is outside the capture range of the PLL, the latter will not lock in, and the low frequency signal at the output will be suppressed, hence the term ‘lock squelch’. By means of P4 the free running frequency of the PLL-VCO can be tuned to the centre frequency of the transmission. The range of the PLL- VCO is roughly the same as that of the VCO of the transmitter. The LF-signal is fed to the power amplifier via preset potentiometer P5, which functions as a volume control. P5 may be replaced by a normal pot. if a manual volume control is required. As figure 5b makes clear, the power amplifier is of a very simple design, given the fact that there is no need for hi-fi reproduction. In the absence of a signal no quiescent current flows through the output stage; with a supply voltage of 24 V the circuit will deliver 5 watts to an 8 ohm loudspeaker. The Supply It will have become clear from the foregoing that two separate supply voltages are needed for the intercom. Most of the circuit operates at 7.5 V, but for the output stage of the trans- mitter and the LF-amplifier in the receiver, a 24 V supply is necessary. The 24 V supply is switched between the transmitter-output stage and the LF- amplifier by means of transmit/receive switch SI. For ease of construction, the supply for the entire intercom is also mounted on the printed circuit board. Figure 7 shows the circuit diagram for the supply section, which although fairly simple, is perfectly satisfactory for this appli- cation. The 24 V supply is taken direct from a rectifier circuit, whilst the 7.5 V supply is obtained using a simple regulator, consisting of a transistor and a zener diode. Supply transformer Tr2, which of course cannot be mounted on the p.c.b., should have a secondary voltage of 18 V and supply a current of 1.5 A. Construction Figure 8 shows the component layout and copper side of the printed circuit board. The construction of the intercom should present few difficulties, providing the listed component values are adhered to. The only problem may be the isolation transformer Trl, which has to be selfwound. A pot core without an air gap , 3 0 mm in diameter and 1 9 mm high , should be used. The primary winding consists of 48 turns of enamelled copper wire 0.3 mm thick; 24 windings of the same wire will suffice for the secondary 9-22 - elektor September 1977 Resistors: R1 = 1 M R2,R3,R6,R12,R13.R32. R45.R46 = 47 k R4,R52,R55 = 150 SI R5,R39,R44,R48 = 10 k R7.R40.R47 = 220 k R8 = 330 k R9.R37 = 1k5 I R R10,R28,R30,R34, R R50 = 4k7 R R9.R37 = 1k5 R29.R54 = 3k3 | R10,R28,R30,R34, R31 .R35.R36 = 1 k R50 = 4k7 R49.R53 = 10 Ji R11.R33.R41 = 22 k R51 = 680 n R14.R15.R38 “ 2k2 P1.P2 = 4k7 preset R16.R17 = 100 ft P3 = 470ft/5W R18 = 330 ft P4 = 22 k preset R19 = 820ft P5 = 100 k preset R20 = 270 ft R21.R24.R43 = 220 ft R22.R23, R42 = 1k2 R25.R26 - 560 ft R27 = 22 ft/5 W Capacitors: C1.C30.C36.C41 = 100 n C2 = 47 p C3.C4 = 22 n C5 = 1 80 n C6 = 1 8 n C7 = 5n6 C8.C24.C28.C39 = 47 n C9 = 10 p/10 V C10.C33 = 3n3 C11 = 4p7/63 V C12.C13 = 2p2/40 V C14 = 33 p C15.C16 = 4n7 Cl 7.C1 8 = 2p2/63 V C19.C20 = 100 n/1000 V C21 .C22.C26 = 1 n C23 = 1p5/6 V C25.C43 = 1 00 p/10 V C27 = 680 p C29 = 4p7/3 V C31 = 15 n C32 = 1n5 C34 = 220 n C35 = 22 p/16 V C37 - 27 p C38= 100 m/16 V C40 = 220 p/16 V C42 = 4700 m/35 V Semiconductors: T1 = BC549 C T2 . . . T9.T1 2 = BC547 T10.T13 = BC557 Til = BD241 T14 = BC557 B T15 = BC547 B T16 = BC160 T17 = BD137 T18 = BD138 T19 = BC140 D1.D2.D10 . . . D16 = 1N4148 D3 . . . D8 = 1 N4001 D9 = LED D1 7 = BZX79-C 8V2 (or equ. 8V2 2ener) IC1 = 567 LI = choke 15 mH Trl = pot core tranformer (see text) Tr2 = supply transformer 18 V/1 .5 A B = bridge rectifier B30C2200 SI = SPOT switch vs m. l® * * FM — mains intercom elektor September 1977 - 9-23 winding. The above pot cores are available from Milliard under type number FX 2241, and from Siemens, type number B65701-L0000-R026 (or equivalent). The power transistor in the transmitter and the two power transistors in the LF-amplifier (T17 and T18) should be fitted with a heat sink. Tuning When two intercom stations have been completed and are functioning satisfac- torily (which can be checked by measuring the voltages at the points indicated in the circuit diagram), the tuning procedure which is not dif- ficult - can begin: •switch both stations on and set one to ‘transmit' and the other to ‘receive’, •set P3 for maximum transmitting power; LED D9 on the transmitter should now light up. •set P2 (transmission frequency) to mid-position. •adjust P4 on the receiver until the PLL audibly locks in on the trans- mitted signal; continue to adjust P4 until the PLL goes out of lock; P4 should then be set to the position midway between these two points, •connect a microphone to the trans- mitter and set PI for maximum fre- quency deviation. * hold the microphone of the transmitter close to the loudspeaker of the receiver thus producing ‘howl round’. By means of P5, set the receiver to a reasonable volume. •still holding the microphone close to the loudspeaker, use PI to adjust the frequency deviation of the transmitter until the acoustic feedback produces a much smoother sound, with no audible evidence of overloading. The resulting position for PI should give a reasonable volume with minimal distortion when receiving spoken signals. •Finally, set the transmit/receive switch of both stations in the alternative position, and repeat the above pro- cedure for the other transmitter and receiver. A different transmission fre- quency should be chosen in order to avoid possible interference. Once the tuning procedure has been completed, it is advisable, in the event of severe interference or of heavy signal losses due to transmitting between different phases, to experiment with the system in order to find the optimum transmission frequency. This also avoids the potential problem of a number of users setting P2 in the identical mid- position, thereby increasing the likelihood of channel congestion. In some cases, where severe mains inter- ference is present, it may prove helpful to add a small resistor (say 56 £2) in parallel with the primary of Trl — i.e. between the R31/D8 junction and supply common. Figure 8. Copper side and component layout of the circuit board for the mains intercom. 9-24 - elektor September 1977 FM — mains intercom In Conclusion If, as is shown in figure 9a, a multi-way switch, along with a number of fixed resistors connected in series with preset potentiometers, is used to replace P2, then the result is a true multichannel transmitter. A similar alteration to the frequency-determining section of the receiver (figure 9b) thus converts the system into a complete mains-trans- ceiver. Should difficulties occur with the 5 W wirewound potentiometer (P3 in figure 3b) used to regulate the trans- mitting power, an alternative arrange- ment is shown in figure 1 0. The replace- ment circuit, shown on the right of the diagram, employs a more conventional type of potentiometer and a power transistor, which should of course be fitted with a heat sink. Babyphone extension A large number of mains intercoms are used as babyphones or baby-alarms. It is important that, before an intercom is used for this purpose, it be fitted with a voice-operated control. If this is omitted, the result is that a continuous, more or less unmodulated carrier signal is being transmitted, which, in the case of widespread use, will soon lead to channel congestion. In addition, those present in the same room as the receiver station will be subject to a variety of background noises produced by the intercom. For this reason the following add-on circuit (see figure 11) offers a baby- phone extension for the mains intercom, which will ensure that the intercom is only switched on when the alarm has been actuated. The signal from the microphone is first amplified by A1 and A2. The latter amplifier stage can also be used to amplify the signals from up to three separate alarm-signal sources of the type described in Elektor 19, November 1976. p. 1121 and 1 141. A3, together with D2 and D3, functions as a Figure 9. Extension to switchable multi- channel transceiver. Figure 9a shows the necessary alterations to the frequency-determining section of the transmitter VCO; figure 9b shows the alter- ations to the VCO frequency in the PLL of the receiver. Figure 10. On the left is the original circuit, whilst an alternative method of regulating the power of the transmitter is shown on the right Icf. figure 3b). FM — mains inter com elektor September 1977 - 9-25 rectifier, and feeds a DC voltage to A4, | which operates as a trigger, the threshold voltage of which may be adjusted by | means of P2. With a sufficiently large input signal, the output of A4 is pulled low, causing T1 and T2 to turn on and switch the supply voltage to the intercom. The value of R14 is such that the maximum current through T2 is 1A, which should prove sufficient in the majority of cases. The adjustment procedure is as follows: the slider of P2 is turned fully towards the anode of D1 and PI is used to adjust the circuit to the desired sensi- tivity. If the circuit fails to trigger with PI set for maximum sensitivity, then the trigger threshold can be lowered by means of P2. In addition to its use with a mains intercom, the circuit can be adapted for radio ham applications, since: *the circuit functions with supply voltages equal to or greater than 6 V •the circuit offers the possibility of VOX (Voice operated transmission) * A 1 and A2 can be used as microphone amp and clipper. M Summer Circuits 1977 (E27/28), circuit no. 6. The operation of this circuit is such that only half of the mains period is multiplied to obtain the required timing period. The maximum timing interval is therefore 0.01 x 2 M seconds, or approximately 46.6 hours. In the example given for a 24-hour timer, an extra nought should be added at the end of the binary number. It will be noted that the A1 . . . A8, B1 . . . B4 and Cl . . . C4 connections shown in the cir- cuit diagram are correct for this appli- cation. The last paragraph is perhaps mis- leading. The CMOS NAND gates men- tioned are actually N8 and N4 in the circuit. Automatic NiCad charger Summer Circuits 1977 (E27/28), circuit no. 13. In the diagram, two resistors are shown as R6. The one in the top left hand comer should be R4 = 330 fi. Furthermore, it should be noted that although SI is shown on the p.c.board. only one pushbutton is required for any number of boards as shown in the circuit diagram. 0 ... 10 V supply Summer Circuits 1977 (E27/28), circuit no. 24. A resistor R x is shown on the component layout for the printed cir- cuit board. If a wire link is used here, the circuit shown in figure 1 is obtained. Alternatively, a fixed resistor at this point can be used to reduce the maxi- mum output voltage obtainable to any desired value. Spot-frequency sinewave generator Summer Circuits 1977 (E27/28), circuit no. 25. The input pinning of IC2 and IC3 are shown incorrectly. In both cases, the inverting input should be pin 2 and the non-inverting input should be pin 3. Stereo pan pot Summer Circuits 1977 (E27/28), circuit no. 35. The value of Pl/Pl' is not shown in the diagram. This should be a twin 10 k lin potentiometer. Reaction speed tester Summer Circuits 1977 (E27/28), circuit no. 54. Very little remains of the identification of the preset potentio- meter between pins 6 and 7 of IC1 ... This is PI , and the value is 1 00 k. If desired. Cl can be reduced to 390 n and PI can be readjusted until clock pulses are produced every 10 ms. Short-wave converter Summer Circuits 1977 (E27/28), circuit no. 64. In the text, for BFO read VFO (variable frequency oscillator). Phaser Summer Circuits 1977 (E27/28), circuit no. 70. T1 . . . T6 are given in the cir- cuit as BC245Cs. This should have read BF245C. Voltage controlled monostable Summer Circuits 1977 (E27/28), circuit no. 82. The positive end of the electro- lytic should be connected to pin 1 1 of the IC, the negative end to pin 10. Drill speed control Summer Circuits 1977 (E27/28), circuit no. 104. A better position for LI is in series with the connection between the top of Cl and the top of R1 — Cl is then connected direct across the mains. R 1 should be a 1 Watt type. 3'A digit DVM Summer Circuits 1977 (E27/28), circuit no. 105. T6 is shown as an E300. Although this FET will work in the circuit shown, its pinning does not correspond with the p.c.board layout. The correct type for use on the p.c.board is a BF245. 9-26 - elektor September 1977 working perspex Acrylic sheet is relatively inexpensive, and is available both clear and opaque in a variety of colours. 3 mm thick sheet will normally be adequate for all but the largest cabinets. Acrylic sheet is nor- mally obtained covered by a protective paper film. This simplifies marking out, and to avoid scratches the paper should be retained until after drilling and sawing operations are complete. Drilling A certain amount of care must be taken when drilling perspex to avoid splin- tering and cracking around the hole. Drills should always be kept as sharp as possible. When drilling small holes a normal twist drill may be used and the drill speed should be kept high. How- ever, prolonged high-speed drilling should be avoided as friction may cause the perspex to melt. It is much better to drill a hole in several ‘bites’, allowing the drill and workpiece to cool down in Almost every electronics enthusiast likes to house his lovingly constructed projects in an attractive case or cabinet. Although a wide range of cabinets is now available from various manufacturers it is still often difficult to find a case which meets the exact requirements of a particular project, or is within the budget of the constructor. Attractive cabinets can be fabricated from acrylic sheet such as Perspex ™ or Plexiglas tm with much simpler tools than those required for metalworking. between, and clearing swarf from the f drill flutes. Larger holes are best cut with a screw auger, since this cuts the hole from the outside inwards and splintering is less likely. Very large circular holes may be cut using a hole saw or tank cutter. When cutting large holes, care should always be taken to clamp the work securely in case the drill or cutter should grab, which might otherwise lead to the loss of several fingers. Sawing Straight cuts can be made using a nor- mal hacksaw or a power saw with a fine tooth blade. Large cut outs of any shape may be made using a jigsaw or padsaw, after first drilling a hole into which the saw blade can be inserted. As with drill- ing, care must be taken to avoid melting the acrylic sheet, and frequent stops should be made to clear swarf from the saw blade, since it has a marked tend- ency to clog the teeth. Bending A useful quality of acrylic sheet is that J it can easily be bent after softening by I heat. Only the portion of the sheet! where the bend is to occur is heated, I and figure 1 shows a simple bending jig I that can be mounted at the edge of a I workbench. Current is passed through a * length of resistance wire mounted along ' the edge of the bench just below the acrylic sheet. The wire, and hence the ' sheet, heats up, and the sheet can 1 easily be bent upwards. If a sharp bend is required then a wooden batten may ' be clamped over the sheet along the I bending line. However, sharp bends will < cause some ‘waisting’ of the sheet at the bend. The mechanical details of the bender are extremely simple. The current supply is brought to a ‘chocolate block’ connec- tor which is fixed to the bench. The resistance wire is a loop which goes out from the connector to a second connec- tor and back again. The second connec- tor is fixed to a coil spring that keeps the wire under tension so that it will not go slack as it heats up and expands. The power rating of the transformer! working perspex elektor September 1977 — 9-27 should be around 80 watts, and for safety reasons the secondary voltage should not exceed about 24 V. The resistance of the wire can easily be calculated from the equation: V J R = — where R = resistance V = transformer voltage P = transformer power The length of wire required can then be found by dividing the required resist- ance by the specific resistance (ohms per metre) of the wire. For example, if the transformer secondary is 24 V at 80 W then R = = 2.81 S2. If the specific resistance of the wire is 2.5 H/m then the length required is Alternatively, if a particular length of wire is required, for example to fit a certain bench, then the required specific resistance can be obtained by dividing the resistance by the length required. Obviously the wire gauge chosen should not be so thin that it will quickly burn out in use, but there is obviously much scope for individual ingenuity in con- structing a bending jig. The basic circuit of the bender is shown in figure la. The heating effect may be controlled by driving the transformer from a 100 VA Variac as shown in figure lb, or by driving the heater direct from an isolating Variac as shown in figure lc. On no account should the heater be driven direct from a normal Variac, however, as this is not isolated from the mains. To use the bender the bend line is placed directly over the heater and the heater is switched on for about thirty seconds, after which the acrylic sheet should bend easily. Care should be taken not to bend at too low a tempera- ture as this can cause stress lines and cracks. When making a right angle bend it is best to bend the sheet just past ninety degress as it will tend to ‘unfold’ as the material cools. With a little prac- tice bends with very clean, straight edges can easily be achieved. Bending is best carried out after all drilling operations have been completed, as otherwise the sheet cannot easily be supported while drilling. The only exception to this rule is if a large hole is to be cut very close to a bend. This should be cut after bending, as other- wise the bending operation may distort the hole. Cabinets may be constructed from a single sheet in ‘wrap-around’ form with two endplates, as shown in the accompanying photograph. In this case only one seam is required on the main part of the box, and from an appearance point of view it is best to place this at the base of the cabinet. The end cheeks can be made of acrylic sheet or, for a contrasting appearance, wood. Wood also has the advantage that it can easily be grooved to accept the edges of the box. A transparent acrylic box with wooden end cheeks can make an attract- ive housing for an instrument such as a digital clock, allowing all the “works’ to be seen. Another useful method of construction is to make three sides of the cabinet in a ‘U’ shape from a single acrylic sheet. The other three sides arc also made in the form of a ‘U’ which mates with the first ‘U\ The advantage of this method is that one part of the cabinet can form the front panel, base and back panel with components mounted on it, while the other part is simply a lift off lid. Seams and joints may be made using acrylic adhesive which is available from suppliers of acrylic sheet. Lettering Acrylic cabinets, like any other cabinet, can be attractively labelled using instant dry transfer lettering. After rubbing down the letters firmly they can be sprayed with protective lacquer to prevent damage. The lacquer should be of a type that dries to a hard gloss finish, as the matt types of lacquer supplied for use with instant lettering tend to attract dirt very quickly. TM-Perspex and Plexiglas are registered trade marks. Figure 1. Construction of a simple bending jig for acrylic sheet work. Figure 2. Three possible methods of powering the heater for the bending jig. Photo. An almost complete acrylic sheet cabinet, showing the main assembly and the two end cheeks. 9-28 - elektor September 1977 logarithmic darkroom tir bgarilrlninnic darkroom Iriirrar Linear or Logarithmic When taking a photograph, the exposure of the film can be varied in two ways, by altering the shutter speed and by altering the aperture setting of the camera. Opening the aperture by one stop doubles the amount of light falling on the film, i.e. the aperture setting is calibrated logarithmically. In the darkroom, when printing or enlarging, the exposure of the photo- graphic paper is varied by altering the time for which the lamp is switched on. Here again, a logarithmic scale is appro- priate. For example, consider a timer with a linear scale calibrated from 0 to 1 00 seconds in intervals of five seconds. The first ‘stop’, from 5 to 10 seconds, will double the exposure time. However, at the top end of the scale a change of exposure time from 95 to 100 seconds would have little effect on the final print, as this last stop represents only a 5% change in exposure time. This means that : a) the timing scale is too finely calibrated at the upper end, but is probably too coarsely calibrated at the lower end, and b) the range of such a timer is limited, since to extend it to say 200 seconds would require a 40-way switch! This objection could admittedly be overcome by building a digital timer programmed by thumbwheel decade switches, but there would still remain the basic difficulty of having to estimate how much to increase or decrease the exposure time in order to obtain a lighter or darker print. In the circuit given here, each increment of the timing switch doubles the exposure time, so each switch position will have the same effect on the density of the final print. If a finer increment is required a ‘half-stop’ position is provided that increases the exposure time by a factor of \JT.. A block diagram of the timer is given in figure 1. Pulses from a 10 Hz clock generator are divided by a counter whose division ratio can be set to either 5 or 7 by means of SI a. This means that with Sla in the ‘x 1.4’ position the period of the output pulse is 7/5 (= 1.4) times the period of the output waveform with S 1 a in the divide-by-five Although there is no shortage of designs for darkroom timers, many of these suffer from the twin drawbacks of a linear timing scale and inconvenient controls that leave the user fumbling about in the dark. The design presented here overcomes these disadvantages by having a logarithmic timing scale and ergonomically designed controls. position. Since 1.4 is a reasonable approximation to \fl, the timing interval with Sla in the ‘x 1.4’ position is y/2 times the timing interval with Sla in the ‘x 1 ’ position. The divided-down clock frequency is then fed to the start/stop switching circuit, and also to a 1 2-bit binary counter. The start/stop circuit is provided with Q and Q outputs, and in the quiescent state the Q output is high, holding the binary counter in a reset condition. When the start button is pressed the Q output goes high on the next positive- going edge of the clock pulse. This removes the inhibition on the counter which begins to count the clock pulses. S2 is used to select the particular output of the counter at which the timing interval is to stop. When that output goes high the Q output of_the start/stop circuit goes low and the Q output goes high, which stops the count and resets the counter. A manual stop button is also provided for resetting the timer on initial switch-on, or for manual termination of the timing interval. As each stage of the binary counter divides the output frequency of the previous stage by two, the output period of each stage is twice that of the j preceding stage, and this is how the logarithmic timing scale is obtained. The Q and Q outputs can be used to | drive a relay or relays to switch on the enlarger/printer lamp during the timing interval and, if required, to switch off the darkroom safelight. The complete circuit of the timer is given in figure 2. The clock generator is an astable multivibrator built around two NAND gates N1 and N2. The clock frequency is divided down by IC1, a 4017 decade counter. Depending on the position of Sla this counter will count to 5 or 7 before resetting itself via N3 and N4. The divided down clock pulses are available at the output of N3. The start/stop circuit comprises two D-flip-flops FF1 and FF2. In the quiescent state, for example when the stop button has been pressed, both these flip-flops will be in the reset state. The Q output of FF1 will hold the reset I input of the binary counter IC3 high, iSHiEShBK 1 Kj 9-30 — elaktor September 1977 logarithmic darkr During the timing interval T2 is turned on by the Q output of FF1 thus lighting D2 to indicate that the timing interval is in progress, and energising Re2 to turn on the enlarger/printer lamp. At the same time T1 is turned off, extinguishing D1 and de-energising Rel to switch off the darkroom safelight. This of course assumes that relays with single-pole, normally-open contacts are used for Rel and Re2. If a relay with a single- pole changeover contact is used then this can switch on the enlarger and switch off the safelight simultaneously, in which case Rel can be omitted, and the Rel terminals on the p.c.b. bridged by a wire link. The voltage and current capability of the relay contacts should be sufficient to handle the lamp currents. The coil rating of the relays should be 12 V 50 mA or less. In this case, R8 and R9 can be replaced by wire links. However, if a lower voltage relay is used, suitable values for R8 and R9 should be chosen to limit the LED current to 50 mA. For example, if a (nominally) 6 V/50 mA relay is to be used, R8 (or R9) should be ^£kft= 120 n . Figure 3 shows a timing diagram for the circuit. In the left-hand part of the diagram S2 has been set to a time of 4 seconds. After the start button has been pressed the Q output of FF1 goes high at the next clock pulse and remains high until output 4 of the counter goes high when the circuit resets. The right- hand part of the diagram illustrates that the timing interval is unaffected by inadvertently holding down the start button. In this case the timing interval is set to 0.5 second, which is achieved despite the fact that the start button has been depressed for longer than this. Construction A p.c. board and component layout for the timer are given in figure 4. Careful attention to the construction is required if the timer is to be safe and easy to use. Figure 5 shows a suggested front panel layout. The twelve-position switch carries a knob to which is attached a perspex disc marked out with 24 timing intervals. Dll is positioned beneath the disc so that it illuminates the full-stop timing intervals, i.e. 0.5, 1, 2, 4, 8 seconds etc. while D12 is positioned so that it illuminates the half-stop intervals, i.e. 0.7, 1.4, 2.8 seconds etc. LEDs D1 and D2 are mounted so as to indicate which button should be pressed next, so Dl, which is lit when the timer is quiescent, is mounted next to the start button, indicating that this button should be pressed to start the timing sequence. D2, which is lit during the timing sequence, is mounted next to the stop button, so that this button can easily be found to stop the timer if necessary. As an alternative to SI and S2 a 2-pole, 24-way switch may be used, wired mm. monitor switching for t\ 9-32 — elektor September 1977 as shown in figure 2a. The bank of this switch that replaces SI a is wired so that it switches IC1 alternately between xl and x 1.4, while the bank that replaces S2 is wired so that it changes the selected output of IC3 on every second position of the switch. Sib and D12 are then superfluous, and Dll is simply wired in permanently to illuminate the perspex disc. However, it should be stressed that 24-way switches are not very easy to obtain, which was why the two-switch approach was adopted in the first place. In view of the fact that one is fre- quently working with wet hands in a darkroom, and that there are probably several ‘earthy’ points such as water taps, the wiring and mechanical con- struction must be of a very high standard to avoid any danger of electric shock. Firstly, the case of the timer should be splashproof (no ventilation is required since the power consumption is low) and all metal parts should be securely bonded to mains earth. All mains wiring should be carried out using suitable, double insulated mains cable, and should be secured with cable clips so that there is no danger of a bare mains wire touching any metal part of the case should it come adrift. The lamp outputs from the relays can be brought out to the back of the case on normal mains sockets. As a final safety point, as with any electrical equipment that may be used in damp conditions, e.g. washing machines, lawnmowers, hedge trimmers etc., it is a good idea to have the house wiring system fitted with an earth current leakage trip. Calibration To calibrate the timer, simply set SI and S2 to some convenient short interval such as 8 seconds and adjust PI until the timer agrees with some standard such as a stopwatch. Then check the timer on the higher ranges, where the longer timing interval will allow a more precise check of the accuracy, and readjust PI if necessary. M Although modern audio amplifiers fre- quently sport an abundance of (seldom- used?) gimmicks, very few amplifiers possess comprehensive tape switching and monitoring facilities. Most have only a single tape socket, with facilities for making a recording onto one tape deck and monitoring that recording, and have no provision for a second tape deck. The simple switching circuits described here will allow recording from disc or other sources onto two tape recorders, either one at a time or simultaneously, with monitoring of both recordings. In addition, transcription from either tape recorder to the other is possible, while at the same time a totally different source (disc, tuner, etc.) can be played through the amplifier. The switching circuit is shown in figure 1 . The function selector switch of the amplifier (disc, tuner, aux, etc.) is represented by SI. S2 and S3 are part of the switching unit. With S3 in its centre position a signal can be taken from the source to the record inputs of both tape recorders. With SI in position 1 ♦ 2 the playback output of one tape deck is fed to the record input of the second, while in the 2+1 pos- ition the playback output of the second deck is fed to the record input of the first. Whatever the position of S3, monitoring of tape 1 , source, or tape 2 is possible by means of S2. Therefore, with S3 in position 1 ♦ 2 or 2 * 1 it is still possible to listen to disc, tuner, etc. by setting S2 to its centre position. For clarity only the left channel is shown, but the | right channel is identical. The circuit may be incorporated into the amplifier by inserting it between the output of the function switch and the input of the next stage of the amplifier. The original tape monitor switch (if fitted) can be discarded and replaced by S2, while an extra hole must be drilled in the front panel for S3. Alternatively the switching unit can be mounted in its own box and can be connected to the amplifier via the existing tape socket. The output to the unit is simply taken from the record pin of the tape socket, and the input back to the amplifier from the rotor of S2 is taken to the replay pin of the tape socket. The amplifier must then be operated with the tape monitor switch depressed. A slight modification to the circuit, shown in figure 2, allows recording from disc while listening to a different source. With S4 in the left-hand position the output of the disc preamp can be tapped off and fed to the tape decks, while SI can be in any of its four positions, thus allowing disc or some other source to be listened to at the I same time. The recording may also still be monitored by setting S2 to ‘tape 1’ or ‘tape 2’. H 9-34 — elektor September 1977 rrm ICIH tv pattern generator of the screen. The scan continues in this zig-zag fashion down the screen to line 312 ‘A, when the beam flies back to the top of the screen and the second field starts with the second half of line 312. It is apparent that the second field fills in the gaps between the lines of the first field, i.e. the two fields are interlaced. Although interlacing is a satisfactory method of reducing flicker on moving scenes, since any residual flicker is masked by the movement, flicker can still be quite annoying on stationary pictures such as test patterns, as the changeover from the odd field to the even field is quite noticeable. The pat- tern generator therefore offers the option of switching off the interlace, in which case the picture will consist of two fields of 312 lines, not interlaced Figure 1. Illustrating the principle of gener- ating a frame consisting of two interlaced fields. Figure 2. Detail of the waveform during a line blanking interval showing the line sync pulse and chroma burst. Figures 3a and 3b. Showing a complete com- posite video + sync waveform for a) the end of an even field and start of an odd field, and b) end of an odd field and start of an even field. but written on top of one another. This I reduces flicker at the expense of picture I definition. The field frequency is also I slightly increased due to the loss of one I line. The CCIR standard Extensive text, diagrams and tables of I rise and fall times and signal levels are I used to define the video signal in the I CCIR report on which the pattern gen- I erator is based. It is clearly impractical I and unnecessary to reproduce all this I information here, so only the more I salient points will be discussed. Figure 2 shows, in detail, a portion of I the composite video waveform around I the line blanking interval. The maxi- I mum amplitude of the video signal in I this example is taken as being peak I white level (1). The minimum signal I level is sync level (2), and between these I two lie blanking level (3), which is 30% I of the total signal level, and black level (4). Picture information is dis- I tinguished from sync information by the fact that it occupies the portion of the waveform above black level, while sync information occupies the portion below blanking level. Black level and blanking level frequently coincide, but I black level may be up to 2% above I blanking level. At the beginning of the , line blanking interval (a), which lasts for 12 /is, the video signal is clamped to blanking level, which ensures that the signal is below black level during the retrace (flyback) period. The retrace is thus not visible on the screen. 1 .5 /is after the start of the line blanking I interval the sync pulse (d) begins, and lasts for 4.7 /is. After the line sync pulse I the chroma subcarrier burst in a colour I transmission (f) is inserted on the ‘back I porch’ of the sync signal. This consists of 10 cycles of the chroma (colour) | subcarrier, which is suppressed during I transmission of the picture information, 1 CCI R tv pattern generator elektor September 1977 — 9-35 and facilitates demodulation of the chroma signal. How this is done is not important at this stage; the only thing to note is that the ‘grass’ on the back porch is only present during colour transmissions. The specifications and tolerances of the line blanking interval waveform are given in table 1 . Field synchronization The waveform of the video signal during the field blanking interval is shown for the end of an even field and the begin- ning of an odd field in figure 3a, and conversely, for the end of an odd field and the beginning of an even field in figure 3b. It is immediately apparent that this waveform is considerably more complex than the line blanking interval waveform. As a time scale on these dia- grams one line period (64 /is) is equal to the distance between two A symbols. The picture information is clamped to blanking level for the duration of the field blanking interval. Immediately after the start of the field blanking interval is a sequence of five equalis- ation pulses (1). This is followed by a sequence of five field sync pulses (m), then a further sequence of five equalis- ation pulses (n). The remainder of the field blanking interval is occupied by normal line blanking pulses. The lines that occur during the field blanking interval carry no picture infor- mation, and are responsible for a black band just off the top or bottom of the television picture. Some of these lines may carry digital information for engin- eering purposes and for the transmission of Teletext. From figure 3 it is obvious that the period of a field sync or equal- isation pulse is half of a line period, and this is shown in figure 4, which is an expanded version of the field blanking interval about the area O v . The specifi- cations and tolerances of the field blanking waveform are given in table 2. Design considerations All pulse lengths and timing intervals the generator are derived from a crystal oscillator by dividing down using digital counters. It is fairly obvious that the accuracy with which these intervals can be generated depends on the frequency of the oscillator signal, since the smallest time interval that can be generated is equal to the half-period of the oscillator signal. Looking at tables 1 and 2 it is clear that the smallest time interval is 0.05 /is, since the equalisation pulses are specified as 2.35 /is and the colour burst period as 2.25 /is, so it would appear that an oscillator frequency of 10 MHz is necessary. In the interests of circuit economy (shorter counter chains) and to mini- mise undesirable effects due to logic circuit propagation delays, it is worth considering whether a lower clock fre- quency could be used. Taking into account the tolerances allowed in the various pulses and timing intervals, it Table 1 . Symbol Characteristics Nominal line period (ps) 64 a Line-blanking interval (ps) b Interval between time datum (OH) and back edge of line-blanking signal (ps) 10.5 c Front porch (ps) d Synchronizing pulse (ps) e Start of sub-carrier burst (ps) 5.6 ± 0.1 after OH f Duration of sub-carrier burst (ps) 2.25 ±0.23 (10* 1 cycles) Table 2. Symbol Characteristics Field period (ms) Field-blanking period (for H and a, see table 1 ) Duration of first sequence of equalizing pulses Duration of sequence of synchronizing pulses Duration of second sequence of equalizing pulses Duration of equalizing pulse (ps) Duration of field-synchronizing pulse (ps) Interval between field-synchronizing pulses (ps) 2.35 ±0.1 27.3 (nominal value) 4.7 ± 0.2 becomes apparent that a clock fre- I quency of 4 MHz is permissible. As the half-periods of the clock signal itself ! will be used to generate timing intervals it is necessary that the clock waveform should have a 50% duty-cycle, but even allowing for a 1 0% variation in the clock duty-cycle all pulses and timing intervals still fall well within the CCIR standards. Having decided on the clock frequency it is then possible to choose a suitable logic family on which to base the design. Obviously, the maximum clock frequency of any counters and flip-flops used must be well above 4 MHz, and propagation delays of gates must be suf- ficiently short not to have any adverse effect on any of the pulse lengths. These considerations immediately rule out CMOS ICs, since they have an insuf- ficiently high guaranteed minimum clock frequency and too long a propa- gation delay. The 74-series TTL logic family was therefore chosen. This has the advantage of being sufficiently fast, cheap, and fairly easy to obtain. The disadvantage of TTL is its relatively high power consumption. However this is no real problem in TV work, where a mains supply is generally available. If power consumption is a prime consider- ation then low power Schottky (74LS series) devices may be substituted in the circuit, though this will increase the cost. Table 1. Extract from CCIR standards per- taining to the line blanking interval. Table 2. Extract from CCIR standards with reference to the field blanking interval. Figure 4. Details from figure 3 around point O w , showing the changeover from equalisation to field sync pulses. Block diagram Most of the principal timing intervals in the generator may be obtained by simple division of the clock frequency, and the rest are achieved by suitable logic gating. For example, as there are 625 lines per frame the field period (or rather: frequency) is easily obtained by dividing twice the line frequency by 625 or 5 4 . The line frequency itself is exactly 1/256 of the oscillator fre- quency so a simple eight bit binary counter can be used for this division ratio. The block diagram of figure 5 shows the general arrangement of the sync generator, and the figure numbers corresponding to each individual block are shown in brackets. The heart of the generator is the 4 MHz clock oscillator with its associated div- ider train that generates all the required pulse lengths and timing intervals (fig- ures 6 and 7). The blocks below this represent the logic circuitry that pro- duces each portion of the complete sync waveform. Finally, all the ‘bits’ of the sync waveform are mixed in the sync and video mixer to give the complete sync waveform. Video signals from other circuits such as the pattern gener- ator are also mixed in at this stage, together with the chroma subcarrier signal for colour signals. No colour gen- erator circuits have been included in the present design, but the generator is fully equipped for colour modules to be added later, if and when IC-technology makes them feasible without undue circuit complexity. Clock generator Figure 6 shows the circuit of the clock generator, which is a simple yet reliable crystal oscillator based on two NAND gates. Trimmer C2 provides fine adjust- ment of the oscillator frequency, and buffered antiphase clock signals are available at the outputs of N3 and N4. Timebase dividers The 4 MHz clock signal must be divided down using digital counters to give all the longer timing intervals required in the generator, and the circuit of the timebase divider chain is given in fig- ure 7. The Qo output of the clock gen- erator is first divided by 16 using a 74161 4-bit synchronous counter. Out- Figure 5. Block diagram of the sync generator. Figure 6. The clock oscillator. Figure 7. The divider chain. Figure 8. Showing the principle of combining outputs of the divider chain to obtain the desired pulses. Figures 9 and 10. The reference point in the sync waveform is when all counters start from zero, and this is taken as being the leading edge of a line blanking pulse and the trailing edge of the 25 H signal. put Q4 is then fed into four cascaded 7490 counters. The 7490 is a decade counter, but comprises an independent divide-by-two counter and divide-by-five counter that can be utilised separately if desired. Here, the four divide-by-two sections are first cascaded to divide the O4 output of IC2 by a factor of 1 6. The clock frequency has now been divided by a factor of 256 altogether, so the Qs output of IC6 is at line frequency, i.e. 4,000,000/256 or 15625 Hz. The divide-by-five sections of IC3 to 1C6 are also cascaded to form a divide- by-625 counter, and the Q7 output of IC5, which is at twice line frequency is fed into the B input of IC6. Twice line frequency divided by 625 is 50 Hz, which is field frequency, and this is the frequency obtained at the Q 12 d output of IC3. It is at this stage that the inter- laced/non-interlaced option is made available. With SI grounded, the 625 counter normally counts (naturally enough) up to 625. This corresponds to one field of a normal interlaced picture i.e. 625 half-line periods or 31214 lines. Setting SI in the upper position causes the counter to reset at a count of 624, CCl R tv pattern generator elektor septer 1977 -9-37 i.e. when all four ‘D’ outputs are high. The result is that only 312 lines are scanned per field, and the picture ! becomes non-interlaced. Since the coun- ter is now missing one half-line period of 32 ns the field frequency will increase slightly, but this will not bother a normal TV set whose sync circuits can cope with such a variation. Both normal and inverted versions of outputs Qi to Qa are required, and the inverted versions are provided by N55 to N62. Combining the divider waveforms At the outputs of the clock and divider stages are available waveforms whose [ frequency varies from 4 MHz down to 50 Hz. The next step is to combine these waveforms together in such a way as to make up the various portions of the sync signal. Figure 8 illustrates, in principle, how this is achieved. Wave- forms A and B are squarewaves with a 50% duty-cycle, the frequency of B | being half that of A. Suppose, for example, that a waveform is required having the same frequency as B but a different duty -cycle, say high for three half-periods of A then low for one half-period. This is achieved simply by OR-ing A and B together, so that the result is high when A is high, or when B is high, or when both are high. On the other hand, a waveform that is high for one half-period of A and low for three half-periods is obtained by AND-ing A and B, since the result is high only when A and B are both high. Two further variations are shown using the inverse of A (A). In these examples the same waveforms are obtained as in the first two examples, but displaced in phase by one half-period of A. These are the principles that are used in the generation of the sync waveform. Of course, it is necessary to use slightly more complex gating functions since the waveform is considerably more com- plex. The various portions of the sync waveform must obviously be generated at the correct moments in time. The reference point for all parts of the signal is taken as the moment when all counter outputs are zero. Figures 9 and 10 partially illustrate the count sequence as all the counters start from zero. s a - b i — 1 r r~\ rn„ 9 ° LJTjiJxruiJiJxn.. °4 I 1 .. lO The first portion of the sync waveform to be considered is the field blanking interval 0), this is used to blank the pic- ture information during the field blanking and sync sequence. This has a duration of 25 line periods plus one line blanking interval (25 H + a). Line blanking pulses occur throughout the video waveform except during the equal- isation and field sync pulses, so the simplest way to generate the field blanking interval is to produce a 25 H signal and then combine it with the line blanking pulses. The 25 H signal has a duration of 50 half-line periods, and terminates with the leading edge of the line blanking pulse at the start of each field, i.e. it occupies the last 50 counts before the counters reset to zero. The 25 H signal can thus be generated by the function 25 H = (0 nB • QnC + QhD) * Q 12 D This is implemented by the simple com- bination of logic gates shown in fig- ure 11. Both normal and inverted ver- sions of the 25 H signal are required, so an inverter is added to the output. The fact that an open collector inverter is used is quite incidental, it just so happened that this allowed the use of one less IC and was convenient for the p.c.b. layout. The next portion of the sync waveform to be considered is the interval during which the equalisation and field sync pulses occur (1, m and n). This has a duration of 7.5 H at the beginning of the field blanking interval. The 7.5 H signal is given by 7.5 H = i5 H + Q, 0 b • QioC + QioD + Qn D The logic gating for this function is shown in figure 12. Here again, the inverted term is required. The 2.5 H period when the field sync pulses occur, and the 2.5 H periods on either side of it when the equalisation pulses occur, can easily be derived from the 7.5 H signal by gating with output QioB 23H = 7.5 H . Q, oB The logic gating is shown in figure 13. Having obtained these basic intervals it is now possible to see how they can be combined to generate the complete (sync-plus-video) waveform. Firstly, line blanking pulses occur at 64 ns intervals throughout the video waveform, except during the 7.5 H period of equalisation and field sync pulses. Line blanking pulses must therefore be AND-ed with 7.5 H to achieve this sup- pression. Field sync pulses, on the other hand, must occur only during the 2.5 H period in the middle of the 7.5 H period, and equalisation pulses occur during the 7.5 H period on either side of the field blanking pulses, so these can easily be obtained by AND-ing with the 2.5 H and 7.5 H signals. Gating of the picture information is very simple. The video signal is present except during the field blanking and line blanking intervals, so th e vide o sign al is simply A ND-ed with 25 H and line blanking. Figure 12. Gating to derive the 7.5 H signal. Figure 13. Gating to obtain the 2.5 H signal. CCI R tv pattern generator elektor September 1977 — 9-39 Of course, care must be taken when I designing the video mixer to ensure that i all the signals are in the correct polarity. \ If the video signal is taken as being posi- tive (always above the 30% level) then the sync signals are negative (below the 30% level). Sync plus video mixer circuit Figure 14 shows the complete circuit of the mixer, which is based on open col- lector logic gates and mixing resistors, and its operation is fairly obvious. During the 25 H period or the line blanking interval the output of either N66 or N67 will be low, which will inhibit any video information on the output of N68 and will cause the junc- tion of R7 and R9 (i.e. the output) to be held at the 30% level, except when it is pulled down to 0% by line sync, field sync or equalisation pulses at the outputs of N70, N71 and N72 respect- ively. At any time outside the line blanking or 25 H periods the outputs of N66, N67 and N70 to N72 will be open- circuit, (the open-collector output tran- sistors being turned off) so video infor- mation at the output of N68 can pass to the output. However, the video output can never fall below the 30% level (which would cause false sync pulses) since the output will be at 30% even for the minimum output (0 V) from N68. It should be noted that the video signal is fed in an inverted form to N68, so that the output of N68 produces the normal video signal. Two other inputs are provided to the video mixer. The chroma subcarrier can be fed in via C8, and an experimental input (exp.) is provided to which other gates may be connected. This input also offers the IB Figure 14. Complete circuit of the sync plus video mixer. Figure 15. The power supply, which uses an 1C regulator. Figure 16. Extensive decoupling of the supply lines is required to avoid problems due to spurious pulses. possibility of selecting a grey level for the video signal rather than peak white level by connecting a resistor between this point and earth (typically 1 k). Generation of the line blanking, line sync, field sync and equalisation pulses will be considered in the next part of this article. Power supply The generator requires a power supply of 5 V at up to 1 A, depending on the number of modules used, and for com- pactness and simplicity a 7805 or LM 340 IC voltage regulator (TO-220 package) was chosen. Note that this IC should be provided with an adequate heatsink! The power supply circuit is given in figure 1 5. To avoid any problems due to spurious pulses extensive decoupling of 9-42 — elektor September 1977 formant — the elektor music synthesiser (3) Wiring to the keyboard contacts is largely eliminated by mounting the keyboard divider chain on p.c. boards directly behind the keyboard contacts, so that the ‘tails’ of the contacts can be soldered direct to the p.c. board. The wiring diagram of the keyboard divider boards is given in figure 1 . The p.c. board and component layout are given in figure 2. Each p.c. board covers one octave of the keyboard, so three p.c. boards are required. They are linked by butting together the ends and wiring across from one board to the next, terminal A to terminal A', B to B' and so on. At the left-hand end of the keyboard points A to E are joined to the corre- sponding points on the interface p.c. board by short wire links. Since each keyboard divider p.c.b. has connec- tions for only twelve sets of key contacts the extreme right-hand set of contacts (note 37) must be wired to the end of the p.c.b. as shown in figure 3. Note also the wire link between points B' and D\ In order that the p.c. boards may be mounted directly behind the key contacts by glueing, the reistors and connections to the p.c.b.’s are on the copper side of the p.c.b.’s. This can clearly be seen in photo 1. All the resistors are, of course, 100 S2 1% metal oxide types. Selection of FET source resistors As mentioned in the last article, the source resistors for FETs Tl, T3 and T4 must be selected before the keyboard interface p.c.b. can be completed and tested. This is accomplished using the test circuit of figure 4a. With the gate grounded the gate-source voltage U s is measured and a corresponding source resistors for each transistor is selected from table 1 . Table 1 U s (V) R s (k SI) 0.2 22 0.25 18 0.3... 0.4 15 0.4... 0.5 12 0 . 6 ... 0.8 10 0.9... 1.1 8.2 1 . 2 ... 1.6 6.8 In the previous article the keyboard and keyboard interface circuits were described, together with the printed circuit board for the keyboard interface. In this article the p.c. board layout for the keyboard resistance divider is given, together with constructional details of the keyboard case. The description of the voltage-controlled module unit is then commenced, starting with the power supply and details of the module case. divider p.c.b. Table 1. Selection table for FET source At the same time the gate leakage of each transistor should be checked to ensure that it is within acceptable limits. This is done by removing the grounding link across Cq (330 p). This capacitor will now charge through the gate leakage of the FET, and the source voltage will rise. The rate of change of voltage should be slower than one volt per second. Any FET which cannot meet this criterion should be rejected, i This test should also be applied to T2, I and when the tests are complete each FET, together with its selected source , resistor, can be soldered into the cir- cuit. Due to the possibility of leakage around the sample and hold area of the circuit (Tl to T3) great care should be taken to ensure that the back of the board is scrupulously clean, with no blobs of soldering flux or greasy thumbprints. After testing, the back of ; the board may be sprayed with insu- lating varnish. Although the BF244 or BF245 is speci- fied for Tl to T4, since practically all specimens of this device will function in the circuit, it is possible to use the 1 cheaper and more popular 2N3819 for i T2. It should be noted that the board is laid out for the pinning of the BF245. i The pinning of the BF244 and most 2N3819’s is different, as shown in figure 4b. Interface receiver In the early design stages the KOV and GATE outputs from the interface board were fed direct into the voltage con- trolled modules. However, it was soon discovered that the input currents taken by these modules caused significant voltage drops along the connecting cable between keyboard and module unit, especially if this was long. In particular, earth return currents along the common earth wire shared by the KOV and j GATE outputs caused modulation of the keyboard voltage by the gate pulse. This problem was overcome by provid- , ing high impedance buffer stages at the receiving end of the connecting cable. The circuit for this ‘interface receiver’ is shown in figure 5. It consists simply of a 741 connected as a voltage follower for the KOV input, and a similar voltage follower with an input delay circuit for 9-44 — elektor September 1977 Resistors: R29 = 100 k R30.R31 = 1 k P8= 100 k P9= 1 k Capacitors: CIO = 220 n Cl 1 ,C1 2 = 680 n Semiconductors: IC7.IC8 = pA741C.MC1741 CPI (mini DIP) D3 = 1N4148 D4 = LED e.g. TIL209 D5 = 0A91.0A95.AA119 4. Sample and hold a) Retain the switch from the previous test. Connect point C to an SPDT switch so that this point can be switched between point A and ground. With point C grounded, the gate switch closed and P 1 set to minimum resistance the source voltage of T4 must be less than 4 V and should not change when the gate switch is opened. b) Leave the gate switch open and ground point C using the SPDT switch. The source voltage of T4 must not change. Close the gate switch and the source voltage should now rise by between 3.6 and 4.6 V. Open the gate switch and this new voltage should be maintained. Figure 6. Printed circuit board and com- ponent layout for the interface receiver (EPS 9721-2). Figure 7. Mounting plate for the interface Figure 8. a: Dimensions of the keyboard case, b: Exploded view of the keyboard case. c) Set PI to maximum resistance, changeover switch to ground point C and close the gate switch. The source voltage of T4 should now drop to its original value over two to three seconds. 5. Summing amplifier a) Offset adjustment. Maintain the same switch positions as in test 4c. Using S 1 , switch P2 out of circuit and turn sliders of P3 and P5 to ground. Use P4 to set the KOV output to zero volts. b) Coarse tuning. Switch P2 into circuit using SI and turn P2 fully clockwise and then anticlockwise, when the KOV output should be +5 V and -5 V respectively. c) Fine tuning. Switch P2 out of circuit and turn P5 fully clockwise, when the KOV output should be about 1 50 mV. d) FM. Turn P5 fully anticlockwise. Link point FM to point A on the board. Using P3 it should be possible to vary the KOV output between zero volts and about 1 0 V. 6. Interface receiver Interconnect the interface and interface receiver boards (connections GATE, KOV, +15 V, —15 V and ground). Repeat tests 3 and 5b, but monitor the KOV and GATE outputs of the inter- face receiver. With the gate switch closed the indicator LED should glow. Finally, with the gate switch closed, use P9 to set the gate output voltage of the interface receiver to +5 V. Keyboard unit assembly Once the interface board has been tested, it and the keyboard can be joined to make an integrated keyboard unit. This is accomplished by first making an aluminium mounting plate for the interface board, as shown in figure 7. The ‘tongue’ of this plate fits along the underside of the keyboard chassis (at the left-hand end) and is secured by three 4 mm nuts, bolts and lockwashers. A solder tag beneath one of the nuts PORTAMENTO l=H=i:*<-l:IFOHM ANTl 9-46 - elektor September 1977 formant — the elektor music synthesiser (3) Figure 9. Interface board control panel. Figure 10. Showing the wiring between the keyboard unit, interface receiver and power supply. Photo 1 . Showing the wiring of the key contacts to the keyboard divider p.c.b. elektor September 1977 — 9-47 synthesiser (3) I nterf ace receiver to VC01 to VC02 • to VC03 to VCF to ADSR1 to ADSR2 Keyboard interface 3x Keyboard divider Power supply elektor September 1977 formant — the elektor music synthesiser (3] IN4002 B40C2200 I IC1 723 (OIL) JN4002 B40 C2200 IN4002 i C2200 j provides an earthing point for the keyboard. Note that the larger diameter hole in the tongue is not used yet; it will be required for mounting the keyboard in its case. The next step is to mount the keyboard divider boards. As illustrated in photo 1, these boards should be interlinked in such a way that the ends of the boards actually touch at the junction, as other- wise the spacing of the contacts on the board with respect to the switch contact blocks will not be accurate. As described in part 2 (and illustrated in figure 2b), the contact blocks should be glued or bolted to a 3 mm thick plastic spacer (F). The keyboard divider boards can now also be mounted on this spacer, using either epoxy adhesive or double- sided self-adhesive tape (‘Servotape’, ‘Tesatape’ or similar). Note that the front of the divider boards should touch the contact blocks, as otherwise the wires from the blocks may be too short. The interface board can now be Figure 11. Circuit of the Formant power supply. Figure 12. Printed circuit board and com- ponent layout for the power supply (EPS 9721-3). Photo 2. Detail of the wiring between the keyboard divider and the interface board. a * a ' « * * mounted on top of its mounting plate using 4 mm nuts, bolts and spacers, and connections between the keyboard p.c.b.’s and the interface board are made by short wire links which pass through the rectangular slot in the mounting plate. The earthing point for the keyboard chassis is connected to point ‘F’ on the interface board. The complete assembly can be seen in photos 2 and 3. Although the keyboard unit is now a single assembly it still requires a case to house it, and the dimensions of a suit- able case are given in figure 8a. The materials should be chosen to suit the type of use (or abuse) to which the synthesiser will be subjected, and the choice is left to the individual construc- tor. However, the dimensions given in figure 8a are based on some assumptions, and if other materials are used the dimensions may have to be adjusted accordingly. The assumptions are that the baseboard is made of 1 0 mm ply- 9-50 — elektor September 1977 formant — the elektor music synthesiser (3 wood; that the top panel is also made of fairly thick plywood ( 1 0 ... 1 5 mm) so as to leave room for the potentiometers above the interface board; that the side panels are made of plywood no thicker than 1 5 mm. Particular note should be taken of the two wooden spacers glued to the bottom. These are required for mount- ing the finished keyboard assembly in the case. Figure 8b is an ‘exploded view’ of the complete assembly, illustrating several of the points mentioned above. For screening purposes the inside of the case should be completely lined with thin aluminium or copper sheet or foil, which must be connected to ground. A front panel layout for the interface controls is given in figure 9. This mounts directly over the interface board and Photo 3. Showing the mounting of the inter- face board. Photo 4. The completed power supply board. is secured to the keyboard case by four chromium-plated woodscrews. Potentiometers PI, P2, P3 and PS; (portamento, FM, coarse and fine; tuning) are mounted on the front panel together with SI and the FM input 1 socket, which is a 4.5 mm jack. Con- nections between the front panel and the interface board should be made sufficiently long to enable the front panel to be removed without difficulty. If desired one edge of the front panel may be hinged for easy access to the interface board. The output and supply connections to the interface board are made by means of 5-pin DIN connec-i tors, and a hole for the DIN socket should be cut in the side of the key- board case adjacent to the interface board. The DIN-connectors should be high quality locking types, as the cheap plastic variety will quickly fail after repeated connecting and disconnecting. Connections from the interface board to the DIN socket are shown in figure 10. Power Supply For final adjustment of the keyboard unit it is necessary to use the syn- thesiser’s own power supply to ensure accurate setting of the volts/octave characteristic of the keyboard. For this reason the power supply circuit is now described. Three output voltages are required for the synthesiser: +15 V, -15 V and +5 V. These must all be stable and easily adjustable, and for this reason all three ; supplies are based on the tried and trusted 723 precision voltage regulator IC. The circuit of the power supply i unit is given in figure 1 1 . It will be noted that all three circuits i are positive regulator circuits with an external power transistor to increase the output current. The -15 V supply is obtained simply by linking the positive output of this circuit to ground. This does have the slight disadvantage that separate transformer windings and rec- tifiers are required for each 1 5 V supply, but it does mean that both the positive and negative supplies are of identical design. Each supply is equipped with foldback current limiting, and can comfortably supply over 800 raA, which should be adequate for any possible extension of the synthesiser. When limiting occurs (at about 1.2 A) the output voltage will fall and the current will fold back to about 500 mA with a short-circuited output. Current limiting of any of the outputs is indicated by the extinction of the LED indicator connected across that output. A printed circuit board and component layout for the power supply unit are given in figure 12, and it should be noted that the output connections to T3 are different from those of T1 and T2, being arranged B-E-C instead of C-B-E. Good quality components should be used in the construction of the formant — the elektor music synthesiser (3) elektor September 1977 — 9-51 power supply and the power transistors should be mounted on generous heat- sinks, for example finned heatsinks of 1 00 mm x 50 mm with 30 mm high fins. The AC supplies to the stabilisers may be provided by a single transformer with multiple secondary windings (if available) or by a number of smaller transformers. In either case the trans- formers) should be generously rated, the one amp secondary current specified being the minimum acceptable.' Power supply connections to the voltage- controlled modules will be taken from the power supply by separate wires to each module. For this reason each power supply rail is equipped with a substantial connection ‘busbar’. These are made from copper strip or pieces of copper laminate board, and are soldered to terminal pins pushed through the p.c. board. This arrangement can clearly be seen in photo 4. Once the power supply unit has been built the output voltages can be set to their correct values. The —15 V supply should be adjusted to within 1% of its nominal value using a DVM, since the accuracy of this supply voltage has a direct bearing on the volts/octave characteristic of the keyboard. The +1 5 V and +5 V supplies need only be set to within 3% of their nominal values. Keyboard calibration Once the synthesiser’s own power supply has been tested and adjusted the offset compensation and volts per octave characteristic of the keyboard can be Figure 13. A suggested layout for a 'basic' synthesiser in a home-constructed module housing. Figure 14. The dimensions of the Formant modules are compatible with the Eurocard rack system. adjusted. The keyboard interface, inter- face receiver and power supply are connected as shown in figure 1 0. Offset compensation The overall tuning is switched off (SI ‘off’, i.e. position b). Depress the lowest key of the keyboard and hold it down while adjusting P4 so that the KOV output of the interface receiver is zero. Volts/octave characteristic This should be adjusted to an accuracy 9-52 — elektor September 1977 formant - the elektor music synthesiser (3) of at least 1% using a DVM. The overall tuning remains switched off. The KOV output is measured and P6 is adjusted so that alternately depressing keys one octave apart causes the KOV output to change by exactly one volt. The Formant keyboard is now compatible with any synthesiser that uses a stan- dard 1 V/octave keyboard. Finally, the offset compensation should again be checked and readjusted if necessary. Gate delay Accurate adjustment of the gate delay is not possible until the voltage con- trolled modules have been constructed, but an approximate adjustment will suffice until that time. P7 on the inter- face board should be set to about one quarter of its maximum resistance, and P8 on the receiver board should be set to minimum. Modular construction A modular method of construction was chosen because it allowed the greatest flexibility in the final design. Each voltage-controlled circuit is constructed on its own p.c. board which plugs into a socket in the module housing that supplies power, control voltage and gate pulses. Interconnections between modules are made by means of patch cords. The advantage of this system is that the synthesiser can be made as simple or as complex as is required. Provided sufficient space is left in the module housing for additional modules, it is possible to build a playable instrument with just a small number of modules, and to extend it as when desired. This also means that every instrument can be tailored to the individual construc- tor’s taste and is not fixed within rigid limits set by the designer. How- ever, for those who require a little more Figure 15. A case containing one 6U and one 3U rack will accommodate six large and six small Formant modules. It can be useful to add a 2U or 3U bottom panel (using a larger case!), behind which amplifiers etc. can be mounted. guidance as to the right ‘mix’ of modules that should be adopted, a suggestion for a ‘middle-of-the-road’ instrument is given in figure 13. This utilises three VCO modules, one VCF, one dual VCA module, two ADSR envelope shapers, one LFO module and one noise module. The module printed circuit boards and front panels are compatible with the Eurocard rack system. Two module heights are employed in Formant. A double-height (6U) module is used for the voltage-controlled modules (VCO’s, VCA’s and VCF’s) while a single-height (3U) module is used for the ancillary circuits (envelope, shapers, noise gener- ator etc.). The basic dimensions of the modules are given in figure 14. The Eurocard rack system operates on a card spacing of 5.08 mm (0.2") or multiples thereof. Each Formant module occupies a panel width of approx. 71 mm, so the 426.7 of panel width available will accommo- date six modules. A 6U rack and a 3U rack stacked together will thus accom- modate six large and six small modules, as shown in figure 15, so if the proposed instrument is built this will leave space for one large and one small module to be added later. Of course some readers, especially those with previous experience of synthesisers, may already have a firm idea of the type of instrument they wish to build, and may like to construct a purpose- built case of wood or some other material. This is quite permissible, as the module housing does not require screening. M (0 c 0 E o c 0 o. o JZ o > a. c o 0 W U) c 1 o o Para biometrics Electronics on the verge . Biofeedback Relaxation generator slotless model car track part 4 elektor September 1977 - 9-E3 slofess model cat - hock pairlr 4 Readers may be wondering why no p.c. board layout has been given for a receiver, a description of which was given in the first article of the series. The reason is that the prototype receiver left something to be desired in terms of sensitivity and ease of tuning, and in consequence has been slightly redesigned. While the new design was being perfected it was felt preferable to start with the ‘business end’ of the car electronics and work backwards to the receiver, rather than giving a p.c. board for an imperfect circuit. Motor Speed Control The speed of the car drive motor is varied by altering the motor current. As the circuits must be fairly miniaturised it is not possible to use a series regulator transistor to vary the supply voltage to the motor, since this would dissipate too much power and would require a large heatsink. Pulse width control of the motor is therefore employed, which means that the motor is switched on at full power for some of the time, and switched off for some of the time, the on/off ratio depending on the position of the speed control joystick. The average motor current and hence the motor speed also varies proportionally to the on/off duty-cycle. The advantages of this system are that the motor switching transistor is either saturated or turned off, and thus dissipates little power, and that the motor is always driven at full power, so the maximum torque is available, for example, when starting. The principle of the system is shown in figures 1A to 1C. The upper waveform in each case represents the motor speed control pulse for a particular car, picked out of the multiplex pulse train that controls all the cars. As has already been discussed with reference to the multi- plex encoder and servo amplifiers, control is effected by varying the pulse width between one and two milli- seconds. The motor speed controller converts this into a drive pulse to the motor that varies from no pulse (figure 1A) through a pulse with a 50% duty-cycle (motor at half speed, figure IB) to full power applied to the motor all the time (figure 1C). Having described the servo amplifier in the previous article, the motor speed controller is discussed. This is followed by a description of the 'prop tester', which can be used to test servo amplifiers and motor controllers. Block Diagram A block diagram of the motor speed controller is shown in figure 2. Control pulses from the multiplex decoder aie fed to an inverter, whose output is use 1 to trigger a reference monostable (Ml ) that gives an output pulse of 1.1 ms duration. The inverted control pulses, together with the monostable output pulses, are fed to the two inputs of a NOR gate. This produces an output pulse whose length is the difference between the control and reference pulses as shown in figures 3 A to 3C. In figure 3A the control pulse is shorter than the reference pulse, so the NOR gate output remains permanently low. In figure 3B the control pulse is longer than the reference pulse and the NOR gate output remains high for 400 /is,, while in figure 3C the control pulse is at its maximum and the NOR gate output remains high for 900 /as. The next stage of the circuit consists of two current sources II and Ie, and j voltage comparator. Il provides a constant charging current for C3, but IE, which discharges C3, is switched on when the NOR gate output is high, and off when it is low. Ie is approximately thirty times II, which is an "nportar.t point to note. When the NOR gate output is permr- nently low (control pulse less than 1.1 ms) Ie will be turned off and C3 will charge to a voltage greater than U re f. The comparator output will thus be high and the motor drive amplifier (MDA) will be switched off, When the NOR gate output is high for its max - mum period of 900 /as (control pulse length 2 ms), C3 will discharge to zero with a current Ie during this period, the comparator output will go low and the motor will be switched on. During the interval between control pulses (23 ... 24 ms) C3 will be recharged at a current II- However, the voltage on C3 will never exceed U re f, so the motor will remain switched on until the next control pulse arrives. At intermediate settings of the speed control lever, C3 will not discharge quite so far during the high output period of the NOR gate. During the interval between control pulses there- 9-54 — elektor September 1977 slotless model car track ,“TT*“ :ji 1 n :TT n_ TfT .1 r :JT n fore, the charging current II will charge C3 above U re f, and the motor will switch off before the arrival of the next control pulse. This effect is clearly illustrated in figures 4a to 4f. Figures 4a and 4b show the normal and inverted versions of the control pulse, varying between one and two milliseconds, while figure 4c shows the reference pulse. Figure 4d shows the NOR gate output pulse varying between zero and 900 /as. Figure 4e shows the corresponding discharge and charge times for C3, and the comparator output. It is evident from this diagram that, as the length of the control pulse increases, C3 discharges to a lower potential and thus takes a correspondingly longer time to re-charge to the point at which the comparator output goes high and the motor turns off. Figures 5 to 9 show some oscillograms taken from the prototype, which further illustrate the operation of the circuit and may prove useful should any faultfinding be necessary. The circled Figure 1. The motor controller converts the 1-2 ms variation of the control pulse width into a motor drive pulse whose duty-cycle varies from 0 to 100%. The average motor current, and hence the motor speed, also varies from 0 to 1 00%. Figure 2. Block diagram of the motor con- troller. After each reference pulse C3 is discharged for a time equal to the difference between the control pulse and the reference pulse at a current lg * C3 then charges at a current II until the comparator threshold is exceeded, during which time the motor runs. Figure 3. A NOR gate compares the inverted control pulse with a reference pulse and gives an output pulse equal to the difference between the two. Figure 4. Showing how the discharge and charge times of C3, and hence the motor drive pulse width, vary with the control pulse width. Figure 5 to 9. Oscillograms illustrating the operation of the motor controller. The circled letters refer to the same waveforms in figure 4. letters refer to the corresponding wave- forms in figure 4. Figure 5 shows the control pulse and capacitor voltage with a control pulse length of 1 ms, while figures 6 and 7 show the capacitor wave- forms as the control pulse length is increased. Figures 8 and 9 show the capacitor waveforms and the compara- tor outputs corresponding to figures 6 and 7. Suppression One part of the block diagram remains to be explained, and this is the sup- pression circuit for the motor. Good suppression is essential, as any spikes occuring on the supply line could cause faulty operation of the receiver, multi- plex decoder, servo amplifier, or the motor controller itself. The suppression circuits which will be described should be adequate for even the (electrically) noisiest motors. Complete Circuit Figure 10a shows the complete circuit of the motor speed controller. T 1 is the input inverter, which also acts as a high impedance buffer for the multiplex decoder output, since this circuit can supply only a small output current. The output pulse from the collector of T1 is differentiated by Cl and R4 to give a series of spikes to trigger monostable T1/T3, D1 ensuring that triggering occurs only on the negative-going spikes. Outputs from the collectors of T1 and T3 are also taken to the inputs of the NOR gate comprising T4 and T5. T1 to T5 are contained in a CA3086 transistor array IC. The Ie constant current source is con- structed around T6, and is switched on only when the NOR gate output is high (T4 and T5 turned off) when current will flow through R12, R13, D2 and D3 to provide a positive base bias for T6. The II current source is built around T7 and provides a continuous constant cur- rent of around 600 /iA. This current determines the slope of the charging ramp, i.e. angle

L — h . 1 1 o iHibi-Jr X * i . l/p ft ).c 54 9C ““ y "‘[Ji 05 [i 4 “4 A (Vi ‘ BC 54 9C - LJ £J V T 9 V T: r J ,0. < The comparator comprises T8 and T9, the reference voltage being provided by the base-emitter ‘knee’ voltage of T8. The threshold voltage of the comparator may be adjusted by means of PI . The motor drive amplifier comprises T10 and Til, Til being the output transistor that carries the motor current. As this transistor has an open collector, i.e. it is not committed to the +5 V supply rail, the motor supply voltage connected to the racetrack can be chosen to suit any motor with which the cars are fitted. Motor Suppression Good motor suppression is vital, and no attempt should be made to skimp on this part of the circuit. The motor suppression components are shown in figure 10b. The chokes and capacitors provide r.f. suppression, while D6 short circuits the back e.m.f. of the motor, which performs the dual function of protecting T 1 1 and providing motor braking. The suppression components should be soldered as close as possible to the motor terminals, as shown in figure 1 Oc. Note that the junction of C5 and C6 is connected to the motor case. This sup- pression circuit should be adequate for most motors which are of reasonable quality and in good condition, but if extra suppression is required LI and L2 may be increased to 10 uH. Note that these chokes must be capable of hand- ling the full motor current (which can be up to 1 A) and should have a low resistance so that no significant voltage is dropped across them, as this would reduce the motor power. P.C. Board Figure 1 1 shows a p.c. board and twice fullsize component layout for the motor speed controller. The p.c.b. is of minia- ture construction, like the servo ampli- fier, and the same comments apply as regards assembly. T1 1 requires only a small cooling clip, which can be made from any odd scrap of copper or brass shim. slotless model car track part 4 elektor September 1977 — 9-57 List to figure 1 1 Resistors: R1 ,R2,R4 = 100 k R3,R7,R9,R16,R18 = 10 k R5,R6,R8 = 1 50 k R10.R11 = 33 k R12.R1 3 = 4k7 R14 = 27 ft R15.R19 = 1 k R17 = 330 k R20 = 1k2 R21 = 470 ft R22 = 220 ft PI = 250 k, lin preset Capacitors: Cl “In ceramic disc C2= lOnMKM C3 = 2u2/6 V tantalum bead C4,C5.C6,C8 = 22 n ceramic disc C7= 100 n MKM C9 = 47 p/6 V tantalum Semiconductors: IC1 =T1 . . . T5 = CA3086 T6 = BC547 Borequ. T7 = BC 557 Borequ. T8.T9.T1 0 = BC549 C or equ. Til = BC141 D1 ,D2,D3,D4,D5 = 1N4148 D6 = 1 N4004 Miscellaneous: L1.L2 = IpH heavy-duty choke Figure 10a. Complete circuit of the motor controller. Figure 10b. The motor suppression circuit, which cuts down interference pulses from the motor, and also protects the controller out- put transistor. Figure 10c. The motor suppression com- ponents must be soldered as close as possible to the motor terminals. Figure 11. Printed circuit board and com- ponent layout for the motor speed con- Figure 12. Block diagram of the 'prop tester', which can be used to test many types of servo amplifiers and motor speed controllers. Figures 13 and 14. Showing the waveforms at various points in the prop tester circuit. The Prop Tester In order to test and adjust the servo amplifier and motor speed controller without the need to connect up the entire transmitter/receiver system, a simple proportional tester has been developed. In addition to testing the Elektor circuits this can be used with any commercial servo amplifiers and speed controllers that operate on the same principle. A block diagram of the tester is given in figure 12. It consists of an astable multi- vibrator whose period can be switched between 20 ms and 25 ms. The negative- going edge of the output waveform triggers a monostable whose pulse width can be varied from one to two milli- seconds by means of PI. Normal and inverted versions of the monostable pulse are provided for feeding to the circuits under test, and the output level of these can be adjusted to find the threshold level of the circuit. A sync output for an oscilloscope is also provided. A centre-tapped, stabilised 5 V supply is provided to power the circuit under test, together with an unstabilised 1 2 V out- put to power the car drive motor. Figures 13 and 14 show the waveforms at various parts of the circuit. The circuit of the prop tester is given in figure 15. The astable and mono- stable are built around two 555 timers, while the inverters are T1 and T2. A 7805 IC regulator provides the 5 V stabilised supply, and IC4, T3 and T4 provide the low impedance centre tap. Adjustment of the Prop Tester An oscilloscope is extremely useful for adjustment of the prop tester. If a ‘scope’ is available, then all that is necessary is to use P3 to adjust the output pulse width to 1.5 ms, with PI set in its centre position. If no oscilloscope is available then the prop tester can be calibrated with sufficient accuracy using a steering servomechanism in conjunction with the servo amplifier for the car race track. The servo and servo amplifier are connected up and the input of the servo amplifier is connected to the slider of P2b in the prop tester. Before applying power PI and P3 of the prop tester are set to their centre positions and P2 is set to give maximum output. SI is set to the 25 ms position. Power is then applied and the servo should move to a position proportional to the pulse width. By adjusting P3 the servo can be set to its centre position, when the con- trol pulse width will be approximately 1.5 ms. P3 can now be scaled linearly 1 to 2 ms, while P2 can be scaled 0 to 5 V. Testing the Servo Amplifier Once the prop tester has been adjusted it can be used fully to test the servo amplifier and the motor speed control- ler. When testing the servo amplifier, first turn PI in the prop tester to its extreme left- and right-hand positions. If it is found that the control horns of the servo hit the end stops before these settings are reached then it will be Figure 15. Complete circuit of the prop Figure 16. Printed circuit board and com- ponent layout for the prop tester (EPS 9829-2). necessary to reduce the value of R8 and R16 in the servo amplifier from 5k6 to 4k7. Each servo amplifier must be matched to the particular type of servo with which it is to be used. Response Threshold The next step in the test procedure is to rotate PI of the prop tester back and forth, at the same time reducing the control pulse amplitude by means of P2 until the servo ceases to respond. The servo amplifier should not fail to respond until the control pulse ampli- tude has fallen below 2.5 V, Adjustment of the Motor Controller The motor speed controller and motor are connected to the prop tester and PI is set to 1 ms. Preset PI of the motor speed controller is set to its centre position, and power is applied to the circuit. The motor should remain stationary. PI is next set to 2 ms, when the motor should start. Preset P 1 is now adjusted until the motor runs at the riotless model car track part 4 elektor September 1977 — 9-59 maximum desired speed. It should be noted that, if a 12 V motor is used, this will occur when the duty-cycle of the drive pulses approaches 100%. If a lower voltage motor is used then full speed will be achieved at a lower duty- cycle. With lower voltage motors care should be taken not to overload the motor while making this adjustment. Potentiometer PI is now returned to 1 ms and is then turned slowly clock- wise. The motor should begin to run (under no load conditions) by the time PI has reached the 1.3 ms mark. Because of component tolerances it is possible that the motor may run errati- cally when set to maximum speed. This is due to the charging current of C3 being too low, and may be cured by reducing the value of R1 5 to 820 SI. M elektor September 1977 - 9-61 Portable direct-writing recorders A new range of portable direct- writing recorders combining precision pen-motor techniques with thermal writing is available from Gould Advance Ltd. The Gould Allco 8000 Series recorders use the high-contrast thermal writing technique and arc suited to a broad range of industrial, scientific and bio- medical measurement appli- cations. The recorders are ideal for unattended operation, and retain good trace quality at the lowest speeds. The 8000 Series includes six basic mddels with one, two, three, four, six and eight channels, with a choice of eight pushbutton- selected chart speeds ranging from 5 mm/min to 100 mm/s. All models can be supplied with or without preamplifiers, in a portable case or in a rack- mounted configuration. Interchangeable plug-in signal conditioners provide a wide measurement range, and include a true root-mcan-square level convertor, a thermocouple amplifier with calibrated zero suppression, a basic pre- amplifier with full-scale ranges from 50 mV to 500 V, a fre- quency-deviation convertor with centre frequencies of 50, 60 and 400 Hz, and a DC bridge pre- amplifier which also functions as a microvolt amplifier. All the signal-conditioning modules have fully floating input circuits for operation at up to 500 V off-ground at any sensi- tivity. High common-mode noise rejection allows operation in noisy environments with grounded, fully floating or off- pound signal sources. The recorders without pre- unplifiers accept direct inputs from external signal sources in the 0 - 5 V DC range. The input circuits are still floating and operate to 500 V off-ground. Full-scale pen position controls are standard. Channel width is 50 mm (40 mm for eight channels). A new servo-controlled penmotor is used to give a rectilinear trace of 99.5% linearity, with a fre- quency response of 50 Hz at 40 mm and 100 Hz at 10 mm. The recorders will operate in any position and in moving vehicles. A 1 2 V battery option is available in addition to 50 or 60 Hz mains operation. The chart drive may be controlled from the front panel or remotely, and event and time markers arc standard. Gould Advance Limited. Raynham Road. Bishop ‘s Stortford, Herts, CM 23 5 PF. (510 M) Triple-output modular power supply for microprocessors A new, triple-output power supply from Hewlett-Packard is designed specifically to power OEM microprocessor systems that need independently adjust- able and isolated voltages. The fully enclosed HP 62312D supply simultaneously provides three outputs with a wide latitude of voltage combinations for most commonly used microprocessors. The main output is rated at 4.75 V to 5.25 V at 3 A, whUe the other two each range from 4.75 Vat 0.38 A to 12.6 V at 0.6 A. All outputs are isolated from each other and from the chassis, providing the user a wide selection of polarities. These output ratings are obtained at up to 40°C, but the supply may be operated up to 70°C with derating. Output effects for source and load are listed as 0. 1 percent respectively. Periodic and random deviation is 1 mV rms, 3 mV p-p; 20 Hz to 20 MHz. The supply also features remote programming terminals to control the main 5 V output for margin testing. Input voltage taps can be changed by the user to cover the range of 104 VAC to 127 VAC or 208 V AC to 250 V AC at 48 to 63 Hz. Protection features include an internal AC fuse, fixed fold- back current limit and standard overvoltage protection on the main 5 V output (optional on the other two outputs). OEM price for the Hewlett- Packard 62 31 2D triple-output power supply is £83 each in quantities of 100. Hewlett Packard Ltd., King Street Lane. Winner sh, Wokingham, Berkshire, RGIl 5AR. (518 M) Gas Detector A range of instruments for the detection of accumulations of inflammable gas in the atmosphere, have been announced by ANACON Instruments Ltd. Based on new versions of the Taguchi semiconductor gas sensor, these instruments utilize modern circuit techniques which result in the reliable detection of gas concentrations which are well below explosive limits; that is, below 20% L.E.L. Further, the instruments can be preset to alarm at the extremely low levels demanded by safety in the presence of toxic inflammable gases such as carbon monoxide. The first instruments to be offered are the battery-operated hand-held versions, types 720 and 730. The smallest is the palm- sized 720, which has only an ON- OFF switch, and a push-button for testing the electronic alarm circuit. It contains a rechargeable Ni-Cd cell which powers the sensor for some 3 hours; and a 9-V battery which will run the electronics for up to a year of normal usage. This instrument is designed for the protection of those persons who must occasionally enter areas where gas might be present. The model 730 is rather larger, though still hand-held, and incorporates a battery condition meter which indicates the state of charge of the (larger) Ni-Cd cell. It also has a two-position switch which makes it partially selective to either hydrocarbons such as North Sea gas (methane), or light gases such as carbon monoxide. A third model type 750 is a mains-operated ‘GASTEC’ which can be permanently mounted in appropriate areas in industrial, commercial or domestic premises, and will audibly indicate the presence of an inflammable gas. Although an audible alarm is mounted on the instrument panel itself, one or more slave alarms can be positioned in other rooms of the building. The top-of-the- range model 750 includes audible and visual indication of both sensor and mains failure; and will run off its own internal supply for over an hour in the event of such a mains failure. This model can also be used as a gas concentration alarm in plants where potentially hazardous mixtures of inflammable gases are used as part of the industrial process. Anacon Instruments Ltd., St. Peters Road, Maidenhead, Berks. SL6 7QA (477 M) TTL 74 C'sDy TEXAS. NATIONAL IT 1 FAIRCh iHlililll'ilfSl LDEtc Sill |i jj i | : zt s ||. ■1 ? ri" T* ass, 11 11 B Pi s’ sTiite- iilMil 8-6 S? 3 , |- s | i! Ir I SI « 1 5 9 1 ;£::EI| SHI m: !l 5=35|' : XEROZA RADIO 306, ST. RAUL'S ROAD. HIGHBURY CORNER LONDON, N1 Telephone 01-226-1489 ™>v |ESf