PRECO ;C drummer t automatic rhythm generator Polaroid timer temperature compensated ctevefopmenyimer * contents elektor april 1976 - 403 elektor april 1 976 — 407 sei.eKTnr JSKTOTSEU CMOS ♦ afterburner = L0CM0S This article takes a look at the latest developments in logic circuit technology and explains the advantages of LOCMOS. Today's problems in logic design Not long ago, the designer had a rela- tively simple choice between available logic families to determine what speeds were available, and at what cost in power. In the last two or three years many new logic families have appeared, with overlapping specifications, making it much harder to decide which family comes closest to satisfying a given set of requirements. In the past, for high speed applications the choice was emitter-coupled logic (ECL) with gate propagation delays of one to three nanoseconds; the power dissipation was about 30 mW per gate. For industrial control systems and for peripherals of small computers, standard 7400 transistor-transistor logic (TTL) was the best; 10 ns delays were tolerable and 10 mW per gate power dissipation presented no problems. There was a great deal of flexibility and both small- and medium-scale ICs were readily avail- able. For low power, where speed was not important, the designer normally chose 74L, a low-power family that dissipated around one milliwatt per gate but could seldom be pushed faster than about 30 ns. With the knowledge that 74H was always there, for faster designs that would tolerate more power the designer settled for 5 ns and 20 mW per gate. Many new logic families have since ap- peared. Not only do their specifications overlap, but there is the difficulty of non-compatibility between families, so it is quite impossible to mix, for example, the low power capability of complementary -metal-oxide-semi- conductor (CMOS) with the nanosecond capability of emitter-coupled-logic on the same board. Power supply require- ments vary, too, drive capabilities are never the same, and so on. And now LOCMOS has arrived .... Before we look at the latest develop- ments in greater depth, let’s define precisely what we mean by the terms we use. Two basic technologies In semiconductor technology, the transistor, that tiny chip of crystalline material which amplifies or switches electrical current, is now a 25-year-old invention that began the solid-state revolution. Although still widely used as a discrete component , it is giving way to the integrated circuit in which many transistors, as well as diodes and other circuit elements are batch-fabricated on a single silicon chip in a series of photo- lithographic and diffusion steps. There are two fundamental processes for fabricating ICs. These are: • bipolar • metal-oxide-semiconductor (MOS). Bipolar processes Currently the most popular, the bipolar process is one of two fundamental processes for making integrated circuits. A bipolar IC is made up of layers of silicon with differing electrical charac- teristics. Current flows between the Figure 1 . Cross-sectional view of a MOS field- effect transistor. Figure 2. Schematic symbols for MOS tran- sistors. G - gate, O ■ drain, B ■ bulk (sub- strate). S = source. Figure 3. Complementary-symmetry inverter circuit using MOS transistors. Figure 4. Cross-section of a complementary pair showing the use of guard bands. 408 — elektor april 1976 SBIaEKTIH” SLBKTBP! ILEKTOrSBU layers when a voltage is applied to the junction or boundary between the layers. • Transistor-transistor logic (TTL) By far the most successful bipolar IC logic is transistor-transistor logic, which gets its name, as do other digi- tal IC product families from the way that the components are combined to form the logic elements. Digital ICs solve problems by manipulating electrical signals that represent bits of information. Basic TTL is a mature product, but faster and lower-power versions are expected to extend the life of TTL into the 1980s. • Emitter-coupled logic (ECL) Emitter-coupled logic is a 1 0-year -old bipolar digital IC family that uses a more complex design than TTL to speed up IC operations. Emitter- coupled logic is costly, power hungry, and difficult to use, but it could become important in the next generation of large computers be- cause it is four times faster than TTL. • Integrated-injection logic (I 2 L) Integrated-injection logic is the latest bipolar logic design. Although a number of successful circuits have been produced, it is still early days. For large scale integration (LSI), I 2 L enables over 1 000 gate functions to be integrated on a single chip. I 2 L technology also allows analogue and digital functions to be combined on the same chip. Metal-oxide-semiconductor (MOS) processes The second fundamental process for fabricating ICs is metal-oxide semi- conductor. The active area of a MOS chip is at its surface, where a gate electrode applies a voltage to a thin layer under it to create a temporary channel through which current can flow. • PMOS The oldest MOS circuit technology uses a channel of P-type material, where the flow of current is made up of positive changes. PMOS now accounts for most MOS volume. Be- cause the action in a MOS circuit is near the surface, contamination that would be minor in a bipolar device caused serious problems in the early days of MOS. • NMOS N -channel MOS, where the flow of current is made up of negative charges, is just now moving into pro- duction. It is two to three times r i oxide 'TTTUT nitride polycrystalline K. y 'A P -Si Si P+-Si gigra N -Si UK N+-Si ■■ Al selektor elektor april 1976 — 409 seusKTnr .eKTorseu Figure 5 ... 11. LOCMOS manufacturing Figure 12. Conventional metal gate CMOS. Figure 13. Silicon gate CMOS increases per- formence. Figure 14. Cross-section and top view of an inverter in LOCMOS technology. Silicon gate with local oxidation reduces chip area. 1 faster than PMOS circuits, but manu- facturing is harder to control than PMOS. These problems have now been overcome. • Complementary MOS (CMOS) In monolithic ICs using bipolar tran- sistors, it has not been possible to exploit the numerous advantages of complementary-symmetry circuits because conflicting technological fac- tors currently mitigate against the fabrication of optimized NPN and PNP bipolar transistors on the same substrate. However, the complemen- tary-symmetry circuit advantages can be harnessed in ICs by integrating compatible P-channel and N-channel enhancement-type MOS field-effect transistors on a monolithic substrate to create an IC that is as fast as an NMOS circuit but consumes very little power. CMOS circuits, in configurations which encompass both logic and memory, are excellently suited to use in digital cir- cuit applications and are characterized by their micropower quiescent oper- ation, moderately fast propagation delay, excellent noise immunity, large fanout capability, and operation from a single power supply over a wide voltage range (see Table I). The characteristics of CMOS logic and memory circuits are Flip-Flop Toggle Fre- comparatively immune to variations in temperature. Basic principles of MOSFETs The basic building block of CMOS logic circuits is the complementary pair MOS inverter consisting of a pair of N-channel and P-channel enhance- ment mode, insulated gate field-effect transistors (FETs) utilizing metal gate electrodes. Field-effect transistors combine the inherent advantages of solid-state devices (small size, low power con- sumption, and mechanical ruggedness) with a very high input impedance. Unlike bipolar devices in which per- formance depends on the interaction of two types of charge carriers, holes and electrons, field-effect transistors are unipolar devices, i.e., operation is basically a function of only one type of charge carrier, holes in P-channel devices and electrons in N-channel devices. Early models of field-effect transistors used a reverse-biased semiconductor junction for the control electrode. In MOS field-effect transistors, a metal control gate is separated from the semi- conductor channel by an insulating oxide layer. One of the major features of the metal-oxide-semiconductor structure is that the very high input resistance of MOS transistors (unlike that of junction-gate-type field-effect transistors) is not affected by the polarity of the bias on the control (gate) electrode. In addition, the leakage currents associated with the insulated control electrode are relatively unaf- fected by changes in ambient tempera- ture. Because of their unique properties, MOS field-effect transistors are particularly well suited for use in digital switching applications, as well as in linear voltage amplifiers and voltage- controlled attenuators. The operation of field-effect devices can be explained in terms of a charge- control concept. The metal control i electrode, which is called a gate, acts like a plate of a capacitor. A charge placed on the gate induces an equal but opposite charge in the semiconductor layer, or channel, located beneath the gate. The charge induced in the channel can then be used to control the conduc- tion between two ohmic contacts, called the source and the drain, made to opposite ends of the channel. The MOS type of field-effect transistor uses a metal gate electrode separated from the semiconductor material by an insulator. Like the P-N junction, this insulated-gate electrode can deplete the source-to-drain channel of active carriers when suitable bias voltages are applied. However, the insulated-gate electrode can also increase the conduc- tivity of the channel (enhancement) without increasing steady-state input current or reducing power gain. The two basic types of MOS field-effect transistors are the depletion type and the enhancement type. All CMOS cir- cuits are of the enhancement type. In this type, the gate must be forward- biased to produce active carriers and permit conduction through the channel. No useful channel conductivity exists at either zero or reverse gate bias. Because MOS transistors can be made to utilize either electron conduction (N- channel) or hole conduction (P-channel), two distinct enhancement-type MOS field-effect transistors are possible. An N-channel enhancement-type MOS transistor (reversal of N-type and P-type I regions would produce a P-channel l enhancement-type transistor) is nor- mally non-conducting until a sufficient voltage of the correct polarity is applied ! to the gate electrode. When a positive bias voltage is applied to the gate of an N-channel enhancement transistor, electrons are drawn into the channel region beneath the gate. If sufficient voltage is applied, this channel region changes from P-type to N-type and provides a conduction path between the N-type source and the N-type drain regions. (In a P-channel enhancement transistor, the application of negative bias voltage draws holes into the region below the gate so that this channel region changes from N-type to P-type and again provides a source-to-drain conduction path.) The CMOS inverter The CMOS inverter, shown in figure 3 works like this. With a positive supply voltage Vdd, if a positive voltage Vi is applied to the input (logic state *1’), then the N-channel transistor becomes conducting while the P-channel transis- tor does not conduct. The output volt- age is then zero (logic state ‘0’). If the input voltage is now made zero (‘0’), the P-channel transistor becomes conducting and the N-channel transistor is switched off. The output voltage is now Vqd (‘1’). The two MOS transis- tors therefore behave as switches, and the current in the circuit is determined by the very small leakage current of the switched-off MOS transistor. The cur- rent has a larger value only momentarily, during switching when both transistors are on for a short period. Advantages of CMOS circuits The advantage of a CMOS circuit is that the channel resistance values can be small and hence the switching speeds high, and the quiescent current and therefore the stand-by power is practi- cally zero. Other advantages of CMOS circuits compared with ordinary MOS circuits are the immunity to fluctu- tions in the supply voltage or in the in- put voltage. The sensitivity to input voltage fluctuations is low because the input voltage at which the circuit changes over from one logic state to the other is equal to about half the supply voltage, while the actual transition takes place over a very small range of input voltage. It is also easy to make a CMOS circuit compatible with other logic circuits such as TTL. Standard CMOS All these advantages would make CMOS transistors very suitable for use in integrated circuits, were it not for the fact that with the same tolerances the packing density is smaller than for ordinary MOS transistors. Protective guard bands surround separ- ate MOS devices, tunnels, wells, and diodes or combinations of MOS devices which are interconnected through com- mon diffused regions for the purpose of preventing leakage. All P-channel devices, tunnels, and diodes must be surrounded by a continuous N guard band which also serves as a tunnel to help conduct current from the external supply voltage Vdd across the N-type substrate to every P-channel device tied to the external supply. Similar heavily doped P* guard bands surround all N- channel devices, tunnels, and diodes to help conduct current from the external ground supply Vss across the P-well to every N-channel device tied to ground. Contact to the N-type substrate may be made through the N guard band and ;lektc elektor ril 1976 - 411 SBLBKTDr BKT M*si auBKTnrseu logic transistors output buffer returned to the Vdd pad; contact to the P-well substrate may be made through the P* guard band and returned to the ground pad. Guard bands may be narrow strips or, where space permits, large diffused areas that minimize resistance in the Vdd and VsS supply lines. Guard bands are also used to prevent parasitic channels thereby assuring complete device cutoff; this cutoff is accomplished by having the gate metal, as it leaves the end of the channel, cross a guard band prior to stepping up over the thick oxide. Summary of CMOS features • Low Power The net quiescent current, which is determined by the leakage current of the ‘off’ device, is in the barely percep- tible nanoampere region. Even when switching, little power is required since both transistors are only par- tially on. CMOS consumes less power than standard TTL by a factor of at least 10 6 under static conditions, when power dissipation per gate is of the order of only 1 0 nW . • High noise immunity CMOS has a near ideal transfer characteristic and an extremely sharp cutoff between a logic ‘0’ and a logic *1’. About four times better than TTL. CMOS logic circuits are finding their way into automobile appli- cations, and industrial process control where they can operate un- disturbed by high electrical factory • Wide supply voltage range Single power supply voltages from 3 to 1 5 V can be used with CMOS cir- cuits. In industrial use, this means that the expensive, close-tolerance power supplies can be eliminated in favour of a cheap unstabilized supply. As a replacement for TTL, CMOS is well known to be extremely cost-effective. But what is less known about CMOS is its ability to operate at fairly high speeds at increased but still moderate power consumption. In fact, CMOS has a lower propagation delay -power product than any other logic family. By oper- ating just below TTL speeds, medium- and large-scale integrated CMOS pack- ages can perform the same logic func- tions as TTL but with the added advantages of lower power-supply re- quirements, high noise immunity, and lower costs. However, being composed of comp- lementary structures, CMOS circuits require an additional device per gate in- put over other MOS structures as well as an additional isolation region. Conse- quently, they are only about a third as dense as other MOS devices, even though they are smaller than most Figure 15. Conventional, unbuffered two- input NOR gate. Figure 16. Conventional, unbuffered two- input NAND gate. Figure 17. Two-input NOR gate with buffered output in LOCMOS. equivalent bipolar structures. This tends to place CMOS in applications where low power is extremely desirable, where medium-scale integration can be used, and where high speeds are not essential - in other words, in the industrial and communications sector. CMOS + LSI + LOCOS = LOCMOS It has now been found that marked reduction in surface area can be ob- tained by using a local oxidation technique known as LOCOS ( LOCal Oxidation of Silicon) developed at Philips Research Laboratories, com- bined with a special technique for applying P-type wells. This process can be controlled in such a way that LSI circuits can be made. In the LOCOS technique, a silicon substrate is coated with a layer of silicon nitride, which is used as a mask in a later oxidation of the silicon when a silicon-dioxide layer is formed at the places where the nitride has been removed. Most of this ‘LOCOS’ oxide sinks into the silicon and gives good separation between regions of different doping. It takes up far less space than the conventional isolation diffusion. We shall now describe the process used for making CMOS circuits by the LOCOS technique — the ‘LOCMOS technology'. The starting material is a wafer of N-type silicon whose surface has the <100> orientation. A surface with this orientation generally has very few surface states, and little charge appears in the oxide grown upon it, this gives a low and reproducible threshold voltage. The wafer is first coated with a thin layer of silicon nitride, which is next removed at the places where the isolation oxide is formed, and the silicon is then oxidized until the oxide layer is 1 .8 pm thick (figure 5). The next step is to remove the nitride at the places where the P-islands for the N-channel transistors have to appear - this is done by standard photo-etching techniques. After this P-type regions are produced at these places by a special technique (figure 6). In this technique the silicon is doped with boron in such a way that the boron concentration at the surface has the value necessary for good operation of the MOS transistor, while the maximum of the concentration profile is located about 1 .5 pm beneath the surface. This approach prevents para- sitic N-type channels from forming along the LOCOS oxide. With this method there is no need to use guard bands. After the P-diffusion the rest of the nitride is removed, and a thin oxide layer is formed thermally. A poly- crystalline layer of silicon is then applied. Next the poly crystalline layer is doped with phosphorus to make it an N-type conductor, and a pattern is etched in it for the electrodes and a part of the interconnection pattern (figure 7); the doping is necessary to give a low series resistance to the conductors and hence a high switching speed. 412 — elektor april 1976 selektor SBLBKTnr BLBKTDr: BKTnrSBI.BKTnPSBLI The next step in the process is to produce P-type sources and drains by boron diffusion at previously etched openings in the oxide layer (figure 8). The gates and the LOCOS oxide serve as self-aligning masks. Since these elec- trodes are small the stray capacitances are small, which also helps to give a high switching speed. After the boron diffusion a thin oxide is again formed on these regions. The N-type sources and drains are next produced in a similar treatment, with a phosphorus diffusion (figure 9). A silicon-dioxide layer is then deposited pyrolitically, and openings are etched in this to allow contact between the electrodes and the interconnection pattern (figure 10). Finally, a layer of aluminium is applied by vacuum evaporation and the inter- connection pattern is formed in this by etching (figure 1 1 ). Improved packing density with LOCMOS Conventional metal gate CMOS is shown in figure 12. Here, the N and P guard bands surround the P- and N-channels respectively. In figure 13, silicon gate CMOS in- creases the performance due to gate self-alignment and reduced capacitance, but the required guard bands limit the savings in area. The result is a highly improved packing density and a higher internal speed. An additional advantage of silicon gate processes is the inherent facility of having two isolated layers (polysilicon and aluminium) for interconnection. It can be seen that the LOCMOS process is a very attractive one for large-scale integration. LOCMOS technology combines a silicon gate with local oxidation to reduce the chip area, as shown in figure 14, silicon dioxide replacing the guard bands. Because the LOCOS grows into the bulk of the silicon, the contact holes can overlap the LOCOS without fear that there will be a short circuit to the underlying substrate. This reduces the necessary diffusion area, thereby reduc- ing the drain capacitance. The self- alignment of the diffusions also makes any special clearances between the bl- and P-transistors unnecessary and the special diffusion profile built into the P-well makes any channel stopper diffusions superfluous. Disadvantages of older gate designs Figure 1 5 illustrates a conventional, unbuffered two-input NOR gate. One N- channel transistor, connected to the supply voltage, Vss, will conduct when either input is high, causing the output 20 6 t, L i 0 LOCMOS / , s CM OS ■0.1 «si 02 04 06 08 1 mo-» time Ivtl Figure 18. Typical transfer characteristics of CMOS and LOCMOS. Figure 21 . Comparison of transfer character- istics of TTL and LOCMOS. to go low through the on resistance of the device. If both inputs are high, both N-channel devices go on, in effect halving the on resistance and making the output impedance (and hence propa- gation delay) a function of input variables. Similarly, the P-channel devices are switched on by low signals; i.e., when both inputs are low, conduc- tion from the supply voltage, Vdd> to the output will occur. Now, since the P-channel devices are in series, their chip area must be enlarged so that their on resistance will decrease and hold the high impedance of the out- put within specification. And, as the number of gate inputs increases, even larger P-channel devices are required, causing severe variations of the output impedance with input patterns to VsS- For example, in unbuffered CMOS, the two-input NAND gate as shown in fig- ure 1 6 interchanges parallel and serial transistor gating to achieve the dual logic function. The change in output resistance moves to the P-channel tran- sistors connected to Vdd, while the N-channel devices, being serially con- nected, must be increased in size. Needless to say. this sensitivity of propagation delay to input pattern can cause all sorts of mysterious system problems — for example , errors may occur only with certain data patterns. Older designs, therefore, have several disadvantages: • Since logic transistors are also output devices, they must be large enough to supply full output drive current. • Output impedance (and hence propagation delay) is a function of input logic conditions (speed is pattern sensitive). • Output transition time is a function of input transition time. • Noise immunity is not as good as theoretically possible. To minimize any pattern sensitivity of propagation delay and to standardize delay and output drive, the new oxide- isolated design concept adds an output buffer stage to the gate configuration (figure 1 7). This technique actually re- duces chip size, since now only two large output transistors are required, and it also improves noise immunity because the increased voltage gain results in nearly ideal transfer character- istics. The high voltage gain of greater than 10,000 also provides significant pulse shaping, since output transitions are independent of input rise and fall Buffering provides the following advantages: k Figure 19. LOCMOS output fall time is almost independent of input rise time. Figure 20. LOCMOS output rise time is almost independent of input fall time. LOCMOS uses low impedance buffers selektor elektor april 1976 — 413 seuiKTnr blektiip! • standardized low impedance outputs • propagation delay is less dependent on input logic pattern or transition times • propagation delay less sensitive to capacitive loading • better noise immunity • only two large output transistors are required • decreased input capacitance Characteristics of buffered design Typical transfer characteristics shown in figure 1 8 clearly indicate that a buffered gate is almost ideal. Figure 19 shows that with a buffered gate, the output fall time is almost independent of the input rise time. Figure 20 shows that the buffered gale output rise time is almost independent of the input fall time. LOCMOS system considerations • propagation delay • noise immunity • power supply requirements • power dissipation • input characteristics • interface to TTL Propagation delay LOCMOS d.c. fanout is almost unlim- ited. Fanout is therefore limited by propagation delay effects. Propagation delay depends on load capacitance; it is strongly influenced by supply voltage; and it is affected by ambient temperature, but less so than TTL. To determine the propagation delay : • Start from basic data sheet numbers. • Derate for capacitance load over 15 P F. • Derate for minimum power supply voltage including regulation and ripple effects. • Derate for maximum ambient tem- perature. Noise immunity The superior noise immunity of LOCMOS comes from its almost perfect transfer characteristic, as shown in fig- ure 2 1 . Good noise immunity is typically 45% of the supply voltage. Noise immunity is expressed by : VNL = VlLmax Vol max VNH = VOHmin Vih min LOCMOS has higher noise immunity than any other logic family. One limitation of LOCMOS noise immunity comes from coupling from external noise sources. The amount of noise cur- rent required to switch a LOCMOS device is actually quite low, because the input impedance is high (Table II). Table II TTL (high) TTL (low) LOCMOS Vdd * 5 v LOCMOS V DD = 10V Typical output impedance 100ft 10 ft 400 ft 200 ft Typical noise immunity 1.5 V 1 V 2.5 V 5 V Noise current required to induce noisi 15 mA 100mA 6.25 mA 26 mA Power supply requirements LOCMOS is specified over an operating Vdd range of 3 to 15 V. This intro- duces cost saving possibilities unavail- able with other logic forms. LOCMOS can operate from batteries, unregulated power supplies, and available non-logic power supplies. The minimum Vdd is 3 V, or higher as required for noise immunity or propagation delay. The maximum Vqd is 1 5 V, or lower as determined by power dissipation. Both minimum and maximum values of Vdd depend on the interface to other logic forms. Power dissipation The total power dissipation may be determined from: total power = quiescent power + transient power AC power is made up of 3 components 1 . Charging and discharging of internal capacitance. 2 . Current which flows during switching when both N and P transistors are conducting. 3 . Charging and discharging of load capacitance. The transient power dissipation effects of internal capacitance and current spiking may be lumped and are given in data sheets. Figure 22 shows the power dissipation per gate against input fre- quency for different supply voltages. The effects of additional load capaci- tance, beyond that shown in the data sheets may be calculated by: load power = CL(VDD) 2 f. where Cl = external load capacitance and f = frequency of operation. The total power, therefore, will be: total power = Idd • Vqd + internal transient dissipation (from data sheet) + CL(VDD)'f. Interface to TTL Two constraints must be satisfied when interfacing to another family. 1 . Input voltage levels to LOCMOS should be as close as possible to Vgs for logic ‘0’ and Vqq for logic T. 2. The LOCMOS outputs must be cap- able of driving the necessary current and voltage requirements of the interfacing circuit. 414 - elektor april 1976 selektor seLEKTor BLBKTnr: BKTDrSBLBKTIirSBIal For standard TTL driving LOCMOS, • Vih(MIN) for LOCMOS must be 3.5 V • v OH(MIN) for standard TTL is 3.5 V typical at vcc = 5 V. Therefore standard TTL will typically drive LOCMOS directly. For CMOS driving TTL, all LOCMOS outputs drive 400 pA at 0.4 V over the full temperature range. All inputs are protected against static discharge, as shown in figure 23. Due to the resistor being in series with the input protection diodes, an input signal from a low impedance source can be applied in the absence of supply volt- age without damaging the diodes. Summary of LOCMOS Advantages of CMOS • very low power • wide supply voltage range • high noise immunity. Philips’ LOCMOS offers in addition: • LOCOS techniques - reproducible high performance • buffered, standardised outputs sim- plify design • best noise immunity • decreased sensitivity to capacitive loading • a gate packing density twice as great as conventional CMOS • higher speeds Standard range The Philips standard range of LOCMOS devices already consists of some 60 types. Motorola are also starting production, with 5 types available so far. N. V. Philips Gloeilampenfabrieken Elcoma Division P.O. Box 523, Eindhoven - the Nether- lands. Figure 22. Variation of power dissipation for a typical gate with input frequency for dif- ferent supply voltages. Figure 23. All inputs are protected against static discharge. 27-Channel ultrasonic remote control unit Motorola have just announced a CMOS 27-channel ultrasonic transmitter and a companion NMOS receiver which together form a complete remote control system for television and other applications. The system is used in conjunction with a 22-button keyboard to give a viewer remote control of all the user-variable functions of a tele- vision receiver. When used in conjunction with a tele- vision receiver, the ICs allow remote selection of up to 12 channels, three 60-step analogue channels, automatic switch-on when channel is selected, automatic muting of sound during channel change and switch-on, two auxiliary outputs, dual switching outputs (PAL or SECAM) and a strobe output for use with on-screen displays. Used with a 22-button keyboard, an external amplifier and transducer together with a battery and about a dozen discrete components, the CMOS MCI 4422 transmitter forms a complete ultrasonic transmitter for the remote control of television receivers. When none of the push-buttons is actually pressed, the IC automatically reverts to a shut-down state in which power consumption is reduced to such a low level it was unnecessary to provide an on/off switch. The MCI 4422 generates up to five output frequencies which are transmitted in an output sequence which lasts for four time periods. During the final slot or period, one of two frequencies may or may not be transmitted. A non-integral variable frequency divider is used to derive the output frequencies from an on-chip LC reference oscillator. These lie in the range 34,688 to 42,755 Hz. An RC oscillator, running at a much lower frequency, determines the speed at which the keyboard is scanned and the length of the output sequence. The NMOS receiver (MC6525) is based on the superheterodyne principle and has multiple repetitive verification of the received code to further increase system security. With a sensitivity of 250 mV r.m.s. the MC6525 can be driven from a relatively low gain pre- amplifier. Reset of the receiver logic is performed automatically when the MC6525 is re-powered. Motorola Ltd. Semiconductor Products Division. York House Empire Way Wembley, Middlesex. microprofessor elektor april 1976 — 415 micropnofessor That's life. Valves or tubes are distinctly passe' - except where they are used for control- ing the flow of fluids or gasses. Schools and technical colleges have switched over to transistors. A brave step, but by now the price of TTL ICs has dropped to an all-time low (a 7400 costs the same as a BC107), COSMOS prices are still falling rapidly, and both TTL and COSMOS may well be laid by the heels in the near future by one or more of the other new technologies (Low Power Schottky TTL, LOCMOS, I 2 L, etc ). And now: over the horizon looms the microprocessor .... Nearly all self-respecting manufacturers of semiconductors have designed a sys- tem, improved it, and are now trying to force it down the throat of the poor consumer. System prices have dropped within the last year from over £ 150 to nearer £ 20 (one manufacturer is offering the MPU itself at £ 5-10,000 up), and they will probably go down even further in the near future. This would be very nice, if only the prospective buyer knew what to do with the things. They are available in quantity and diversity, they are rela- tively cheap, and they will do the job for him - if only he knew what job that was. There’s plenty of hardware, but very little software. Or, to put it differently: we are being presented with a solution, and now we have got to start looking for a problem. Of course, we have some idea of what kind of problem to look for, because we know that a microprocessor can be programmed to perform quite complex functions. In the more ‘domestic-consumer- oriented’ field one could consider an on- board controller for fuel-injection, anti- skid braking etc. in cars; electronic games; musical instruments; a program selector cum commercials rejector for radio and TV. However, none of these ideas seems to come anywhere near the true capabili- ties of the system, although everyone feels that some really worth-while applications must exist. A (welcome!) avalanche of applications is to be expected within the next year or two - certainly if the present-day blizzard of data sheets is anything to go by. We are waiting for the person who can show us how to use the things properly: the microprofessor. And we are waiting - with a mixture of fear and anticipation - to see what new technology lies in store for us next year. radio-tv-electronic 1975, Nr. 11). The preamplifier and control amplifier described in this article offer high performance at low cost. Furthermore, the control amplifier (with volume, treble, bass, balance and stereo 'width' controls) can be used as a small hand-held 'remote control' unit. The connection to the main equipment can be almost any length of four-core screened cable. T. Meyrick part 1 Remote control is becoming the done I thing. For toy cars, television sets, model I aeroplanes or gantry cranes, remote I control is either essential or useful or I simply has ‘gimmick’ value. Depending I on the application and on the amount I of money available, the remote control I link can be wireless (i.e. without wires) I or it can be a sufficient length of wire, I cable or string. For domestic Hi-Fi equipment, remote I control comes in the ‘useful’ category: I for instance, setting the stereo balance I no longer entails five or six trips between I the listening position and the main I equipment. On the other hand, for most I people it will not be worth a dis- proportionate sum of money. For this . reason, a relatively cheap type of link was chosen for the system described here: four-core screened cable. This in turn has led to a somewhat unconven- | tional layout of the various units, as illustrated in the block diagram (fig- i ure 2). In conventional circuits (figure 1), the input selector switch is usually at the input to the control amplifier (B). In that case, one of the inputs that it can select is a disc preamplifier (A) that raises the output level of a magnetic cartridge to that of the other input i sources and provides the IEC (R1AA) equalisation. The input selector switch is followed by a volume control and a buffer stage driving the tone controls. I In the design described here, the power J elektor april 1976 supply arrangements for the control amplifier are complicated enough — it would be even more inconvenient if a buffer stage had to be included between the volume and tone controls. The solution chosen is to use a low-value volume control potentiometer, suitable for direct connection to the tone con- trol circuit, and put the buffer stage at the input side of the volume control. The buffer stage can now be combined with the preamplifier and powered in the normal way. A further advantage of this system is that the long cable is now driven from a low-impedance source. However, the system is now beginning to depart quite drastically from standard practice. Referring back to the block diagram, figure 2: the fact that the buffer stage and preamplifier have been combined (A) means that all input signals must be fed to this combination. The input selector switch must precede the preamplifier, so the latter must be capable of coping with both high and low level signals. To do this, it will need additional switching inside the feedback loop. This complication can be turned into a further advantage: the circuit can be optimally matched to any normal input source, by selection of fixed resistors and/or equalisation networks. In this way, an extremely good signal- to-noise ratio and a very large overload margin can be achieved. The next point to be considered is the actual link to the remote control unit (B). Since the complete control amplifier is to be included in this hand- held unit, one would normally require two screened cores for the input, two screened cores for the output, and two wires for supply positive and common. If a little care is taken in the design, the screen of the cable can be used for 2 Figure 1. Block diagram of a conventional preamplifier / control amplifier system. The preamplifier is only used for magnetic car- Figure 2. Block diagram of the Preco. All inputs are fed via attenuators to the pre- amplifier (A); the control amplifier (B) is connected to the preamplifier via four-core screened cable. supply common. This means that five- core screened cable would be required. However, four-core screened cable is more readily obtainable — it is used for the connection from a tape recorder to a main amplifier system — so some way must be found for eliminating one more of the connections. The solution chosen is to use a ‘phantom’ power supply. To put it simply - a more detailed description will follow later — the col- lector resistors and output coupling capacitors of the final stage of the con- trol amplifier are mounted on the pre- amplifier board. This means, in effect, that the positive supply and the output of the control amplifier can both run down the same core; a separate connec- tion for the positive supply is no longer required. The description of the system given so far may give the impression lhal the circuits are quite complex and sophisti- cated - which should in turn mean that 418 — elektor april 1976 3b the system is either critical or expensive or both. In actual fact, only six transis- tors are used per channel for the com- plete system (preamplifier and control amplifier), see figure 3. When so few components are used for a fairly complicated system, it is to be expected that several compromises are incorporated in the circuit. Performance will normally suffer. In actual fact, the specifications of this system are so good (table 1) that it is definitely a good choice even for those who are not looking for remote control facilities: there is no reason why both units should not be mounted in one box for use as a conventional system. Preamplifier The basic design requirements for the preamplifier have been outlined above. To recap briefly: all input signals are to be fed to this unit, and it is to be matched to the input sources by using fixed attenuators at the input and further switching in the feedback loop; furthermore, it must have a low-im- pedance output to drive the long cable and the tone control circuits. The amplifier used will need something more than two transistors! The require- ments are: plenty of open-loop gain, even when looking into a low-impedance load, and the ability to supply enough Figure 3. Circuit diagram of the Preco (one channel shown). The preamplifier (figure 3a) is described in this article; the control ampli- fier (figure 3b) will be discussed in part 2. elektor april 1976 — 419 current into that load. A fairly heavy- duty output stage is required. Figure 3a shows the circuit. R1 to R5 are the input attenuators, followed by the input selector switch (Sla). This will be discussed in detail further on. The input transistor (Tl) is a PNP type, and it is set at a fairly low collector current (100 pA). In this way, excessive low-frequency (y) noise is avoided and an extremely high signal-to-noise ratio is attainable. The voltage across R7 and R9 is the base-emitter voltage of Tl, i.e. approxi- mately 550 mV. Since the current through these resistors is practically identical to the current flowing through R8, the total voltage drop across R9, R7 and R8 is also fixed: approximately 3 V. The collector current of this tran- sistor is set by the value chosen for R20, since the voltage drop across this resistor must also be approximately 550 mV. The value given (R20 = 5k6) sets the collector current at 1 00 pA. This current flows through the DC feedback path (R1 1 and R12) and gives a voltage drop across these resistors of approximately 8.5 V. This means that the DC voltage at the output (emitter of T3) is fixed at approximately 3 + 8.5 = 11.5 V. This setting is relatively independent of supply voltage variations. The ‘heavy-duty’ output stage consists of transistors T2, T3 and T4. T2 and T3 can be considered as one ‘super-transis- tor’ and T4 is a gyrator-choke which supplies the DC collector current, so that the AC collector current is all available for driving the load and the feedback loop. The ‘super-transistor’ has one or two little quirks. Its effective transconduc- tance (this is the ratio between output current and input voltage) is enormous, so that with any reasonable load it will give an extremely high voltage gain (thousands). This means that the internal feedback cannot be neglected: the input impedance is drastically reduced and Miller effect due to the collector-base capacitance of T2 will cause an early open-loop roll-off. Neither of these quirks have any serious consequences - provided one is aware of them! A current source could have been used as collector load for the super-transistor. In the circuit actually used, T4, R17, R18 and R21 do behave like a current source set at approximately 5 mA. How- ever, adding C9 gives the circuit a more choke-like behaviour, so that the pre- amplifier is relatively insensitive to ripple on the power supply. Furthermore, when power is first applied the circuit ‘starts up slowly’ without producing a sudden transient. The components R22 . . . R26, C12 and Z1 are really part of the control ampli- fier, so they will be discussed later. The remaining components (R 1 0 ... R16, C3 ... C7 and Sib) constitute the feed- back loop. Matching to the signal source As mentioned previously, the preampli- fier is matched to any given signal source by means of the input attenuator and a switch in the feedback loop. It is now time to study exactly how this is done. In position 1 of the input selector switch, only the basic feedback network is in circuit. This consists of two sections: R1 1 , R12, R13, C4 and C5 on the one hand, and R10 with C3 on the other. Basic star-delta transformation of the first section shows that this is equivalent to a 130 k resistor between the emitters of Tl and T3, loaded at T3 emitter by an extra 42 k resistor to supply com- mon. The influence of the capacitors is neglected for the moment. Neglecting C3, R10 (68 k) is connected in parallel with the simulated 42 k resistor, giving a total resistance of 68 k/42 k »» 26 k. This means that the basic gain is approxi- mately 6. This basic gain is sufficient to prevent common-mode overloading of the first transistor: the nominal input sensitivity is approximately 30 ... 40 mV. High level input sources are switched via suitable input attenuators; the values shown (R1 = 100 k, R2 = 10 k) will give a sensitivity of approximately 400 mV. Capacitor C2, in conjunction with R7 and R9, provides an HF bypass and a step roll-off in the open-loop gain. C4 gives a further roll-off. A high-sensitivity ‘flat’ input (e.g. micro- phone) is obtained by omitting the input attenuator and increasing the closed-loop gain. As an example, con- sider the situation with the input selector switch in position 2. R3 is replaced by a wire link, and R4 could be, say, 3k3 for a low input impedance. Simultaneously, R14 will be switched into circuit via Sib. If a value of 3k3 is chosen for R14, the gain will be set by the simulated 1 30 k resistor and the simulated 42 k parallel with R10 and R14 - i.e. approximately 2k9. The gain becomes approximately 45, giving a sensitivity of 4 ... 5 mV. Very low values for R14 (below about 330 fl) will provide very high sensi- tivities - and audible noise. A better solution in this case would be to use a microphone transformer. Position 3 of the input selector switch is for use with magnetic cartridges. R5 is used to set the correct input im- pedance. The feedback network now includes R15, R16, C6, C7 and C8. These components give two of the equal- isation time constants; the third is determined by this network in conjunc- tion with Rll, R12, R13. R15 sets the sensitivity of this input; the value given (270 fl) gives a nominal input sensitivity of 5 mV, suitable for most ‘high-output’ cartridges. A lower value for R15 (down to 68 S2) gives a higher sensitivity (to 1.25 mV), and a higher value (up to 470 S2) gives a lower sensitivity (to 9 mV). By applying the same principles, it would be possible to provide equal- isation for tape reproduction. No pro- vision for this will be made on the p.c. board, however. One must draw the line somewhere! The second part of this article will give a description of the control amplifier, p.c. boards, construction and intercon- nection details. M 420 — elektor april 1976 ic rhythm generator ic rhythm generator In the Summer Circuits Issue (July/August 1975) a brief description was given of the SGS IC rhythm generators type M252 and M253. This article deals with the applications of these IC's in greater detail, including their connection to simple instrument generator circuits suggested in the SGS application notes, and also interfacing with the 'Minidrum' described in Elektor Nos. 2 and 3. A more sophisticated rhythm generator, constructed from standard logic IC's, is planned for a future issue. 1 The rhythm generator of an electronic percussion unit is that section of the unit which generates control pulses to trigger the various instrument sound generators, in predetermined sequences appropriate to the preselected rhythm. It does not, of itself, generate the instrument sounds, so a complete per- cussion unit must contain a rhythm generator plus instrument generators to produce the required noises. The rhythm generator must be capable of producing pulses at various points in the bar, to trigger the tone generators in the appropriate sequence. It follows, therefore, that the rhythm generator must contain a clock pulse generator and counter capable of dividing the bar down into basic time elements. Each beat in the bar will consist of a whole number of these basic time elements. Obviously, the more time elements there are to each beat then the more complex are the rhythms that can be produced. For example, in a rhythm with a 4/4 time signature there are four beats to the bar. If the beat was divided into only one basic time element one crotchet in length, then the rhythm instruments could be triggered at only four points in the bar, and the number of rhythm patterns available would be very limited. With a basic time element of one quaver the bar could be divided into 8 elements, with a semiquaver 1 6 elements, with a demisemiquaver 32 elements. The smaller the basic time element, the more subtle are the rhythms that can be produced. The total number of time elements in a bar depends on the number of elements per beat, and the number of beats per bar. Thus in 4/4 time, with 8 elements per beat there would be 32 per bar, but in 3/4 time there would be only 24. The counter in the rhythm generator must be capable of being programmed to count up to the appropriate number that the time signature demands before resetting to commence the next bar. The division of a bar in 4/4 time into time elements is shown in figure 1. Table 1 gives 3 examples of rhythms being divided up into basic time el- ements. The basic block diagram of a rhythm generator is given in figure 2. It consists of a counter, count logic and a read only memory. The count logic is pro- grammed by the rhythm selection input code, and determines the number that the counter reaches before resetting to zero. The ROM is addressed by the rhythm selection input code and the output of the counter. Thus as the counter counts through its sequence the contents of all the addresses through which it counts are read out in se- quence. If the content of a particular address is a logic ‘1’ then when the counter reaches that address a ‘1’ will appear on the appropriate instrument output line, and the instrument will be triggered at that point in the rhythm sequence. The positive-going edge of the output from the memory determines the instant at which the instrument is triggered. If two successive outputs of the memory were ‘1’ (i.e. the instru- ment was triggered twice in quick suc- cession) then normally the output would initially go to ‘1’ and stay there for two time elements, so the second triggering edge would not occur and the instrument would be triggered only 422 — elektor april 1976 ic rhythm generator Figure 8. Rhythm selection encoding for the M252 with diode matrix and selection switches for 15 rhythms (R1 ...R15). Figure 9. Encoding circuit for the M252 with TTL-IC's and 15 rhythm selection switches. Figure 10. Similar circuit to that of figure 9, but using CMOS-IC's. Figure 11. The SPDT switches of figure 10 can be replaced by single-pole normally open switches and 100 k resistors. once (see second waveform in figure 3). To avoid this the output of the memory is reset to zero after the instrument has been triggered, and should the next output from the memory be ‘1’ there will be a second positive-going edge to re-trigger the instrument (see third waveform of figure 3). IC Rhythm Generators Figure 4 shows the internal block dia- gram of the M252 rhythm IC, the pin configuration of which is given in fig- ure 5. Pulses from the clock pulse generator are fed into a phase generator that produces two out -of -phase, non- overlapping pulse trains, which are re- quired to control the following divider stage. This divider produces the reset pulses that reset the memory outputs back to zero after each readout. The width of the reset pulse is dependent on the mark -space ratio of the clock signal. The output of the first divider is used to clock a further 5 stage counter (divider) consisting of master slave flip-flops. This can count up to the maximum of 32 re- quired to divide a bar of 4/4 time into 32 elements. The outputs of the divider are decoded and used to address the ROM, which in this case is simply a matrix. The inputs (rows) of the matrix are connected to the 32 outputs of the decoder, while the outputs (columns) are arranged in 1 5 groups of 8 outputs each. The 15 groups correspond to the 15 rhythms that the IC will produce, and the 8 outputs correspond to the 8 instrument outputs that the IC can drive. Which of these 15 groups is actually connected to the instrument outputs is dependent on the rhythm selected. The number of the rhythm selected is fed into the rhythm select inputs in binary, is decoded and used to control the multiplexer that routes the appropriate group to the output logic and drivers. The counter reset logic is controlled by a rhythm detector, so that where the rhythm is in 3/4 time (or 6/8) the counter is reset after 24 clock pulses. For rhythms in 4/4 or 2/4 time the counter is allowed to achieve its maximum count of 32. Pin 7 of the IC is a combined input/ output connection. As an input it func- tions as an external reset to return the counter to zero from any point in the bar. As an output it provides a down- beat signal to indicate the first on-beat in the bar. The input and output func- tions may be isolated by means of a rhythm generator elektor april 1976 — 423 Table II diode in the external reset line. In the case of time signatures other than 3/4 or 4/4, the downbeat output can be used to trigger a monostable, the output of which then provides the actual down- beat signal. The rhythm selection is made by feeding a four bit binary-coded signal into pins 1, 2, 5 and 16. Table 2 gives the codes for each of the 1 5 rhythms that the IC can produce. When the input code is 1 1 1 1 no rhythm is produced and the instrument outputs are inhibited. The counter still counts to 32 however and the downbeat signal is present. The M253 functions in a similar manner to the M252, but, whereas the rhythm selection for the M252 is made in binary, the rhythm selection for the M253 is made by applying a logic ‘0’ to one of 1 2 rhythm selection inputs. The storage matrix of the M253 has a ca- pacity of 32 x 8 x 12 = 3072 bits, as opposed to the 32 x 8 x 15 = 3840 bits of the M252. The M253 is capable of producing only 12 basic rhythms, as opposed to the 15 produced by the M252, although by applying a ‘0’ to more than one input simultaneously various mixed rhythms may be pro- duced, which is not the case with the M252. Electrical Characteristics The static and dynamic electrical characteristics and absolute maximum ratings of the M252 and M253 are given in tables 3, 4 and 5 respectively. All voltages given in these tables are refer- enced to Vss> which may be any con- venient value with respect to ground. The actual value of Vss is unimportant, 424 -elektor april 1976 ic rhythm generator Table III Static characteristics (positive logic, Vqq = -1 1 .4 V ... -12.6 V. V§ T a mb. = 0 . . . +70°C, if not otherwise stated' = +4,75 V . . . +5.25 V. Parameter Test conditions min. typ. max. Units CLOCK INPUT V|n Clock 1 -level V|i_ Clock 0-level V SS -1-5 v gg Vss Vss -4.1 > > DATA INPUTS V|h Input 1 -level V|l Input 0-level ll_| Input current V| -V S S -10 V Tamb. - +25°C v ss -is V GG vss Vss -4.1 10 EXT. RESET Vin Input 1 -level V|i_ Input 0-level V SS -1-5 VQG v ss Vss -4.1 < < DATA OUTPUTS Rq output impedance Vqh Output 1 -level ILO Output leakage Vss -1 V s +20 V then Vgg must not be below 0 V. If Vss is 0 V then Vgg mu st not be below —20 V. Where the rhythm IC is to be combined with other logic circuits requiring a positive supply voltage it is common practice to set Vss ( = ^CC) = +5 V and V D D = — 12 V. None of the absolute maximum ratings given in table 5 must ever be exceeded, even for short periods. This applies equally in both the positive and negative sense. Taking the clock input (figure 7) as an example (the same consideration applies to all other pins), while it is essential that the input voltage should never become more negative than 20 V below Vss. >t is equally important that it should never become more positive than Vss, even by a small amount, as otherwise the surrounding negative areas on the chip will be discharged and the circuit will not function reliably. Should the voltage exceed Vss by more than 300 mV then the IC will almost cer- tainly suffer permanent damage . Interfacing This section is intended to show various possibilities for practical applications of the rhythm IC, including interfacing with various types of instrument tone generator circuit. Rhythm Selection Selection of the desired rhythm in the case of the M252 can be carried out in several ways: Table IV Dynamic characteristics (positive logic. Vqg = -11.4 V 2.6 V, +4.75 . . . 5.25 V. T amb 0 . . . +70°C, if not otherwise stated. Parameter min. max. Units CLOCK INPUT f Clock frequency 0 100 |,H, t p Pulse width 1 5 t r Rise time 2 100 t a Decay time 2 100 /is EXT. RESET t p Pulse width 5 /is 1 at 50% of the maximum amplitude. 2 between 10% and 90% of the maximum amplitude. Table V Absolute Limit Values Vqq Supply voltage 3 -20 V . . +0.3 V Vj Input voltage 3 -20 V . . +0.3 V lO Output current (per output) 3 mA T$ Storage temperature -55°C . . + 1 50°C T amb. Operating temperature 0 . . +70°C 3 related to voltage Vss 1 . programming in straight binary using 4 single pole on-off switches. This is the simplest method in terms of circuitry, but the codes for each rhythm must be remembered or noted down. 2. diode-matrix encoder from l'-bf-15 to binary (figure 8). The rhythm is selected by a single pole 16-way switch (can be rotary or 15-way dependent latch pushbutton bank). This is encoded into binary by the diode matrix. Using a rotary switch the 1 6th position would not be connected, so all inputs would be held high by the 100 k resistors and no rhythm would be selected. Using a 15-way pushbutton bank, the same would be achieved with no push- button depressed. The diodes used are type 1N914 (1N4148). Any other type with reverse breakdown voltage greater than 20 V and reverse leakage cur- rent less than 1 //A at 18V would also be suitable. 3. l-of-15 encoder using logic IC’s (figure 9). This is the circuit of a decoder using TTL logic IC’s. With no switches depressed the inputs of all the 8-input NAND-gates are high, the outputs are low, so the outputs of the inverters are high and no rhythm is selected. When a switch is depressed the inverter outputs assume the appropriate binary input code. An open collector inverter 1C such as the 7405 should be used in this circuit, as the high output state voltage is not then limited by the saturation voltage of the output tran- sistor and diode as it is with a ‘totem- pole’ output stage. For the 8-input NAND-gates four 7430 IC’s would be suitable. Another encoder circuit is shown in figure 10. This makes use of MOS IC’s. In this case changeover switches are used to switch the inputs be- tween the ‘0’ and ‘1’ states (single- pole switches and 100 k pullup re- sistors could also be used [fig- ure 1 1 ]). Pullup resistors are not required at the outputs of the NOR- gates, however, as the high output voltage of CMOS is practically equal to supply voltage. IC’s type 4012 would be suitable for the 4 input NAND gates (four IC’s required), and for the NOR gates one IC type 4001 would be suitable. Clock Generator Figure 12 shows the circuit of a clock generator and downbeat indicator using I TTL IC’s and discrete components. An IC type 7400 can be used for the four 2-input NAND-gates. The frequency of | the clock generator can be adjusted be- tween about 3 and 30 Hz by means of the 25 k potentiometer. The downbeat indicator is a monostable consisting of a NAND-gate and transistor, and a second transistor that drives the indicator lamp or LED. The downbeat indicator lamp lights for about 350 ms on the first beat of each bar. The reset switch grounds [ the inputs of two NAND-gates, which inhibits the clock output and puts a ‘1’ on the clock and reset inputs. The TTL IC’s receive their supply voltage from Vcc ( + 5 V) and ground (0 V). A second approach to the design of a clock generator and downbeat indicator is shown in figure 13. Here the clock generator is constructed around a high level logic (HLL) monostable IC type HI 17. The clock frequency can be varied between about 5 and 30 Hz by ! means of the 100 k potentiometer. For the NAND-gates an HLL IC type HI 02 can be used. The HLL IC’s derive their supply voltage from the +5 V and —12V supplies. The downbeat indicator lights for about 350 ms at the start of each bar. Finally, figure 14 shows the circuit of a j clock generator and downbeat indicator constructed entirely from discrete com- ponents. The clock frequency of this circuit can be adjusted from about 5 to 30 Hz by means of the 10 k potentio- meter. In this circuit also the downbeat indicator lights for about 350 ms at the beginning of each bar. Instruments A simple circuit for the simulation of percussion instruments is given in fig- ure 15. It consists, essentially, of a twin-T oscillator whose loop gain is adjusted by means of the 25 k potentio- meter so that it just fails to oscillate. It then becomes effectively a high-Q resonant circuit that can be excited by a pulse from the rhythm generator fed into the input. Since the potentiometer adjusts the Q of the circuit it affects the time for which the circuit will ring after the input pulse has been applied, and hence the duration of the instrument elektor april 1976 — 427 rhythm generator Figure 20 and 21. Using two custom IC's, in this circuit the first 1C plays the first half of the bar, and the second 1C the second half, thus doubling the number of time elements per bar. Figure 22. Automatic control of the rhythm generator by an organ keyboard or pedal- generator for CMOS-gate as instruments, using a i element instead of Figure 24. Circuit of the noise generators, pre- amplifier and power supply of a complete percussion unit. Photo A. The five smaller instrument printed circuit boards are mounted on the base printed circuit board. Only four instruments are required for the M253, as this 1C has no conga drum output. With the component values given the circuit simulates the sound of a bongo. By changing the capacitance values the circuit can be made to simulate many other instruments such as bass drum, conga, woodblocks etc. Instruments that make use of filtered noise, such as cymbals and maraccas will be described later. Extensions In principle the number of rhythms can be doubled by connecting in parallel the instrument outputs of two rhythm IC’s. This is shown for the M252 in figure 16 and for the M253 in figure 17. The rhythm selection for the M252’s is made by means of a 5 -bit binary input instead of the four-bit input required for one IC. The most significant bit is used to select one 1C or the other by controlling the external reset input, and the other four bits select the rhythms in the normal way. For the M253’s rhythm selection is simply a question of pro- viding a programming switch with 24 positions instead of 12. The above, of course, applies only to custom programmed versions of the IC, since the two IC’s must have different rhythm patterns programmed into them. The standard versions of the IC obtainable on the retail market are available only with the standard pro- gramming shown in table 2. In a similar manner, using custom pro- grammed IC’s the number of instru- ments can be extended to 16 by using two IC’s programmed with the same rhythms but with different instrument outputs. This is shown in figures 1 8 and 19. In this case the rhythm select inputs of the two IC’s are connected in parallel. A third possibility is to use two custom programmed IC’s to increase the maxi- mum number of time elements per bar to 64 , as shown in figures 20 and 2 1 . In these two circuits the first half of the bar is played by the first IC, the second IC being inhibited by the Q output of the flip-flop, which holds the external reset input high. The downbeat output of the first IC then clocks the flip-flop so that the Q output goes low and the Q output goes high. The external reset input of the first IC is thus held high, inhibiting it, while the second IC plays the second half of the bar. At the end of the bar the downbeat output of the second IC clocks the flip-flop back to its original state. Rhythm Generator and organ An electronic percussion section is fre- quently built into an electronic organ, and it is useful in such a case to have the percussion unit controlled by the organ. Figure 22 shows a common method of achieving this. The parts of the circuit enclosed in dotted boxes are portions of figures 24, 25 and 26. The 741 op amp is the instrument output amplifier of figure 24 (IC3), while the two NAND-gates form part of the clock generator and reset circuit in figures 25 and 26 (N4 and N5). The rhythm generator is usually con- trolled by series connected contacts on the pedalboard of the organ, and the ic rhythm generator elektor april 1976 — 429 control can operate in several modes: j i with the stop switch closed the rhythm generator is reset and the clock is stopped. ii with the stop, touch, and continu- ous/silent switches open the rhythm generator runs continuously. iii with the continuous/silent switch open and the touch switch closed the rhythm generator will be reset until a pedal is depressed, when it will start. Obviously, as soon as the pedal is released it will be reset again, so the pedal note must be sounded for the whole of a bar in order to obtain the complete rhythm. iv with the continuous/silent switch closed and the touch switch open the rhythm generator runs continuously but the instruments are heard only when a pedal is depressed, as at other times the output of the 741 is shorted to ground. In this case the downbeat indication must be used to synchronise the organ with the rhythm generator. Note that the continuous/silent and touch switches should not be depressed simultaneously, as otherwise the output of the 741 will interfere with the clock. Complete Percussion Section Having discussed the various possi- bilities, the circuit of a complete per- cussion section is given in figures 23 to 26. The unit contains percussion instru- ments of three kinds: 1. Those whose sound is a damped oscillation of a particular frequency i.e. high bongos (HB), low bongos (LB) , bassdrum (BD), conga (CD) and claves or woodblocks (CL). 2. Those whose sound is derived by filtering white noise to achieve a particular spectrum i.e. long cymbal (LC) , short cymbal (SC) and maraccas (MR). 3. Those whose sound contains both a damped oscillation and filtered noise, i.e. snaredrum (SD). As mentioned earlier the first class of instruments is simulated using a twin-T oscillator circuit with insufficient gain to maintain oscillation. When this is excited by a control pulse from the rhythm generator it produces a damped oscillation that decays at a rate de- pendent on the loop gain of the oscil- lator. In the final circuit of the per- cussion unit a CMOS gate is used as the active element in the oscillator instead of a transistor. This circuit is shown in figure 23. The control pulse from the rhythm 1C is fed in at point A. R1 acts as a pull-down resistor for the ‘open-drain’ outputs of the rhythm IC. The control pulse is differentiated by C 1 and R2 and is then fed into the twin-T oscillator via R3 and D 1 . D 1 ensures that the oscillator cir- cuit is affected only by the positive- going edge of the pulse, as during the negative-going edge D1 is reverse-biased. If D1 were not present then the oscil- lator would be severely damped by the negative-going edge of the pulse. To produce the different instrument SB ic rhythm generator sounds only C2, C3 and C5 need to be varied to alter the frequency of oscil- lation. The values of these components for the different instruments are given in the parts list. PI varies the damping of the oscillator and hence the rate at which the instrument sound decays. The outputs of the instrument gener- ators are fed out through mixing re- sistors (R8) to the output amplifier IC3 in figure 24 (point B). The values of R8 are different for the various instruments to obtain the correct relative amplitude for each instrument. The white noise for the second class of instruments is derived from the reverse- biased base-emitter junction of an NPN transistor (T2 in figure 24). This junc- tion exhibits avalanche breakdown (like a zener diode) at between 5 and 9 volts in most cases, and, like a zener diode, it generates noise. The manner in which the noise signal is switched depends on the particular instrument to be simulated. In the case of the long cymbal the control pulse charges up C14 and turns on T4. The noise signal from the slider of P2 is applied to the base of T4 via C8. Filter- ing of the noise is achieved by the inductor L2 in parallel with R25. The impedance of this increases at high frequencies, so the gain of this stage increases with frequency, which means that the high frequency components of the noise signal are amplified more than the low frequencies. When the control pulse finishes, the voltage on C14 decays exponentially - so T4 gradually turns off. The short cymbal operates in more or less the same manner, but Cl 5 is smaller than C14, so the decay and turn-off is more rapid. The characteristic of the cymbal sound is thus a fairly rapid attack followed by a more or less gradual decay. elektor april 1976 — 431 1 The amplitude of the maraccas sound builds up relatively slowly and then decays. The reason for this is that C16 is charged up fairly slowly via D5 and R23, so T4 turns on gradually. When the control pulse ends Cl 6 discharges through R24 into the base of T4, and T4 gradually turns off as the voltage on Cl 6 falls. The snaredrum makes use of both an instrument oscillator and a noise signal. The snaredrum control pulse is fed to the base of T1 via C25, and is also fed to the oscillator via D2. The same oscillator is also used for the high bongos, so D2 provides isolation to prevent the high bongo control signal from triggering the snaredrum noise circuit. When the control pulse turns on Tl, C6 is charged via D3 and R10;T3 is then turned on by the voltage on C6, allowing the noise signal on C7 to be amplified by T3. The collector re- sistor R13, LI and C9 form a filter to modify the spectrum of the snaredrum noise. The noise amplitude is controlled by P2, and the relative amplitudes of the snaredrum noise and the other noise instruments are set by P3. The noise signals are fed, together with the other instrument inputs at point B, into the output amplifier IC3. rhythm generator Figure 31. Printed circuit board and com- ponent layout for the circuit of figure 25. This printed circuit board (EPS 91 10) has already been published in the 'Summer Cir- cuits' issue July/August '75. Figure 32. Printed circuit board and ponent layout for the circuit of figui (EPS 9344-3). 26,32 220 £2 3k9 2M2 22 k 10k 220 k 100 k UuUiUiii LED DUS CD401 1 M252AA LED DUS CD401 1 M253AA Miscellaneous: Single Single pole pole normally normally open open (SPST) (SPST) Single - pole normally (SPST) - Single pole, change- (SPDT) Single pole, Single pole. (SPOT) (SPDT) elektor april 1976 -433 ic rhythm generator Hie output amplitude can be controlled by P6, and P5 functions as a treble cut control to modify the tone of the instruments. The lower section of figure 24 is the power supply for the percussion section. It makes use of an IC voltage regulator and two simple series stabilizers, and requires little explanation. Clock generator and rhythm IC Figure 25 shows the circuit of the clock generator and downbeat indicator as used with the M252, while figure 26 shows a similar circuit for the M253, the only difference between the two being the rhythm selection switching. The clock generator and downbeat mono- stable in these circuits make use of CMOS NAND-gates. PI adjusts the clock frequency. The stop switch SI is arranged so that the first beat of the bar occurs immedi- ately the switch is opened. If the switch J is closed than the reset input is held high by N4 and the output of the clock I (N5) is also high. When the stop switch is released the reset condition is re- moved and the clock generator immedi- ately gives a negative-going pulse, starting the rhythm sequence . The downbeat indicator consists of a monostable (N2 and N3) to lengthen the short downbeat pulse available from the downbeat output of the 1C so that it can be seen, together with a driver stage (N1 and Tl) to switch the LED 1 . S14 is provided to give a choice between snaredrum and woodblocks. Normally the snaredrum would be used for rhythms 1-9 of the M252, and those rhythms selected by inputs 7-13 of the M253, while the woodblocks would be switched in for the remaining rhythms. This is a question of personal taste, however. Alternating Bass A facility found on the M253 but not on the M252 is the output BA (pin 3) for control of the alternating bass of an electronic organ. A circuit for this purpose is shown in figure 27. The organ bass note and a note a fifth higher are fed into the circuit. Whenever a BD control pulse appears, but no BA control pulse then the fundamental is allowed through to the output. When both the BD and BA control pulses occur simultaneously then the fifth is allowed through to the output. The result is alternating fundamentals and fifths on each beat of the bass drum. Interfacing with minidrum Although the foregoing circuits may be assembled as a complete automatic per- cussion section, some readers may wish to interface the rhythm section of this system with the ‘Minidrum’ described in Elektor Nos. 2 and 3, rather than using the instruments described here. This can easily be done as the rhythm section is on a separate p.c. board from the instruments. Interfacing with the minidrum is ac- complished using the circuit of fig- ure 28. A simple diode OR gate permits either manual or automatic operation. One such circuit is required for each Minidrum instrument. The gates are connected between the outputs of the manual TAP and the trigger inputs of the instruments. Construction of complete percussion section The p.c. board layouts for the rhythm generator section of the percussion unit are given in figures 31 (M252) and 32 (M253). The instrument section board layout is given in figure 30. Although the CMOS gates for the instrument oscillators are mounted on this board the frequency-determining components are mounted on small ‘daughter-boards’ (see figure 29 and photograph A) so that they can easily be changed for ex- perimentation with different instrument sounds. The connection points A to E on the daughter-boards correspond to similar connection points on the mother-board. Similarly, the instrument outputs of the rhythm section board line up exactly with the corresponding inputs on the mother-board, so these two boards may be mounted side-by- side and joined by short links. As a final note, a special 16-position switch with binary coded outputs is available for rhythm selection using the M252. This is not, so far as we are aware, available in the U.K. but it may be obtained from a German firm - Komp, Ing-Buro H.G. Hullen, 4019 Mannheim, Heinrich-Spath-Str. 12-14. K References: ‘Minidrum ’ Elektor 2, p. 208, and Elektor 3, p. 428; SGS application notes for M252 andM253. elektor april 1976 Polaroid tir Polaroid timer The development of Polaroid films is temperature dependent. For monochrome film the development time varies, whereas for colour film the exposure varies and a 'cold-clip' may have to be used. The timer described here has a temperature sensor, so that it will indicate how and for how long films should be developed. As owners of Polaroid cameras will know, Polaroid film is temperature sen- sitive. Monochrome film must be devel- oped for varying times depending on the temperature. The new colour film (‘Polacolor 2’) has improved develop- ment time latitude and may be devel- oped for 60 seconds at ambient tem- peratures between 18 and 32 C (65- 90°F). At temperatures above 32°C the exposure control on the camera must be turned one mark towards ‘darken’. At temperatures below 18°C the exposure control must be turned one mark towards ‘lighten’ and the ‘cold-clip’ pro- vided with the camera must be used. At temperatures below 13“C the exposure control must be turned two marks 1 towards ‘lighten’ and the cold-clip must d be used. Development time is 60 sec- onds in all these cases. The more expensive versions of Polaroid cameras have built-in development timers, but not a thermometer! The timer described in this article per- forms several functions: 1 . it provides a temperature dependent development time for monochrome , prints. 2. It provides a 60 seconds development , time for colour prints and indicates the required setting of the exposure control, and if the cold-clip is re- quired. Operation of the timer is quite simple. The basic timer is a 555 in the mono- stable mode. With S2 in the colour pos- ition it provides a 60 second interval. Temperature control is provided by a NTC thermistor which forms part of a bridge circuit. The bridge is balanced by PI at 21°C. Any increase or decrease in temperature will cause an imbalance which is amplified by op-amp ICla. The imbalance voltage is applied to the con- trol voltage input of the 555 to increase or decrease the development time. The voltage is also applied to three op-amps connected as comparators. When the temperature is above 32°C the voltage on the inverting input of IClb will be less than the reference voltage on the non-inverting input, so LED 4 will light, indicating ‘exposure control 1 mark darken’. Between 18 and 32°C no LEDs will be lit, below 18°C the voltage on the -t-input of IClc will exceed the volt- age on the -input, so LED 3 will light, and below 13°C LED 2 and LED 3 will be lit. For monochrome film, the development time depends on the ambient tempera- ture and on the type of film. When S2 is set in position ‘monochrome’, the setting of the timer is controlled by the output of ICla. Construction and adjustment Various options are offered as far as the L Polaroid timer elektor april 1976 —435 construction is concerned - the choice will depend on how much of a perfec- tionist the constructor is! First the values of R12 and R13 must be chosen. These depend on the type of monochrome film chosen : - for type 87, R12 is 820 £2 and R13 is lk2; - for type 107, R1 2 is 270 Q. and R13 is lk5. Adjustment now proceeds as follows: First set the correct development time for colour: - set S2 in position ‘colour’; - adjust P3 so that the development time is 60 seconds. Now set the monochrome timing. For this there are two possibilities, an easy way (A) that should be accurate enough for all normal use, and a more difficult procedure (B) for the perfectionist. We idvise procedure ‘A’ , . . . A: the easy way: - use a fixed 12 k resistor instead of PI; - temporarily, replace the NTC by a fixed 18 k resistor; - set S2 in position ‘monochrome’; - adjust P2 to give a development time of 90 seconds (for film type 87) or 45 seconds (for film type 107); - replace the NTC resistor. I: for perfectionists only: - heat the NTC to 21°C (70°F); - set S2 in position ‘monochrome’ and adjust PI until the correct develop- ment time is achieved (45 seconds for film type 87 or 22.5 seconds for | film type 107), the output ofICIa should be almost exactly half the | supply voltage - the NTC bridge is in [ balance ; 1. The complete ciri lit diagram of the Figure 2. The p.c. board and component layout (EPS 9379). Temperature is important: The temperature of the film and the film holder at the time of processing has an important effect on the picture, although the film may be exposed successfully at any temperature. When the temperature is below 70° F (21 °C), process for longer than the standard time, as indi- cated in the chart, below. Processing below 35° F (2°C) is not recommended. TEMP. C. F. 24° 75° 21° 70° 18° 65° 10° 50° 7° 45° o TIME (sec.) Type Type 87 107 30 15 45 22.5 60 30 90 45 120 60 Parts list Resistors: R1,R6,R15 = 10 k R2 = 100 k R3 = 15 k R4 = 6k8 R5-18k R7,R8,R9,R1 1 = 680 12 R10 = 4k7 R 1 2 - 820 J2 (or 270 12. see text) R13 « 1k2 (or 1k5, see text) R14 = 1 k PI - 12 k (fixed) or 22 k (preset), see text P2 = 470 k (preset) P3 ■ 1 M (preset) Capacitors: Cl = 100/i/10V C2 = 100 n Semiconductors: IC1 = LM324 IC2 = 555 D1 . . . D4 = LED - cool the NTC to 10° C (50°F); - adjust P2 until the correct develop- ment time is achieved: 90 seconds for film type 87 or 45 seconds for film type 107. The advantage of method B is that it compensates for any tolerance in the nominal value of the NTC (this is why PI was added in the first place!). How- ever, a brief calculation shows that a 10% error in NTC value will give ap- proximately 18% error in the develop- ment times, which is within the latitude allowed by the film. Even 20% spread in NTC value gives ‘only’ 36% spread in the times, corresponding to an error of some 2°C (4°F) in the temperature measurement. A final word on the construction: the NTC must be at ambi- ent temperature, of course, so it should not be mounted inside the (closed) box. The power supply can be very simple: the circuit draws relatively little current, and any supply voltage from 9 to 15 V can be used - without need to readjust the trimmers. M The f irst part of this article dealt with universal, variable voltage regulators, and in particular the 723. The second part discusses the three-pin, fixed voltage 1C regulators. These were first introduced as 'on-card' stabilizing for TTL circuits, and thus the first generation of these IC's were 5 V regulators. Now whole families of three-pin regulator IC's have been introduced with a wide choice of preset output voltages. This article deals with applications of these regulators, and also with ways of extending their voltage and current capability. part 2 Fixed Voltage Regulators These regulators IC’s are intended to provide a stabilised supply capability with the minimum of external components. Consequently there are no connections for frequency compen- sation, current limit or voltage adjust- ment, all these functions being per- formed on the chip. The number of pins required is therefore reduced to three, input, output and common. The regulators operate on the principles already outlined in the discussion of the 723. They almost invariably incorporate foldback current limiting. The newer types also incorporate thermal shut- down, which turns off the output tran- sistor if the chip temperature becomes excessive (usually +16S°C). The most recent types have so-called “safe area limiting’, which prevents ihe output stage from going outside its safe power dissipation. The range of devices available is now quite large, and the output voltages commonly available range from +5 to +24 and -5 to -24 volts at currents from 100 mA to 3 A. Tables 1 and II give some idea of the range of types available, although they are necessarily incomplete and will probably be out of date by the time this article is in print, since new developments are taking place continuously. Basic circuits using 3-pin regulators The use of three-pin regulators is sim- plicity itself, and the two circuits for positive and negative regulators are given in figures 1 and 2. The only ad- ditional components required are a transformer, fuse, bridge rectifier and reservoir capacitor. To reduce output noise and ripple, and to eliminate any tendency to r.f. instability tantalum capacitors Ca and Ce may also be included. Having chosen the appropri- ate IC for the intended application, calculation of the other component values is relatively simple using a little arithmetic and guesstimation. Component Values As an example let us consider the case of an audio preamplifier requiring a V] power supply of +24 V at 60 mA. From Table I the LM 78L24 appears to be suitable, as this will provide +24 V at up to 100 mA. The TO-5 package is the most suitable as this can easily be fitted with a cooling clip. The pinout of this device is given in figure 9 (1). It is worth noting at this point that manufac- turers have not agreed on a pin connec- s tion standard for the use of packages into voltage regulator applications, as can be : i seen from the different pin connections a to the TO-5.TO-3 and TO-220 packages n in figure 9, so beware! Referring to Table I it can be seen that _ the input voltage range of the IC lies between 27.5 and 38 V. The choice of an input voltage too close to the lower [ limit should be avoided, as a drop in the mains voltage could easily cause the 1C to come out of regulation. On the other hand, working too close to the upper limit will mean that the voltage dropped across the IC, and hence the power dissi- pation. will be high. A reasonable compromise is to choose the mean of the two voltages, which in this case is . elektor april 1976 - 437 Figure 1. Basic circuit using fixed positive volt- Figure 2. Basic circuit using fixed negative voltage regulator. Figure 3. Increasing the output voltage of a fixed voltage regulator by raising the potential of the common pin. Table 1. A representative range of fixed posi- tive voltage regulators. Table 2. A representative range of fixed nega- tive voltage regulators. i l around 33 V. Transformer secondary voltages are specified as RMS (root mean square) values, so the required transformer secondary voltage for a D.C. voltage of around 33 V is: v sec=^ volts = 23.3 V V2 Of course, to be absolutely correct one should allow for the voltage drop across the bridge rectifier, which is about 1.4 V. In the event, the nearest com- monly available secondary voltage is 24 V, so the D.C. output voltage will be: Vd.C =24V2 - 1.4 = 24 x 1.414 - 1.4 = 33.6 - 1.4 = 32.2 which is a little on the low side. In practice, of course, due to toler- ances in the transformer and differences in nominal mains voltage up and down the country the figures after the decimal r int are meaningless anyway, and 32 V quite a good enough approximation Ito the required value. 'For calculation of the reservoir capaci- tance the rule of thumb 2200 /i per ampere of output current is useful, so in this case (allowing for the maximum 438 — elektor april 1976 integrated voltage regulators 100 mA output capability of the regu- lator) 220 n would be adequate. How- ever, in the case of an audio preamplifier a low hum level is desirable, so a larger value, say 1000 n 40 V, would be chosen to reduce the ripple level. The ripple rejection of the LM 78L24 is quoted as 30 dB min., 43 dB typical at 120 Hz (USA line frequency = 60 Hz), but these figures apply equally well to UK conditions (line frequency = 50 Hz, ripple frequency = 100 Hz). Ripple rejection can further be improved by inclusion of a tantalum capacitor across the output, as mentioned earlier. This may have a value between 1 ji and \0 H and will give an improvement of several dB. The use of a tantalum ca- pacitor is recommended by all manu- facturers of 1C voltage regulators, since tantalum capacitors have a lower inductance than aluminium types. The input capacitor Ce is only necess- ary if the IC is some distance (in terms of lead lengths) away from the reservoir capacitor. This is particularly the case with ‘on card’ stabilizing, where a single transformer may supply several racks of logic p.c.b.’s, each with its own regu- lator IC. The above gives a brief idea of the con- siderations involved when designing with regulator IC’s, but in particular cases the manufacturers data sheet should always be consulted, as this gives F ’9 ur much more information than can poss-"£ s ^ ibly be given in Tables I and II. Variation of Output Voltage ccui Although the choice of output voltages available should prove adequate foif-gur most applications, there will be some* 0 " 04 cases where the required voltage is not®* ° found in the standard range. In such*" cases a regulator with a lower output^^ voltage may be used, and the voltage^^ may be increased by taking the common*,,^ connection to a higher potential than ground. The total output voltage willpigui then be the normal output voltagefcma (which is maintained between output and common connection) plus the set voltage. ^ tor The required effect can be obtained by^ e connecting a potential divider between the output and ground, with the com- mon pin of the IC connected to the junction of the divider resistors (fig- ure 3). When the output of the IC is un- loaded the IC itself draws a quiescent current, which flows out of the common pin. This will flow through R2. There is also a contribution to the current through R2 from the output via Rl. If the quiescent current of the IC is known it is thus a relatively simple matter to calculate the required values of Rl and R2 for a particular output voltage. The total output voltage V 0 = V 2 + V 2 where Vi is the nominal output voltage: of the IC and V 2 is the voltage drop 1 across R2. Now V 2 = (I q + I, )R 2 where I q is the quiescent current and Ij is the current! through Rl. But Ii Therefore, equation: substituting in the first + (iq + iqK 2 The disadvantage of this method is thatpa the quiescent current of the IC must be* known, and it can vary between differ-W ent specimens of the same IC. For in-Il stance the quiescent current of theB TBA 625A is quoted as being between*! 5 mA and 16 mA. There are two ap-fce proaches to overcome this difficulty .T1 One can measure the quiescent current br by inserting a milliammeter in series ft' with the common pin, then calculate o the values of Rl and R2. This method isH' clearly only suitable for ‘one-off’s’.^- Alternatively one can calculate the values^ of Rl and R2 for a typical value offe quiescent current, then allow some ad-**' justment with a potentiometer, as in>! figure 4. Of course a drawback of either method* 5 is that one of the main advantages of li- the fixed voltage regulator i.e. the* 5 known, preset output voltage, is thrown*' away as soon as any adjustment has to* 5 be made. For the best results Rl should^ be chosen so that the current through it*> is at least equal to the quiescent current fl of the IC. voltage regulate elektor april 1976 -439 1 Figure 4. Substitution of a preset for R2 per- mits adjustment of the output voltage and allows compensation for variations in 1C quiescent current. The foldback current limit still operates satisfactorily when using this Figure 5. If an op amp connected as a voltage follower is used to increase the output voltage the operation of the circuit is independent of the 1C quiescent current. Figure 6. Increasing the output current of a fixed voltage regulator by an external ‘current dumping' power transistor. Figure 7. Current limit protection for the ex- ternal power transistor. Figure 8. An example of a dual voltage regu- lator using fixed positive and negative regu- lators. The diodes protect the regulators in the event of shorts between the supply lines. J In the circuit of figure 4, for example, a particular specimen of the TBA 62 5 A was used which had a quiescent current of 10 mA. Thus to give 10 mA through Hi, R1 is 500 J2, so 470 was chosen as the nearest preferred value. With PI set at minimum the output voltage is the nominal 5 V output of the IC. With |P 1 at maximum resistance 20 mA flows through it so 5 V is dropped across P 1 . |The total output voltage is thus +10 V, so the adjustment range is from +5 to + 10 V. Using this circuit the foldback current limiting is still operative, as the graph in figure 4 shows. The foldback character- istic is shown for normal 5 V operation of the IC (R2 = 0), and for R2 = 200 S2. It can be seen that at the higher output voltage the current folds back to a slightly lower value. The maximum out- put current of around 130 mA is unaf- fected, although 10 mA of this is, of course, lost through R 1 . Another method of increasing the out- put voltage of fixed voltage regulators, which does not require knowledge of the quiescent current of the IC is shown in figure 5. This makes use of an op amp connected as a voltage follower. The output voltage of a follower is, of course, equal to the input voltage, so the voltage at the slider of P 1 is the same as the voltage at the ground pin of the regulator. This voltage is 5 V below the output voltage of the regulator, so the voltage at the slider of PI is also 5 V below the output voltage. With PI at minimum the output voltage of the op amp is zero, so the stabilised output voltage is simply the nominal output voltage of the regulator. With PI at maximum 5 V is dropped across R2. The maximum output voltage is thus: R1 is included to sink a portion of the quiescent current from the ground pin of the regulator, since the source or sink current of the 741 is 10 mA maximum. Note that to achieve zero volts at the ground pin of the regulator the op amp must be able to sink the total quiescent current of the regulator IC. This may not always be the case, depending on the quiescent current of the IC used. Hence, in figure 5 the minimum output voltage is shown as 7 V. The maximum input voltage, and hence the maximum out- put voltage, is limited by the supply voltage which may safely be applied to the op amp, in this case 36 V. Although the examples given in figures 3, 4 and 5 used 5 V regulator IC’s, there is no reason why other types should not be used. Increased output current The output current capability of fixed voltage regulators can be increased by the use of external power transistors, though the principle of operation is' different from that used with the uni- versal type of regulator. Figure 6 gives an example of how this is achieved. At low output currents the total output current flows through the 3 f2 resistor and through the regulator IC (neglec- ting quiescent current). When the current reaches about 200 mA the volt- age drop across the resistor is about 0.6 V, so the external power transistor integrated voltage regulators 440 — elektor apr starts to turn on, and a portion of the output current is ‘dumped’ through it. The external power transistor in figure 6 has no current limit protection, and a short circuit on the output will almost certainly destroy it. Current limiting can fortunately be included by the addition of a single transistor and current sensing resistor, as shown in figure 7. For an output of 10 A R$ should be chosen as about 0.06 £ l . At this current 0.6 volts will be dropped across R s , so T1 will start to turn on and short out the base drive to T2, thus limiting the output current. When designing such circuits using ex- ternal power transistors it is essential to ensure that the external power transis- tor starts to turn on at a fairly small proportion of the maximum output current rating of the regulator IC. The reason for this is fairly obvious. If the external transistor does not turn on until the 1C is fairly near its maximum output current then it will limit at only a slightly higher output current. As a typical example, the base emitter re- sistor for the external power transistor might be chosen so that the IC supplied 20% and the power transistor 80% of the total output current. Dual Voltage Regulators Dual voltage regulators to provide posi- tive and negative power supplies for such things as op amps can easily be assembled using positive and negative fixed voltage regulators, as in figure 8. This is an example of a power supply suitable for op amps, but other voltages may of course be used, and the positive and negative voltages may be different. Where the positive and negative supply are supplying the same circuit e.g. an op amp, then the two protection diodes must be included across the output. These will safeguard the supplies in the event of a fault condition such as a posi- tive to negative short circuit. In that case the positive output cannot be pulled more than about 0.6 V negative, nor can the negative supply be pulled more than 0.6 V positive. This prevents the regulators and output capacitors from being damaged by reverse volt- ages. Dual power supplies in a single IC are now available, though the output cur- rent capability is somewhat less than that of the circuit of figure 8. Practical Suggestions When using IC voltage regulators there arc a few constructional points that must be noted. 1. All conductors carrying substantial currents (input, output, earth return) must be as thick and as short as poss- ible (this applies to p.c. board tracks). 2. Earth loops must be avoided. 3. All common (ground) connections must be taken to the reservoir capaci- 5. Adequate cooling must be provided. Finally, figure 9 gives pinouts of the more common packages used for IC volt- age regulators. Different manufacturers use different pinouts for the same pack- age and tables I and II show the correct pinout for each IC listed. H 4. Input and output decoupling capaci- tors must be mounted as close as possible to the IC input and output pins. P.C.M. Verhoosel Analogue indicators that make use of columns of LED's to measure voltage or other parameters provide a robust alternative to the conventional moving coil meter in many applications. Using one of the special IC's currently available for this purpose, such as the Siemens UAA 1 70, such indicators can easily be constructed. 442 — elektor april 1 976 led meter* For some time Siemens has been mar- keting two IC’s suitable for driving analogue LED displays. One of these is the UAA 170, a 16-pin IC with 8 encoded outputs capable of driving a column of 16 LED’s. Only one of these LED’s is lit at any time, which one is lit being dependent on the input voltage in such a way that as the voltage is increased a point of light will move up the column. A companion IC, the UAA 180, provides a ‘thermometer’ type of indication, i.e. as the input volt- age increases, successive LED’s light and stay lit, producing a column of light whose length is proportional to the input voltage. The choice of IC depends on the taste of the individual user, but it must be remembered that the thermometer type of indicator consumes more current than the moving dot type, as more than one LED is lit. Figure 1 clearly shows the difference between the two types of display. The possible applications for LED meters are numerous, but they are particularly useful in two types of application. The first is where the response time of the meter must have special characteristics such as audio modulation meters. The attack and decay time can be tailored electrically, and are not dependent on the mechanical inertia of a conventional meter movement. The second is in applications requiring mechanical ro- bustness, such as use in the presence of mechanical vibrations, which could damage moving coil instruments. Here the absence of moving parts gives the LED indicator almost unlimited life. Of course it might be argued that in some of these applications instruments with a digital readout could be used, since they possess the same advantages of fast response and mechanical robust- ness, and additionally have greater resolution. However, an additional advantage of the analogue LED indi- cator lies in its ability to show trends. It is much easier to tell if a rapidly changing quantity is increasing or decreasing when using an analogue indicator than from the blur of figures on a digital display. Principle of operation Figure 2 shows a simplified internal circuit of the UAA 170. The input circuitry consists of a series of high- gain differential amplifiers. One input of each of these is commoned and con- nected to the input terminal via an emitter-follower buffer stage Tl. The other input of each differential amplifier is connected to a point in a potential divider chain consisting of equal re- sistors R, which is fed from a reference voltage applied to T2. The differential amplifiers thus operate as analogue volt- age comparators. Whenever the input voltage exceeds the reference voltage on a particular comparator the output of the comparator will change state. The UAA 170 contains 16 such com- parators, so the input range from zero to full-scale is divided into 1 6 steps. To avoid the necessity for 16 output pins the 16 LED’s in the display are not driven individually but are arranged in a 4 x 4 matrix controlled by row and column outputs A to D and E to H. By enabling the appropriate row and column output one LED at a time can be lit. This is controlled by logic circuits represented by the box in the centre of the diagram. The logic circuitry is not shown in detail as it is rather compli- cated, and anyway it has little bearing Figure 1. Showing the difference between 3 single point and thermometer type indication tl Figure 2. Simplified internal circuit of th UAA170, showing the input circuitry aroF output drive circuitry. f P b T in i on the input and output parameters of ion the IC. thi an. Reference voltage inputs To establish the input voltage range over which the circuit operates a refer- ence voltage must be applied between pins 12 and 13 of the IC, with pin 13 being the more positive of the two. The input voltage range is set by the voltage difference between these two points. The voltage at pin 13 sets the full-scale reading of the meter. For input voltages in excess of the voltage at this point the last LED in the column will light and stay lit. The voltage at pin 12 establishes the lowest reading of the meter. While the input voltage is below the voltage at pin 12 the first LED in the column will always be lit, and will not extinguish until the input voltage exceeds the voltage at pin 1 2, when the second LED will light. This feature is particularly useful in situations where the voltage Figure 3. Practical circuit of a LED voltmeter using one UAA170 IC. Figure 4. The scale length can be extended to 30 LED's using two IC's each covering a dif- ferent portion of the input voltage range. D16 and D17 must be included in the circuit, although they can not be used as part of the scale. 444 — elektor april 1976 led meters to be measured is above a particular value, and voltages below that value are of no interest. A typical example is a ‘suppressed zero’ voltmeter for use in cars. Here only voltages between about 11 and 18 volts are of interest, since the battery voltage normally never falls below 1 1 V, and the generator cuts out above about 17 V. If voltages below 1 1 V were included on the voltmeter scale then more than half the scale would never be used. This can be avoided by making the UAA 170 operate from 11 to 18 volts. Below 1 1 volts the first LED would remain alight, which could be used as a low battery voltage indication. Different reference voltages produce unusual effects on the display. With reference voltages above 4 V the change- over from one LED to another is instan- taneous, i.e. as one LED extinguishes the next one lights up to maximum brightness immediately. As the refer- ence voltage is reduced the changeover becomes more gradual, and with a refer- ence voltage of about 1 .2 V it is possible to have two LED’s alight simultaneously at reduced brightness. The emitter fol- lowers T1-T3 provide a high input impedance, input current being of the order of 2 /iA, so for many applications the UAA 170 and 180 can be connec- ted direct to the voltage to be measured without any intermediate buffering. For use in situations where a stable reference voltage is not available, the IC is provided with a reference voltage output (pin 14). A 5 V reference is available at this point, with an output current capability of up to 3 mA. If volt- ages in excess of 6 V are to be measured then an input attenuator must be used to scale down the input voltage at pin 1 1 . Brightness Control The output current delivered to the LED display, and hence the brightness, can be altered by a brightness control connected between pins 14 and 16 of the IC. This may take the form of an LDR or phototransistor to adjust the display brightness to suit ambient lighting conditions, or it may be a manual control such as a potentiometer. A fixed resistor between pin 15 and ground adjusts the control character- istics of the brightness control. Practical Applications The complete circuit of a LED voltmeter is given in figure 3. This has phototran- sistor brightness control and, with the component values shown is intended for an input voltage range of 3 - 18 V. Various alternative possibilities are shown accompanying the main figure, b) and c) show brightness control using LDR and manual brightness control with a potentiometer respectively, d) and e) show a fixed voltage divider for the reference voltage and an adjustable one using presets respectively, f) shows a fixed input attenuator, while g) shows a preset input attenuator. For correct operation of the display all four LED’s connected to one of the pins 2, 3, 4 or 5 should have the same electrical characteristics. If the UAA 180 with its thermometer- type scale is used then the LED’s should also be chosen for similar brightness, as otherwise the appearance of the display will be degraded. Extension to30 LED's For applications requiring greater resol- ution than can be provided by 1 6 LED’s the circuit may be extended using two IC’s as shown in figure 4. Both IC’s receive the same input voltage at pin 11, but the reference voltages are arranged so that the first IC operates over the input voltage range of say 0 - V/2, and Figure 5a. Board layout for figure 3, withf foe provision for automatic or manual brightness^ control and fixed or variable input andj. reference voltage attenuators (EPS 9392-3)^ f0 Figure 5b. p.c. board layout for LED display 1 rs of figure 3 (EPS 9392-41. Figure 6. p.c. board and component layoutwo? for a '270° meter' suitable for use with a rev* he it (EPS 9392-1). woi counter circi Note that the UAAI70 and the UAA 180 are not pin-compatible! The circuits and p.c. boards given here are only suitable for the UAA 170. ©GO 2D ao O-io 50 -o BO RPM IDO i,h the second IC over the range V/2 - V, “'where V is the full-scale input voltage, 'rrlt is necessary to omit the last LED J from the display of the first IC and the lay first LED from the display of the second IC, otherwise for voltages below V/2 the first LED of the second IC jutwould always be lit, and for voltages revabove V/2 the last LED of the first IC would always be lit. For this reason ly 30 LED’s may be used, not 32. is means that D16 and D17 should t be part of the scale, although they [must be included in the circuit. So that the omission of these two LED’s [does not cause a ‘blind spot’ in the [middle of the display it is necessary to arrange that the second LED of the — second IC lights as the 15th LED of the first IC extinguishes. This is ac- complished by having the reference volt- age on pin 12 of the second IC lower than the voltage on pin 13 of the first IC. The voltage difference between these two points can be adjusted by PI. PI should be adjusted so that D18 begins to light as DI5 extinguishes. There should be no blind-spot where both LED’s are extinguished, nor should two or more LED’s be fully lit at the same time. Practical construction The construction employed depends upon the intended application of the LED meter. Two board layouts are given here, a linear scale suitable for use as an FM tuning scale (see Elektor 9 page 134) and a scale in a 270° arc, intended specifically for use as part of a car rev counter. (Note that this circuit is not a complete rev counter! It is merely a replacement for the original analogue pointer instrument - Ed). The printed circuit boards and compo- nent layouts for the linear scale meter are given in figures 5a and 5b. The IC and its associated passive components are mounted on a separate board from the LED display. The output terminals of this board match up with the input terminals on the display board, so the display board may be mounted on the main board at right angles to it, or the two may be linked by ribbon cable. Provision is made on the main board for either LDR or manual brightness control (PI) fixed or adjustable refer- ence voltage (R2, R3, R4 or P2, P3) and fixed or adjustable input attenuator (Rl, R5 or P4). The board layout of the rev counter scale is given in figure 6. This is pro- vided only with adjustable reference voltage at pin 13 by means of PI. Reference voltage at pin 12 is zero. Input attenuation is adjustable by means of P2, and display brightness is fixed by R2 and R4. Input voltage Output voltage Output current consumption without LEDs Assembly The scale of the instrument will prob- ably consist of a faceplate marked with the actual scale values and pierced with holes through which the LED’s can protrude. An example is given ac- companying figure 6. To ensure proper alignment of the LED’s with the holes in the faceplate the LED’s should first be mounted on the p.c. board and secured by soldering one lead only, ensuring that all LED’s are the same height above the board. The faceplate can then be placed over the LED’s and having positioned each LED in its hole the second lead of each LED can be soldered. between pins 12 and 13 for gradual display Reference voltage between pins 12 and 13 for abrupt display Table 1. Principle electrical specifications of the UAA170. Practical hints The principle electrical parameters of the UAA 170 are given in table 1. It will be seen that the voltage on the signal and reference inputs, pins 11, 12 and 13, must never exceed 6 V. When measuring input voltages greater than 6 V an input attenuator must therefore be used, as in figures 3f and 3g. This may take the form of a fixed attenuator or a preset potentiometer. The same applies to the reference voltage inputs. It is evident that the input voltage to pin 1 1 at full-scale reading must be the same as the reference voltage at pin 1 3, thus: but with R4 = R5 and Rl = R2 + Ri then v ref • R 2 = Vjn min • R i therefore R _ R i Vjn min 2 V re f When choosing the actual resistor valuei the input current of the IC should bi 1 taken into account. If the total resist 1 ance is chosen so that the current: through the potential divider chain it about 100 #/A then the 2 #iA input current of the IC can be neglected. As mentioned earlier the current throug the LED’s, and hence the brightness, controlled by what is connected be , tween pins 14 and 16, and betwee pin 15 and ground. For example, wit R6 in figure 3a chosen as 1 k, the with a resistance of 10 k betwee pins 14 and 16 the current through th display will be 50 mA. This correspom to the phototransistor or LDR beinj . fully illuminated and having minimun. resistance. If the resistance betwee pins 14 and 16 is increased to 40 . can be the same as V max then the resistors can be chosen such that R4 = R5 and R2 + R3 = Rl. The ratio of R2:R3 is chosen such that the voltage at pin 1 2 is equal to the minimum input voltage at pin 1 1, so: If V re f and the maximum input voltage are known then the ratios of the re- sistors can easily be calculated. If V re f vibra smal need Most mun: [force [the 1 stylus balance elektor april 1976 - 447 nis balance Correct setting of stylus tracking force is of utmost importance - certainly for modern 'feather- weight' cartridges. The gauge that is built in to many modern record players is not always reliable, so a ist double-check by means of a en separate balance is often advisable. pu> under the specified maximum. It is perhaps worthy of note that the danger of damage to the record is greater if the tracking force is too low than if it is too high — within moderation, of course! As a rule of thumb, the maximum for dy- namic cartridges with an elliptical stylus is about 1.5 g, whereas the maximum with a spherical stylus will be about 3 g. From the above it will be obvious that a useful measuring range for a stylus balance would be 0.75 ... 4 grams. The p.s.b. The simplest type of measuring instru- ment for tracking force is a balance - and it can also be one of the most accurate types. An easy way of making such a balance is to use epoxy printed circuit board material. Computer aided design has resulted in the end product shown in figure 1 : the printed stylus balance or p.s.b. Round-headed furniture tacks, rivets or the like can be used as pivots. These are pushed through the holes until the heads lie flush against the back of the board. Due care should be taken at this stage: the calibration accuracy depends on the position of the pivots, and any sharp edges (such as deep scratches) can affect the freedom of movement. The calibration depends on the mass per unit area of the material, of course; the scale shown is accurate for the boards supplied by the Elektor p.c. board service (EPS 9343). How to use it The balance is placed on the turntable so that it pivots on the round heads of the tacks (see photo). The stylus is now gently lowered onto the balance, and by sliding it up or down along the open track between the calibration marks (rotate the turntable a fraction) the position can be found where the whole set-up is in equilibrium. The tracking force can now be read off. For the highest degree of accuracy it is advisable to set the anti-skating com- pensation at ‘O’, and to level the record- player. The latter is always a good idea, anyway, in the interest of minimum wow. M Jg . The ‘ideal’ tracking force for most mod- ’ 1 ern cartridges is somewhere in the e 0.75 ... 3 gram range. Some ceramic or e .®3 crystal cartridges do require a higher '* setting, but they are intended primarily el for record players without any tracking force adjustment in the first place. On the other hand, some very high compli- " ance cartridges can be used at a tracking !in * force of less than 0.75 g, but this is un usually only a nuisance: the slightest ® e ! vibration of the record player or the ' smallest speck of dust can cause the 110 needle to become airborne. ran Most manufacturers specify the mini- mum and maximum permissable tracking force for their cartridges. In practice, * the best value usually proves to be just Of the many amplifier designs published in Elektor, the best known are perhaps the Equa and the Edwin. The Edwin amplifier enjoys great popularity because of its simplicity and the certainty that it will work first time. Anybody who can hold a soldering iron steady can build a satisfactory Edwin. The Equa amplifier is a more sophisticated design, more 'critical' if you like. It requires more care and a degree of insight from those who would build it. The final result is however a power-amplifier of exceedingly high quality. The obvious following design target was a power amplifier that would perform as well as the Equa — but was as uncritical to build as the Edwin. The first part of this two-part article presents the theoretical background to the Equin amplifier, the second part will cover the practical aspects. part 1 Any good amplifier should reproduce music, be it Beethoven or Bacherach, as it was recorded - without adding any of its ‘own interpretations’. This means that the designer must pay attention not only to the readily audible ‘crossover’ distortion, but also to the ‘impulse response’ (i.e. the stability) and to the related problem of ‘transient intermodulation’ (TIM). The design must minimise the total audible effect of all these distortions at once. It is not too difficult to ‘clobber’ crossover distortion with a combination of suitable quiescent current and heavy negative feedback (60 dB or so). Such a degree of feedback can only be achieved without instability, however, by such an early ‘open-loop rolloff* that serious TIM cannot be avoided. This is the great objection to using in- ternally ‘compensated’ op-amps, such as the 741! On the other hand, an RMS total distor- tion of 0.1% is quite inaudible - pro- vided only that it consists of low-order harmonics, without any trace of ‘cross- over spikes’. (Why do valve amplifiers sound so clean?) The attempt to achieve optimal sound quality does not have to mean the use of large numbers of components. A handful of ‘stategically’ placed ‘extra’ parts in an otherwise standard design will often do the job better (and cheaper) than a radically new circuit. The standard design can indeed often already be improved by slight readjust- ment of component values, after one has taken a hard look at ‘what affects the musical quality’. Note that this design is not intended for people addicted to head-splitting SPL’s. Massive amounts of distortion will not be unacceptable in such appli- cations. This is an amplifier for clean ! reproduction at subjectively-realistic I levels, in a domestic listening room. Output stage In a class B output stage there are two I separate transistor-groups that deliver, current in turn, depending on the in- 1 stantaneous polarity of the drive signal. Figure 2 shows the most usual stage configuration in simplified form. The NPN transistor Tl has its base linked, via a source of direct ‘bias’ voltage Vr, to the base of PNP device T2. In any practical amplifier Tl and T2 will each consists of two or three individual! transistors, arranged to give high-per-l I formance NPN and PNP overall behav-i iour. When Vr is made zero, in other! words when Tl and T2 have no | ‘quiescent’ or ‘standing’ current, it can j be seen from figure 3 that the load- 1 current will be zero throughout a range _ of drive-voltages on each side of the actual axis-crossing. This ‘dead zone’ is I £ the cause of crossover distortion. The culprits are the NPN and PNP de- * vices themselves, or rather their collec- 1 F tor-current/base-emitter-voltage charac- p teristics. At high current levels these a curves can be made as linear as one 1 ti would wish, by using current-dependent I negative feedback obtained with emitter- r resistors. At low current levels however ® these characteristics are sharply curved. The reason is that the ‘transconductance’ of Tl and T2 collapses at low current | levels, so that no amount of feedback | will help significantly. elektor april 1976 - 449 Figure 1. The Equin circuit diagram. The px.- board layout and the supply arrangements will follow in pert 2. Figure 2. The principle of 'usual' class B out- put stages. T1 and T2 are 'compound' NPN and PNP transistors, built up as pairs or triples (or as single transistors). Figure 3. The characteristics of the figure 2 circuit. The 'quiescent' current Ir serves to 'linearise' the crossover-region. I Biasing T1 and T2, by means of voltage Vr, will greatly improve matters. At the axis-crossing of the drive signal there will now be a steady current (the ‘quiesc- ent’ current) in both devices — so that they both still have significant trans- conductance. In the ideal case the over- lap of the NPN and PNP characteristics will be so arranged that the load-current follows the drive voltage linearly through the zero-axis-crossing (the ‘crossover’). The extent to which this can be achieved depends on several points: — Assuming that the ideal value of quiescent current does exist, how much care and trouble will the con- structor take to set it? - The ideal value is in fact that for which the ultimate ‘slope’ of the NPN curve lies in the same line as the PNP ultimate slope; the slope of each stage-half at crossover is then half the ultimate value. Irregularities in the curved part of the character- istics can prevent this state of affairs being maintained right through the crossover region. — Complete regularity means that the curves should be each other’s mirror image. This is the meaning of the 450 — elektor april 1976 term ‘complementary symmetry’. If a certain device within TT is NPN, then the corresponding device inside ‘T2’ should be PNP, vice versa. This would imply that the power de- vices within T1 arid T2 also must be complementary types. This is where the rot sets in: not only are high- power complementary pairs difficult (i.e. very expensive) to produce — it is almost impossible to produce such a pair with really complementary high-frequency (switching) perform- ance. The usual approach is therefore to apply ‘quasi-complementary’ arrange- ments, where the two power devices have the same polarity (NPN). This will work provided precautions are taken to eliminate the inevitable asymmetry in the near-crossover parts of the overall transfer charac- teristic. This can be done well. - The next point is that the value of the quiescent current may not drift with temperature. If the base-emitter junction of a steamed-up power de- vice gets its oar between the ‘base’ and ‘emitter’ of T1 or T2, it will be necessary to regulate Vr by about -2 mV/°C, to hold the quiescent current steady. That can be quite a party: NTC resistors, sensing-diodes on the heat sink - plus the guess- work about the actual junction temperature, when all one has to go by is the (considerably lower) heat- sink temperature. Assuming that such a compensation could be made dependable - would it be fast enough? Would the heating due to a loud passage of music not cause the immediately following quiet passage to be beset by cross- over distortion, due to the power de- vice junction cooling off faster than the heat sink from which its tempera- ture was being estimated? To be short: no alteration of quiesc- ent-current-setting Vr should be required to compensate for hot power-device junctions. - When the power supply is unregu- lated one must furthermore take care that Vr does not depend to any extent on the instantaneous DC voltage on the power line. In the cir- cuit of figure 1 the bias-voltage Vr ( of figure 2) is obtained by means of the components T4, PI, R12, R13 and RI4. Variations in supply volt- age cause a varying drop across R14 that can be made to compensate for the error in the base-emitter voltage of T4 due to those same supply variations. The bias voltage is there- fore held relatively constant. Output stage circuits Figure 4 shows several possible combi- nations of devices for making up T1 and T2 of figure 2. These two-transistor groups (driver plus power -transistor) are to be found in very many designs. The resistor R is typically 50 ... 100 ohm; R e is usually 0.2 . . . 0.5 ohm. The pairs «S“I" I eqi a, b, c (identical to a) and g show NPN behaviour; d, e, f and h behave as PNP. The combinations a-d, b-e and g-h show true ‘complementary symmetry’. The combination a-e is the well-known \ ‘quasicomplementary’ output stage. Adding a diode and a resistor (as orig- inally suggested by Baxandall) converts ‘e’ into T; the asymmetry of a-f can be very small indeed, since the diode [ simulates the ‘missing’ base-emitter junction. The ‘darlingtons’ a, c, g, d, f and h(=f) have an Ie - VRE characteristic with a long ‘tail’. The stability of the quiescent ( current is relatively poor, but the input , impedance (base to emitter) near cross- over varies smoothly. The ‘tail’ in the characteristics of the I ‘compound’ pairs b and e is short. These pairs have a good stability of quiescent current, but the input impedance shows ' Fig discontinuities in the crossover region. «ic Adding ‘Baxandall diodes’ to both b and e will give them darlington-like ,orl characteristics, but it will eliminate cor the ‘hot’ junction — giving improved quiescent current stability together T2 with the smooth impedance-curve. See g and h in figure 4. This arrangement Fig was used in the Equa-amplifier. am The objection to the figure 4 pairs is that they all have a fairly low current F '9 gain. This means that they require con- Th< siderable amounts of drive-current. The sho obvious solution is to build up TV and F T2’ as triples. Of the various possible R2 configurations the so-called ‘Quad- i ^ elektor april 1976 -451 Figure 4. Well-known two-transistor configur- ation for T1 and T2. The vertical pairs I a with d, b with e, etc) can be combined to form an output stage with more-or-less complementary symmetry. Figure 5. The ‘Quad-tripies' used for T1 and T2 in the 303 amplifier. Figure 6. Modified triples used in the Equin Figure 7. 'Bootstrap-drive' to the output stage. The penultimate stage (T2 in figure 1) is shown as a current-source. Figure 8. Equivalent of figure 7 when R1 and R2 are much greater than R|_ and the im- pedances of Cl and C2 are negligibly small. triples’ are the best known (see figure 5). The quiescent current stability of the Quad triples is extremely good; the 2N3055’s cannot get their oars into that part of the circuit! The Ig Vjje characteristics have a short tail and the current gain is high. The misbehaviour of the input impedances near crossover is smoothed by the 1 00-ohm resistors. The symmetry of the complete Quad output stage is however not quite what it could be. The voltage drop across the 1 k£2 resistor in the NPN triple is un- equal to (in fact about half) that occur- ring in the PNP triple. This means un- equal currents in the pre-drivers’ and mismatched ‘crossover tails’. This asymmetry has been practically eliminated in the Equin circuit by the figure 6 expedient of moving one resistor ‘end’. The voltages across R17 and R21 are now equal, so that TS and T8 are symmetrically biassed. The optimal value of quiescent current for this output stage is low, so that it has interesting possibilities for very -high- power designs (‘horsepower amplifiers’). (Quad themselves have meantime come up with a quite different approach to high-power design, see Quadi-compli- mentary’; Elektor 8, p. 1 220). Driving the output stage The discussion up to now has implied that the output stage would be voltage- driven (i.e. from a zero source im- pedance). The alternative is current- drive. With voltage-drive the output current is related to the drive voltage by the ‘slope’ (transconductance) of the 1 l Vbe characteristic (figure 3). With current drive 1 l is related to the drive current by the current gain of the compound transistors T1 and T2. However, the current gain is frequency-dependent to a greater extent than the slope, mainly because the latter can be improved by local feedback. Current drive could in principle be equally successful if there was a con- venient way of applying suitable local feedback. It would however be hard to beat the convenience of the ‘voltage- drive feedback’ obtained with the emitter resistors of figures 4, 5 or 6. Another aspect is that a voltage-driven stage does not require (at least in prin- ciple) the use of current-gain-matched pairs. (A wild mismatch will not of course be any help. . .) In most practical designs the drive is neither purely ‘voltage’ nor purely ‘current’. Look at the circuit of figure 7. If Cl and C2 are sufficiently ‘thick- ended’ there is a link between the junc- tion R1-R2, the emitters of T1 and T2, and Rl- The voltage across R1 is the output stage drive. The lower end of Rl carries the drive voltage plus the out- put voltage. It is driven from the collec- tor of the last ‘front-end’ transistor, which, on its own, is a current-source. P.J. Baxandall has shown (letter ‘Sym- 452 — elektor april 1976 metry of a class B’, Wireless World, September 1969, p.416 etc.) that the figure 7 circuit is directly equivalent to that of figure 8, provided that R1 has a much higher value than R2; a calcu- lation of the output voltage as function of the current i s leads in each case to the same formula. Conclusion: the out- put stage is driven from a source- impedance R1 and operates in the com- mon-emitter mode. It therefore does not behave as an emitter-follower, as some people would have one believe. The gain obtained depends on the ratio of R1 to the input-impedance of the output stage. This impedance, as already noted, can show crossover effects. It is also frequency -dependent. Crossover misbehaviour can therefore occur by two mechanisms: during the conversion of the current from the penultimate stage into drive voltage for the output stage, and in the conver- sion of this drive voltage into the output current II. Reduction in value of R1 will reduce the influence of the first mechanism. It will unfortunately also reduce the open-loop gain. In the Equin amplifier, bootstrapping has been applied just as in figure 7. The figure 7 circuit reappears in the figure 1 circuit diagram as T2 (penultimate stage; current source is), R9 , R 1 0, C7 and C 1 0. The difference is that the junction of T2 collector with R9 (R1 in figure 7) is connected indirectly to the base circuit of T5 and T8, via emitter-follower T3. T3 (with emitter load Rll) presents a very low source impedance to the out- put stage - giving near-ideal voltage- drive conditions - simultaneously pre- venting the output stage from loading R1 (mechanism 1). The open-loop bandwidth is also improved by this tactic; T3 also provides the current required for the ‘Miller’ capacitor (C6 in this case) that has to be inserted to maintain stability under negative feed- back. That capacitor would otherwise shunt the current source T2, causing extra phase-shift just where it can least be tolerated, in the middle of the ‘danger area’. Transient intermodulation distortion Along with ‘crossover’, ‘TIM’ can be blamed for the ‘gravelly’ quality of sound from many transistorised power amplifiers. TIM actually ‘sounds’ very much like crossover distortion; it oc- curs however at moderate to high drive levels and high frequencies instead of on low-level signals. The effect is caused by the application of an input signal that ‘slews’ too fast for the feedback system to ‘keep up with’. The drive voltage to the input stage is the difference between the input signal and the feedback signal from the out- put. Due to the high open-loop gain, this difference is usually very small. However, if the feedback is too slow (due to lag compensation needed to stabilise heavy feedback, for example), this difference signal may be momen- cause DC shifts that take time to correctlca themselves. The bursts of 100% distor-fcj tion, ‘holes in the music’, are the TIM.fci. A numerical example: suppose thejii; amplifier has an open-loop gain ofj&; Figure 9. Transient Interm odulation Distor- tion (TIM). The low-level sinewave is momen- tarily suppressed during transient-induced ■Zi B-Sis elektor april 1976 - 453 $0 dB (10,000 x) and is operated with 40 dB (100 x) feedback. A ‘slow’ input signal of 100 mV will cause a resultant drive to the first stage of about 1 mV. If the feedback arrives too late, due to a “faster’ 1 00 mV input, there will obvi- ously be big trouble. The amplifier is down for the count during the actual transient overload and the ‘recovery time’. Any other signal present during that interval will not come through. Figure 9 illustrates this. It is precisely this kind of signal, a continuous line with an odd superimposed transient, that is so typical of music. The speed with which the feedback can react to a fast disturbance at the input depends on the open-loop risetime of the amplifier, i.e. on the open-loop bandwidth. This in turn depends, as- suming that the amplifier is to be un- conditionally stable, mainly on the out- put stage gain-bandwidth-product and the amount of feedback used. More feedback and slower devices make for earlier trouble. The TIM performance of an amplifier improves as the open-loop risetime is reduced to approach the shortest rise- time occuring in the input signal. The Equin amplifier, with its good voltage drive, manages an open-loop bandwidth of 10 kHz without stability problems (using ‘slow’ 2N3055’s!). If the ampli- fier is to handle full-drive inputs at up to, say, 20 kHz (and not be embarrassed by nadvertent ultrasonic drive) one or two extra precautions are desirable. These are to provide an RC rolloff at the input (R4/C4 - well into the ■ltrasonic range), and to give T1 plenty of elbow-room (low R7). Final remarks The output stage drives the loud- speaker via the electrolytic CIO. Direct ' coupling would have introduced a com- plication with the offset voltage. This offset is critical to really control, whereas DC in the load can upset the stage-balance, leading to ‘crossover’ (particularly with this circuit’s low quiescent current). R25 ensures that CIO is charged when no load is connec- ted. The diodes D1 . . . D4 form a simple but effective current limiter. Beware of the dissipation when the driven amplifier is ‘shorted’. The positive supply rail is decoupled by R26/C11. The resistor damps the resonance between Cll and the wiring mductance - to prevent the amplifier going into business for itself somewhere m Band I. The resistor R 1 5 separates the negative supply rail from the input ‘earth’, the heavy currents taking the ‘path of least resistance’. The two signal-earths id in a stereo amplifier may be linked, he C3 and C7 cause the degree of AC feed- ay tack to differ from the DC value. These *ct capacitors have been given an unusually or- Jjgh value, so that the amplifier DC M- biasing arrangements will not wander he due to momentary asymmetry in low- of trequency input signals. H tv tennis extensions In the previous article (Elektor 11, p. 318) some extensions of the basic game were described. It was the intention to publish further extensions in this issue — with one printed circuit board for all the additional circuits. However, some readers seem to be having problems with the basic game, so some further suggestions for trouble-shooting seem called for. In the next issue we will publish the remaining extensions and the printed circuit board. part 2 l The additional circuits will extend the scope of the original TV tennis game, but they will also put a heavier load on the power supply. This may mean that a new power supply will be required, or that the existing unit will have to be re- designed. The current consumption, with all extensions added, will be approximately 600 mA. The power supply originally rec- ommended, using the LI 29, should be adequate (figure A). An alternative solution is the LM309K: this is capable of supplying up to 1 A at 5 V. It has been found that some fixed volt- age stabilisers actually supply approxi- mately 4.8 volts. The consequence may be that practically the entire field remains white. The circuit of figure B shows how this can be remedied by raising the voltage. Some readers have encountered prob- lems involving vertical distortion of the picture. This can be caused by poorly adjusted horizontal synchronisation, so a word of advice will not be out of place: first of all read the adjustment instructions given in the original article. Carefully check all wiring and other connections, then set all pre-set poten- tiometers to mid position and carry out the alignment procedure as described. If the problem persists, the modifi- cations described at the end of the article ‘TV tennis extensions, part 1’ can be carried out (‘TV tennis hints’). Readers are also referred to the points already mentioned in the ‘Missing Link’, January 1976, p. 148. If even these points are not sufficient to completely cure the problem, some further ‘brute force’ expedients are required: - the three ICs in the synchronisation circuits (IC7, IC8 and IC10) are sen- sitive to interference pulses on the positive supply rail. For this reason it is advisable to run completely separ- ate wires from the supply electrolytic (in the power supply shown in the original article, this is C3) to each of these ICs. The simplest way to do this is to unsolder the positive supply pins (pin 14, in each case), bend the pins up from the board and solder the wires on to them in mid-air. The positive supply ends of the de- coupling capacitors (C8, Cx and Cx) are also unsoldered from the board and connected via 1 £2 resistors to pin 14 of the corresponding ICs. (Note that IC10 is the one between IC7 and IC8; on the original board In some cases, vertical distortion of the picture can increasing the value of Cl from 470 /i to 2200 p/!6 V. layout shown in Elektor 7, p. 1117, the indications IC10 and IC11 were interchanged.) the negative supply to IC10 (pin 7) could also do with some additional decoupling. A 1 00 fjH micro-choke in series with this connection is sufficient. The easiest way to mount this is to unsolder all seven pins on that side of the IC and bend it up so that these pins are in mid-air (pins 1 to 6 are no longer used after the mains sync has been incorporated). The choke is then mounted between the original hole for pin 7 and pin 7 itself. after the conversion to mains sync has been carried out (Elektor 1 1 , p. 323), there is a wire link in the connection between pins 1 and 2 of IC10 and pin 5 of IC7 (figures C and D). If a 2.2 mH choke is used in place of this link, some further improve- ment of picture quality can result. Modifications to Additions to Improvements on Corrections in Circuits published in Elektor 7805 LM309k Preamp for counter In the preamp for the frequency counter (Elektor 8, p. 1235) a 47 £2 preset potentiometer is specified for P 1 If this is not readily obtainable, a 100 Si preset can be used instead . in some cases, the ball signals inter- fere with the other signals — causing a dent in the vertical boundaries that moves up and down with the ball, for instance. To prevent this, two 1 kS2 resistors can be added in series with the inputs of N9 (pins 2 and 3 of IC12). On the board, these resistors can be mounted in place of the original wire links between pin 2 of IC12 and pin 1 of IC2 and between pin 3 of IC12 and pin 1 of IC1 re- spectively. M Digital master oscillator In the circuit for the MOS master oscil- I lator (Elektor 10, p. 246, figure 11) and! in the corresponding component layout [ (figure 15) one output is marked ‘F’. I Some readers have wondered what this is for . . . This connection is simply a low- impedance output that can be used when trimming up the oscillator: a TTL frequency counter can be con- I nected to it. The oscillator should be | tuned so that the output at ‘F’ is 10001 20 Hz - the actual oscillator frequency is then 2000240 Hz, of | course. Lie detector Btii There is an error in the circuit diagram pw for the lie detector (Elektor 7, p. 1 143).hgl Of the two diodes at the input, the ill upper is drawn correctly but the lower btii is the wrong way round, its cathode |ecl should be connected to the 47 k/47 k/ Ine 100 k-preset junction; its anode should kor be connected to supply common. foi Figure A. The mains power supply originally suggested, using a fixed voltage regulator. Figure B. If the regulated output voltage too low. a diode in the 'tail' of the regulati Figure C. Circuit for deriving the frame sync pulses from the mains frequency (see Elektor 11, p.323). modification has elektor april 1976 — 455 uihat's iiiabt? — The most 'interesting' figures on the specification list of an audio power amplifier are those relating to the rated output power. This article reviews the various kinds of watt that one can meet in a specification. Since the purpose of using the amplifier is to reproduce music at a 'correct' ,, >evel, it will also be necessary to £2 consider the efficiency of the loudspeakers that are to be driven. il- nd b is rather too easy to manipulate with the ‘watts’ in the power-amplifier ipecification to produce an inflated -ating. The idea is to sell a relatively n ow-power job to the unwary - at a 3).ugh-power price - on the premise that ill the fellow wants is a higher watt- •r ating than the chap next door. This technique has been developed to such a ■I ine art that there are even protests Id tom within the industry - from re- ponsible manufacturers and their as- sociations - hampered, unfortunately, ry the fact that it is not immediately ibvious just what is a realistic watt- aring. •‘ell, . . . what’s watt? i seems logical to assume that the maximum ‘undistorted’ sound level a p*en combination of amplifier and zmdspeakers will produce depends on he maximum amount of ‘undistorted’ tiive power available. The assumption is correct, up to a point - the point at which the loudspeaker becomes the factor limiting a further increase in the ‘undistorted’ sound pressure. Whichever factor sets the limit, there comes a setting of the gain control at which the reproduction is no longer ‘undistorted’. Some listeners immedi- ately detect this as a ‘rough edge’ to the loud music passages, others actually like the effect - and happily turn the ‘fi’ up ‘hi’er. When the system really saturates (so that there is quite unmistakable severe distortion) the usual reaction is to assume that the power amplifier is ‘clipping’. That may well be - but it ‘ain’t necessarily so’. The discovery is invariably made too late, after an invest- ment in new parts or in a new ready-built amplifier of higher rating has failed to noticeably increase the available ‘racket’. What has happened is that more watts have become available for heating up the speaker’s drive-coil (and possibly tearing the cone loose from its moorings). This can easily mean a further considerable investment - and this time without a trade-in! It is one of the physical facts of life that a high quality loudspeaker of reasonable dimensions inevitably has an efficiency - i.e. the ratio of acoustic watts de- livered to electrical watts consumed - in the order of 1 ... 5%. The balance is simply waste heat! The distortion in the sound radiation from a loudspeaker, as a function of the applied drive-power, is a difficult thing to measure. One therefore rarely finds figures on this in the manufacturer’s published specification. The situation regarding permissible drive power seems to be this: there are two limiting factors to the drive power a given loudspeaker will ‘accept’; there is the instantaneous peak power input at which saturation- distortion or even actual mechanical damage will occur, and there is a con- siderably lower continuous power level (certainly in the case of mid-range and tweeter units) at which the continuous heat production causes the maximum allowable temperature rise in the ‘motor’ (i.e. the moving coil). A measurement with a steady sinewave as loudspeaker drive will encounter the latter limit first, so that some kind of ‘tone burst’ seems to be required. The duty-cycle of this tone burst needed to bring the limits together would have to be determined for each type of loud- speaker tested and quoted in the specifi- cations — assuming that this is meaning- ful to the customer working out the permissible amplifier rating! Manufacturers would clearly prefer a standardised procedure that would enable dissimilar units to be compared by prospective users. Presently used test signals are therefore obtained by ‘frequency-weighting’ a wideband noise signal until its spectral power-density (both ‘instantaneous peak’ and ‘con- tinuous’) corresponds to that of ‘typi- cal’ music (whatever that may be). This solves the maximum-power problem nicely - but not the distortion-measure- ment one. If the customer is going to use a power amplifier capable of overheating (or mechanically overdriving) any of the loudspeakers in the system, he will simply have to refrain from doing silly things with the volume and tone con- trols. Damage rarely occurs before severely-distorted reproduction has given fair warning . . . Amplifier sinewave rating The amplifier’s ‘continuous’ or ‘sine- wave’ rating is, to put it crudely, its heating-ability. The rating is obtained by having the amplifier deliver a steady sinewave output of specified frequency, into its rated load resistance — at a level for which a specified small deviation from the input waveform (i.e. a speci- fied amount of distortion) is caused by non-linearities in the output circuit. Manufacturers normally specify a level that the worst product made (due to component tolerances etc.) will reliably A stereo power amplifier is invariably elektor april 1976 — 457 rated on the basis of ‘both channels driven’ simultaneously - the situation that makes the severest demands on the power supply circuits. What one actually measures in this test is the maximum average power, equal to the product of ‘effective’ (‘RMS’) volt- tage across and ‘RMS’ current through the load resistor. The Root Mean Square value of a time-varying quantity is its mathematically -derived ‘effective value’: the value of a steady direct voltage or current of the same heating ability. The intermediate values within a representa- tive time-interval are ‘squared’, then the squares are ‘meaned’ (averaged) and the Toot’ of this average taken as the result (‘the root of the mean of the squares’). For a sinewave the RMS value is known to be ‘one over root two’ (about 0.71) times the peak value. One occasionally encounters a ‘con- tinuous peak’ power rating. It is the product of peak voltage and peak cur- rent (i.e. ‘squarewave power’) and is precisely twice the sinewave rating - its only claim to (commercial!) merit. The value of a ‘continuous’ rating is that it enables one to make objective com- parisons between different amplifiers. It also provides a ‘reference’ output level at which a distortion measurement (necessarily a steady-state operation) can be carried out. Assuming that the system limitation is not in the loud- speakers, since if it were the whole matter would become rather compli- cated, the question can be raised: to what extent is the sinewave power rating of an amplifier relevant to its ability to deliver an undistorted music signal? The waveform of a music signal is rarely even remotely similar to a sine wave- form. The ratio of peak value to RMS value (the ‘crest factor’) can exceed 15 dB for much of the programme, de- pending of course on the kind of music involved and on the extent to which dynamic-range compression has been applied during recording and trans- mission. When the music signal is driving the amplifier momentarily just to its peak output (i.e. genuinely undistorted full-drive), one may assume that the average power delivered will be well below the amplifier’s continuous rating. Let us not complicate matters by trying to account for the effect of current limiters in the output stage. The simple situation is that the amplifier’s peak power capability is determined by the momentarily available supply voltage. There will come a point (see figure 1) at which the ‘on’ transistor ‘bangs its head’ against the supply rail - the wave- form being flattened (‘clipped’) by the inability to go higher. Music power rating The specification sheets of many com- mercial amplifiers give not only the con- tinuous power rating, but also the Tnusic power’. This latter figure is then always higher than the continuous fig- ure . The music power rating does not follow from any standard measurement procedure; it is simply an indication by the manufacturer of the output power his amplifier will momentarily deliver (i.e. during instantaneous peaks in the music signal). One must therefore be careful when comparing amplifiers on the basis of their music power ratings. On the other hand, the rating is quite relevant to the unit’s performance in a practical situ- ation and cannot be dismissed as a mere commercial trick. The essence of the ‘music power’ con- cept derives from what (watt) happens when the amplifier’s power supply cir- cuit is not voltage-regulated. The situ- ation is that an undriven class B output stage draws only a relatively small standing or ‘quiescent’ supply current, so that the fairly hefty reservoir capaci- tor has no difficulty in providing an almost ripple-free feed voltage close to the peak value of the transformer secondary ‘open’ voltage. When drive is applied there will be a tendency for the feed voltage to drop (and for the ripple to increase) - causing the ‘clipping level’ of the amplifier to fall. This process takes time however (because of the aforementioned hefty reservoir ca- pacitor) - so that a momentary full power demand will be met at full volt- age. Only when the average demand becomes appreciable will the supply voltage reduction noticeably reduce the available output power. Note that the relative power reduction is roughly pro- portional to the square of the relative voltage reduction, because a reduced voltage swing inevitably means also a reduced current swing — and the product of voltage and current is power. Figure 2 illustrates the on-load behav- iour of the simple supply circuit of figure 3 . Charge flows out of the reser- voir at a rate proportional to the current demanded (charge is measured in ampSre -seconds). The charge loss has to be made good by a surge-current, that occurs one hundred times per second. Figure 3. A typical unregulated power supply circuit, in this case with symmetrical positive and negative output rails. The resistance shown as R is in fact due to the copper - resistance of the transformer windings and the series resistances of the rectifier diodes. At a given load demand, a larger value for the reservoir elactrolytics will enable a longer 'burst' to be met at full power — but the recovery time will then also be greater. whenever the instantaneous secondary voltage (minus the drop in the rectifier diodes) exceeds the voltage across the capacitor. The internal resistance of the rectifier circuit (actually the effective ‘copper resistance’ of the transformer windings) determines the magnitude of these surges — and therefore the drop in supply voltage that must occur with a given combination of capacitor value and load current. V, is the no-load (or better ‘quiescent load’) supply voltage; V 2 is the considerably lower full-load voltage (continuous full drive). The charging process occupies a greater part of the hundredth-of-a-second (mains half-wave) interval - and the voltage drops much faster during the full-load discharge process. It will not be difficult to see why power-electrolytics have a ‘permissible ripple-current’ rating in addition to their nominal capacitance! The designer of the power supply has to make a difficult choice here. A very low transformer winding resistance (both primary and secondary) will make for a very ‘good’ supply. It unfortunately also means a relatively bulky and expensive transformer — and a more violent ‘switch-on’. Note that providing electronic regu- lation of the power supply circuit will enable the ‘continuous power’ to be made equal to the ‘music power’ rating — but at the price of more transformer, more electrolytic and more heat sink! The only advantage of regulation is that the output stage can be continuously operated closer to the transistor voltage maxima, without requiring allowances for mains voltage tolerances. In return for the hardware investment one obtains, in essence, that a power rating slightly higher than even the permissible ‘music power’ can be guaranteed under all load conditions. This may be justifi- able under certain professional circum- stances. After all that . . . what's watt? The ‘continuous’ and the ‘music’ power ratings of an amplifier give information that is relevant to the unit’s ability to deliver an undistorted audio signal. All other power ratings, such as ‘square- wave power’, ‘peak music power’, ‘±2 dB power’ etc., reflect more upon the abilities of the advertisement copy- writer. The amplifier’s power rating is by no means the only parameter - or even the most important one - relevant to the enjoyment of undistorted music repro- duction. H '■v- M6800 has taken the gamble out of microprocessors Seven reasons why you'll always win with M6800. 1. Programming language. So easily learned that it makes your transition to MPU's that much easier. 2. Unlike competitive ranges, the M6800 family is capable of further development while still maintaining upward compatibility. Example: The M6900 series is now being defined to meet defined customers requirements. 3. Very efficient programme code. Wide instruction repertoire, including seven addressing modes. 4. Sub-function devices already available. 5. Single power rail. 5 volt. 6. Interfaces easily with TTL and CMOS. 7. Second sourced by AMI across Europe. Here's the M6800 family today: — MC6800 Microprocessor. MC6820 Peripheral Interface Adapter. MCM6810 Static RAM. MCM6830 ROM. MC6850 Asynchronous Communications Interface Adapter. MC6860 Low Speed Modem. Alternative N-Channel Si Gate RAMs for large systems: — MCM68102 IK x 1 Static 16-pin. MCM6814' 4K x 1 Dynamic 16-pin. MCM6815 4K x 1 Dynamic 22-pin. Recent new devices include: — Dynamic Memory Refresh Controller. MCM68112A 256x4 Static RAM. 16-pin. MCM68317 16K Static ROM. 24-pin. An 8K x 1 erasable and electrically reprogrammable ROM (MCM68708) was introduced in the first quarter of 1976. And there's more to come! MOTOROLA Semiconductors Motorola Ltd. Semiconductor Products Division York House. Empire Way. Wembley. Tel: 01-902 8836.