up-to-date electronics for lab and leisure ei.eHTDr a '/VK. ■d-0~\ elektor january 1976 — 103 » selektor feedback pll for fm ng In a previous issue of Elektor the theoretical background of a Feedback Phase-Locked Loop (PLL) tuner was discussed (Elektor 3, p. 412). A practical design is now described for a complete receiver, including audio amplifiers, which provides high performance at a moderate cost. to drive or not to drive ... — C.J. Both 119 The slower reactions of a person 'under the influence' form the basis of this 'drive'/'no drive' tester. optical-lock 122 sixpence detector I23 function generator ic 2206 124 Function generating ICs have been on the market for several years. Now one can refer to a 'second generation' or these ICs, for technical progress has resulted in improved performance at only slightly higher prices. racing car control -]2g For model car track enthusiasts a circuit is described here with’ which' the speed of the 'racing Mrs can' be controlled very accurately and proportionally and which in addition makes the car motor produce a realistic engine noise. The squeezer’ belonging to the track remains part of the circuit mini-mw ^20 battleships — R. ter Mijtelen 131 This article describes an electronic version of the well known game of 'battleships’. The pencil and paper have been replaced by switches and LED's - under the control of a boxful of TTL. led fm scale 1 34 alarm 12g An alarm which gives its alarm signal at certain repetitive times, does not need to know what the actual time" is it is sufficient if it can measure the time between the alarm time points (for instance 24 hours). capacity relay 133 pin the tail on the donkey 139 simple mw receiver 140 The alignment of superhet receivers presents problems that may deter some enthusiasts from undertaking their construction A simple MW superregenerative receiver presents no such difficulties, and the results obtained can be quite satisfactory when one has achieved the necessary 'touch' for the reaction control. stereo led level meter I43 The Texas IC type SN 16880 N contains all the functions necessary for a stereo LED level meter, which can replace the conventional moving coil instrument in tape recorders or audio mixers. digital master oscillator (1) 144 The use of frequency dividers in electronic organs has been known for many years. The usual procedure is to use divide-by-two stages to divide down the notes of the highest octave to obtain the lower octaves. Until recently it was normal practice to use twelve independent master oscillators for the twelve notes of the top octave. The disadvantages of this approach are that twelve oscillators have to be adjusted when tuning the organ, and that supply voltage variations, temperature changes and component ageing can all make the organ go out of tune. A digital master oscillator, in which the notes of the top octave are derived from a single clock generator, suffers from no such disadvantages. missing link 1 48 high security burglar alarm sensor I49 pll-ic stereo decoder 150 In response to popular demand we publish this design for an FM stereo decoder using the Motorola MC 1310 P. Although nothing is claimed for this circuit by way of originality (it must have been published in some form standard* ° f ,imeS> '* '* never,heless a use,ul des '9f utilising a device that has become virtually an industry elektor shorthand 152 tup-tun-dug-dus 153 market 1 54 linear ics 157 : pK forfm elaktor january 1976 — 1 11 ie at ; y I li- re at :h Is o- >y al ot . he irt id- 1 ce i showing the Feed- • 3. Circuit diagram of the Toko EF5600 coming aerial signal has a frequency of 100 MHz and the oscillator frequency is 1 10.7 MHz then two new signals appear at the mixer output with frequencies of 210.7 MHz and 10.7 MHz respectively. The mixer output is filtered to remove the unwanted components and the 10.7 MHz is amplified by the i.f. ampli- fier. which is a tuned amplifier with a passband centred on 10.7 MHz. It can thus be seen that the receiver can be tuned by altering the passband of the aerial input stage and by altering the fre- quency of the oscillator. This is, of course, normal superhet practice, which those familiar with r.f. techniques will recognise. From here on the operation of the cir- cuit differs from more conventional receivers. The output of the i.f. ampli- fier is fed to a phase comparator (D). The other input of the phase compara- tor is fed by a high-stability 10.7 MHz signal from a reference oscillator (F). The characteristics of the phase com- parator are shown in figure 2. If the phase difference between the i.f. output and the reference frequency is greater than 90 the output voltage is positive, if it is less than 90° the output is nega- tive. At 90° phase difference the output voltage is, of course, zero. However, since the input signal to the aerial is frequency-modulated the only way to keep the phase difference be- tween the i.f. output and the reference oscillator constant is to vary the front- end local oscillator so that it ‘tracks’ the signal. A constant 10.7 MHz output is ♦Supply 12V SPECIFICATION FOR FM TUNERHEAD TYPE EF5600 87 109 MHi ♦ 12V OC F igquencv '•’ n 9 Supply volugr AGC operation (+2.5 1 (Type EF 5603 isavai 112— elektor january 1976 then produced. This tracking is achiev by feeding the output of the phase t parator back to the AFC input of th front-end so that a attempts to mail tain a constant 90' phase difference b tween the Lf. output and the refereno oscillator by varying the local oscillato frequency. The output voltage of th phase comparator is thus a replica of th original modulation of the input signal It still remains, of course, to extract th stereo information. The tuner The tuner used in this design is a 1 type EF5600. It is one of the besi tuners generally available for the homi constructor. The circuit is given ii ure 3, and the outline, specifications pinning are shown in figure 4. The input stage utilises a dual gate fet, which has good linearity - strong input signals will give rise to little cross modulation. This RF p amplifier stage is followed by thre tuned bandpass filters, capacitive! coupled. The selectivity of these filte is sufficiently high to make it possible b use a simple bipolar mixer stage. It is common practice in FM front-em to take the IF output straight from the secondary winding of the IF output| transformer. In this design, however, ani extra output stage has been added. This has the advantage that the (tuned)! IF coil is scarcely loaded by the IF strip] which means that there is never any! need to retrim the coil - no matted what the input impedance of the IF strip is. The tuner is fully aligned all the factory, and one should resist th< temptation to twiddle any of the trim mers or cores. The only modification to the tune needed for use in the feedback PLL de sign described here is the AFC input. Ii the original tuner, this input is i coupled with a 10 n capacitor. Thi must be removed, and a 560 p capacito soldered in its place (see photos, fi ure 5). It would be nice if Toko couli supply tuners with this minor modif: cation already built in . . . The Mark 1 version of the feedback PLL receiver proved to have an input sensi- tivity of 8 fiV. To improve this, an ad- ditional RF preamplifier stage was added (figure 6a). The input trans- former can be wound on a HF type ferrite bead, using 0.2 mm (36 SWG) enamelled copper wire (figure 6b). If required, both the 75 to and the 300 £2 winding can be wound on the same coil. The i.f. Amplifier An unusual feature of the i.f. ampli- fier is the absence of bandpass filters. These are omitted because the tuner itself provides good selectivity and be- cause the PLL has inherent selectivity due to the 10.7 MHz reference oscillator so that it can only lock onto 1 0.7 MHz. In addition, as the i.f. amplifier is within the feedback loop any filters would have to meet stringent phase distortion criteria, which is another reason for omitting them. The IF signal is amplified by IC1 (gain approx, x 40) and fed to the OTA (IC3, figure 7). Diodes D1 and D2 limit strong signals. The first stage of the OTA is used as multiplier for phase detection, so there is relatively little IF amplifi- cation. For this reason, the bandwidth of the PLL depends on the input signal strength to the extent that for low sig- nal levels (less than 2 juV) the band- width is reduced. This is an advantage when listening to weak transmissions, as it improves the signal-to-noise ratio. The disadvantage is that it can lead to distor- tion unless the weak transmissions in question were narrow-band to start with. Preset potentiometer PI is used to set the loop gain, and hence the bandwidth. It is correctly set when a fully modu- lated stereo transmission is reproduced without audible distortion. The output impedance of the OTA is relatively high, so a buffer stage (T2) has been added. The RC networks as- sociated with this transistor are com- pensation networks for the loop. The holding range of the PLL is so large (certainly for strong transmissions) that some form of tuning indicator is re- 114 — elektor january 1976 twdiicli pll for fr quired. This is the function of T3 and T4. If there is no signal present at point ‘R’ (output of the tuner) the volt- age at the collector of T2 is approxi- mately 3.6 V. P2 is now set so that D3 and D4 light equally brightly. When tuning in to a transmission, the DC voltage on the collector of T2 varies in such a way that D3 lights if the tuning is off to one side and D4 lights if the tuning is off the other way. When the receiver is tuned in correctly both LEDs light equally. The 10.7 MHz oscillator In the interests of economy a 10.7 MHz ceramic filter is used as the frequency determining element in the oscillator instead of a crystal (figure 7, also shown separately in figure 8). This filter is con- nected between pins 3 and 7 of IC3. The oscillation frequency is determined by the ceramic filter: it is simply the frequency at which the phase shift of the filter is 0° (or 360°). However, most ceramic filters do not have 0° phase shift at their nominal frequency so some phase compensation is necessary. For this reason Cl 7 and C20 have been added. C20 is a trimmer, so that the fre- quency can be set at exactly 10.7 MHz — provided one has access to a fre- quency counter. However, this is not so critical; if no frequency counter is avail- able C20 can simply be set in the middle of its range. The (reference) output signal is taken from pin 3 , as this gives a cleaner sine- wave than the output at pin 7. The stereo filter The stereo multiplex signal consists of Pans lift: R1.R41 = 10 k R2.R9.R31 .R36.R37 = 4k7 R3.R4.R6.R16.R21 .R34.R35 = 1 k R5 - 3M9 R7.R14.R23- 1k5 R8.R10 - 47 k R11.R12.R39.R40 = 100 k R13.R32 - 2k2 R15-470Q R17.R18 - 270 12 R19 * 22 k R20- 120 f2 R22 = 390 n R24.R25 - 470 k R26.R28.R29.R30.R33 = 1 5 k R27 - 330 R38 » 27 k R42 - 56 k R43.R44.R45 - 560 J2 R46 = 1 50 12/2 W PI = 47 k preset P2 = 10 k preset P3 - 4k7 preset P4 = 220 k preset P5 = 2k2 preset P6 = 22 k multiturn Capacitors: Cl ,C6,C7,C8,C1 0,C1 8.C1 9,C45,C46 = 100 n C2,C4= 220 p C3.C5.C9.C12.C1 5= 1 n C11 = 68/Z/16 V Cl 3.C36.C37.C38 = 1 0 /i/1 6 V C14 = 47 /i/16 V C16 = 1n8 Cl 7 = 68 p C20.C22 = trimmer 10 ... 60 p C21 ,C32 = 470 n C23 = 1 50 p C24.C25.C26 = 120 p C27 = 47 p C28 = 2/i2/16 V C29 = 47 n C30 - 470 p C31 ,C34 = 220 n C33.C35 = 1 0 n C39 = 470 Hi 25 V C40 = 47 /i/6 V C41 .C42.C43.C44 = 470 /i/40 V Semiconductors: T1 = BFY90. BFY89 T2.T6 - BC557 T3.T4.T7 = BC107 T5 = BC547B D1.D2- 1N4148 D3.D4.D5 - LED D6 = ZTK22 (22 V) (see text) B - 4 x 1 N4001 IC1 ,IC2 - 703 IC3 = CA3080 IC4 = MCI 31 OP IC5 « TBA625B Sundries: LI = ferrite bead (see text) ceramic filter SFC 10.7 (red dot) SI = switch. SPST meter = 400 /iA fuse - 100 mA TOKO-tuner EF5600 Figure 6a. The RF preamplifier stage and three components: wanted) signals centered around mul- Toko front-end. - an AF signal from 30 Hz to 15 kHz; tiples of 38 kHz. For the best signal-to- - a double sideband suppressed carrier noise ratio it is thus important that no Figure 6b. The aerial transformer: a ferrite signal centered around 38 kHz, from signals above 53 kHz are fed to the be#d ‘ 23 kHz to 53 kHz; stereo decoder. To this end, the filter Figure 7. The circuit of the 'IF stage and “ a P Uot si S na1 ' derived from the orig - shown 111 fi 8 ure 9 has been added. The detector’ and the tuning indicator LEDs. inal 3 8 kHz carrier , at 1 9 kHz . best channel separation is obtained It can be shown that stereo decoders when the phase shift at 38 kHz is zero Figure 8. The 10.7 MHz reference oscillator will not only detect the signals in the 23 degrees; this can be set with C22. For (also shown in figure 7). to 53 kHz band, but also other (un- this adjustment it is best to use a strong 118 — elektor jartuary 1976 feedback pll for fm (local) transmission or a stereo test generator. C22 is simply set for maxi- mum separation. Stereo Decoder The stereo decoder (figure 1 0) uses the now commonplace Motorola MCI 31 OP PLL IC and needs little explanation. The only setting up required with this type of decoder is to tune the oscil- lator so that the free-running frequency is 19 kHz. This is accomplished by means of P3. The channel separation is about 40 dB. A LED (D5) is included as a stereo indicator beacon. The decoder outputs provide nominally 100 mV Figure 9. The stereo fitter. Figure 10. The stereo decoder. Figure 11. The power supply, including the smoothing end stabilisation for the tuning voltage. Figure 12. The p je. board for the complete receiver, including front-end, stereo decoder and power supply (fibres 6a. 7, 9, 10 and 11). Note that the board consists of three sections that are joined together with wire links. Figure 13. Pin configurations of the two types of ceramic filter. Figure 14. A typical tuning scale meter cali- bration. which should be adequate to drive most amplifiers. The amplifier input im- i pedance should be not less than 22 k. The power supply The receiver is relatively insensitive to variations in supply voltage, so that a fairly simple power supply circuit can be used (figure 11). The resistor (R46) in series with the stabiliser IC reduces the power dissipation in the IC and, at the same time, keeps its input voltage safely below the maximum value (24 V). The tuning voltage must be derived from a well smoothed and temperature- independent supply. This consists of C41 to C44, R43 to R45, and a tem- perature compensated zener diode (D6). If the ZTK22 is difficult to obtain any other 22 V zener can be used, provided it is temperature-compensated. If there is any doubt on this score, however, it is advisable to use four 5.6 V voltage refer- ence diodes in series. Construction The parts list gives details of all the re- quired components. Equivalent types are given where possible. The p.c. board 13 / s / • \ / ° \ ; • i 1 • i \ , i sV SFE SFC 107MHz 10.7 MHz 9356 13 L C. J. Both and component layout are given in fig- ure 12. Both SFC and SFE type ceramic filters can be used; in both cases they should carry a red dot which shows that they are exact 10.7 MHz types. The pin con- figurations of the two types of filter are different (figure 13), but the board will accomodate both types. The Toko CFSA 10.7 filters can also be used; the pinning corresponds to that of the SFE 10.7 MHz. For these filters ‘no colour code’ denotes an exact 10.7 MHz type. A cheap moving coil meter can be used for the tuning scale; it measures the tuning voltage, but the scale can be calibrated in MHz. Figure 14 gives an example. The actual calibration can be done either by tuning in to several known transmitters in succession and marking them on the scale, or else by measuring the tuning voltage and calibrating the scale in accordance to the graph shown in figure 4. An entirely different possibility is to use a slider potentiometer for P6 and calibrate a scale for it in MHz; the tuning meter then becomes redundant. The front-end should be mounted on the p.c. board and wired to it with stiff links. Connections to the tuning poten- tiometer and the tuning scale meter should be as short as possible to avoid hum pickup. It is advisable in any case to use screened cable for these leads. Sockets should be used for the ICs, especially by the less experienced con- structor, to avoid damage during soldering. lator is set at 10.7 MHz. Otherwise simply leave C20 in the middle of its range - the frequency will not be far off. - Make sure that there is no reception as yet (if necessary, tune away from any station with P6), and adjust P2 until both tuning LEDs (D3 and D4) light equally brightly. - Plug in the aerial. It should be poss- ible te receive some stations by tuning in with P6. Select the strongest stereo transmission available, then turn PI anti-clockwise until distor- tion just becomes inaudible. PI is correctly set when there is no distor- tion and slight retuning (with P6) produces no change in volume. - Now P3 in the stereo decoder should be adjusted as follows: P3 is adjusted until the stereo LED (D5) lights and is then set to the middle of the range over which the LED is lit. - After this adjustment, recheck the setting of PI — some minor readjust- ment may prove necessary. - Next, set C22 for maximum stereo channel separation. - Set P6 at minimum; P5 is now ad- justed so that the low frequency end of the band is at 87 MHz (tuning voltage approximately 3.5 V). - Finally, with P6 at maximum, P4 is set for full scale deflection of the tuning meter if this is included. The tuning meter scale (or slider poten- tiometer) can now be calibrated as described under ‘construction’. in drive or mi in drive . . . Driving a car immediately after drinking too much alcohol is asking for trouble - even if one doesn't happen to run into a police check. One could all too easily run into something else! Most drivers have found that they can drive safely (?) on the recipe 'one glass per hour'. The trouble is that it is so difficult to keep to that one glass - and that the more one drinks the more one's confidence will override the fear of getting caught. Simultaneously one's ability to react to a critical situation correctly and fast will diminish drastically. The slower reactions of a person 'under the influence' form the basis of this 'drive'/'no drive' tester. Alignment When construction is complete (check that the ICs are the right way round in the sockets!) turn PI and P2 fully clock- wise, and set all other potentiometers and trimmers in the middle of their range. Now switch on and check the supply voltages. Do not yet connect an aerial. Alignment now proceeds as follows: - If a frequency counter is available, readjust C20 until the reference oscil- Editorial note: The author suggests using the circuit to block the ignition in a car. We do not advise this - think of what would happen if you stalled your engine in the centre of a busy crossing! However, the unit can be quite useful as a reaction tester in its own right — e.g. to test departing guests after a party, so that taxis can be ordered as required 120 — elektor january 1976 The ‘drive’/'no drive’ tester is provided with ten push-buttons, two signal lamps and a minitron (see figure 1). It is in- tended to be wired into the starter-cir- cuit, to prevent a slow-reacting would- be driver from actually starting the engine (see editorial note!). The tester is then activated when one turns on the ignition. The device can of course be provided with a mains supply and used indoors (at the end of a party?). What happens is the following: when the ignition is switched on the minitron will display a random numeral. The would-be driver now has to press the corresponding button, as quickly as possible, holding it down until the minitron changes to a different numeral - then quickly press the new corre- sponding button, etc. After a few of these tests, assuming that they are all performed inside the time limit, a relay will attract and hold. The ‘drive’ indi- cator will now light up and the engine can be started. If however any reaction time is too long, the ‘no drive’ indicator will not go out at the expected end of the programme and the starter circuit will remain blocked. Turning off the ignition will reset the tester (by inter- rupting the supply), after which the test can be attempted again (if one wishes). To allow for individual differences in ‘normal’ reaction time two presets are included, PI and P2, which respectively control the interval between renewals of the display and the total time taken by the succesful test (i.e. the length of time for which one must “keep it up’). The programming circuit consists of a ‘high’ and a ‘low’ frequency oscillator (N1 and N2, respectively, with associ- ated components). The former produces a square wave at a repetition frequency of a few kilohertz, while the latter switches between positive intervals of less than a second and longer negative intervals that can be preset by PI. The ‘low’ oscillator is arranged to key the ‘high’ one off during its negative inter- vals, so that the result is a series of kilo- hertz pulse-trains separated by shutoffs of a few seconds duration each. The kilohertz pulses are counted by the SN 7490 (IC3) and the result presented in BCD form to the SN 7447 (1C2) and SN 74141 (IC4) decoders. The SN 7447 delivers a seven-segment drive directly to the minitron. The SN 74141 decoder produces decimal outputs (inverse logic! Decoded output is ’O’), each of which is passed (during the negative intervals) to the reaction timer, via a resistor and a diode. As long as one of the decimal outputs is reaching the reaction timer, the electrolytic (Cl) will be receiving a charge. This process can only be inter- rupted in time by pushing and holding the correct button, which will ‘kill’ the decimal output concerned. If, on the other hand. Cl is charged far enough it will “fire’ the thyristor-like circuit of T1 and T2. This latch-circuit’ will be reset (and Cl discharged) at the next positive interval of the low’ oscil- lator. In the meantime the master time- switch, the heart of this tester, has been ticking away the seconds since the power was turned on. It consists of P2, C2, T3 and T4. The interval that must elapse before this time switch fires can be preset by P2. When the electrolytic is sufficiently charged, the current through T4 will cause the relay to attract. This relay will ‘hold’ via one of its contacts, so that it can only be released by interrupting the power supply. A second contact turns off the tester proper and replaces the ‘no drive’ indication by ‘drive’. The remaining contacts (in parallel) are wired in series with the car’s starter relay circuit, so that they enable the engine to be started. Whenever a too-long reaction time causes T1 and T2 to latch, the main timing capacitor (C2) will be discharged, essentially restarting the test period. It is only possible to obtain a ‘drive’ permit after a sufficient number of sufficiently quick reactions has been successively performed. As already noted above, the tester is cleared by a short interruption of the power supply. Bear in mind that the necessary 5 volt supply will have to be derived from a vehicle battery of which the voltage can drop quite far during starting! One could spend hours discussing to what extent a piece of hardware can be expected to stand in for the failing sense of responsibility (or lack of self-dis- cipline) of a human being. Perhaps the final remark could be this: use push- buttons of a recessed type, to prevent the subject of the test from depressing them all simultaneously! 122 - elektor January 1976 optical- lock An electronic lock, which is opened using a binary encoded optical key can easily be constructed using ‘home-made’ phototransistors and CMOS logic ICs. The principle of operation is very simple. The lock consists of a row of phototransistors, which can be illumi- nated by a lamp. The key is a strip of transparent plastic with sections opaqued to form a binary code. The circuit Figure 1 shows the circuit of the optical lock. For simplicity only one photo- transistor is shown, but there are 8, each connected to the input of a NAND- gate as is the own shown. Each photo- transistor has a 1 M collector resistor. When a transistor is illuminated its leakage current increases and the collec- tor voltage falls. When it is not illumi- nated the leakage current is very small and the collector voltage is almost equal to supply voltage. The illuminated and non-illuminated states therefore corre- spond to logic ‘0’ and logic ‘ 1 ’ respect- ively on the input of the NAND gates (connected as inverters). When the key is inserted into the lock it depresses a microswitch (SI) so that the lamp lights (see figure 2). The opaque sections of the key correspond to logic T’, and the transparent sections to logic ‘O’. The outputs of the phototran- sistors thus assume the binary code. Switches S3 to S10, which are used to set up the coding of the lock, are so arranged that any ‘0’ outputs are comp- lemented by the inverters, while ‘l’s are connected straight to the inputs of the 8-input NAND-gate. Thus only when the correct key is inserted will all inputs to the NAND- gate be ‘I’, so its output will go low. This triggers the monostable (H4528) producing an output pulse (1) which can be used to operate a solenoid bolt. The Q output of this monostable also inhibits a second monostable. De- pression of microswitch SI by the key triggers the second monostable, whose output (2) is connected to an alarm circuit. Should an incorrect key be inserted then the output of the 8-input | NAND-gate will not go low and the first monostable will not be triggered. Thus the second monostable will not be reset by the Q output of the first, and the alarm will sound. The alarm may be reset manually by S2. Practical notes The coding of the lock is set up using switches S3 to S10. Where a particular bit of the code is to be a ‘1’ then the relevant switch is left in the position where the inverter is bypassed. Where a bit is to be *0’ the switch is placed in the position where the output is taken from the inverter, thus complementing the bit and producing a ‘1’ at the input of the 4068 8-input NAND gate. If one sixpence detector for 2 ■ This handy metal de CVIl ISlIIlQS increase one’s chanc _ piece of Christmas pi Duddino pence “ *■ ™ a ° n ' ” silver threepenny bil I This handy metal detector will greatly increase one’s chances of obtaining a piece of Christmas pudding with a six- pence in it, or if one is really lucky, a silver threepenny bit (Daddy, daddy, what’s a threepenny bit?). The principle of operation is simple and well-known. It consists basically of two oscillators, one of which is a fixed fre- quency reference oscillator, and the other an oscillator whose frequency- does not wish to change the lock code frequently then the switches may be replaced by hardwired links. The number of possible codes for the lock depends upon the number of bits used. In the circuit given 8 bits were used for convenience of the IC package count (2 x 401 1 and 1 x 4068 required) but there is no reason why the number of bits cannot be extended. Using 8 bits gives 2 8 - 2 or 254 possible combi- nations. The code 00000000 is not used as this corresponds to total illumination, which could be accomplished by an intruder depressing the microswitch with a piece of stiff wire or transparent plastic. Similarly 11111111 is not used, as in the event of lamp failure this code would be registered whatever key was used. Finally, excellent phototransistors can be made from BC 108s by (carefully) sawing off the top of the can and filling with transparent casting resin as sold in handicraft shops. determining inductance is a search coil. Initially the two oscillators are adjusted so that their frequencies are nearly the same. The two outputs are fed into a mixer which will produce the sum and difference frequencies and the oscil- lators are adjusted so that the difference frequency (beat note) is in the audio band. If a metallic object is now brought near the search coil its inductance will vary, altering the oscillator frequency and hence the beat note. The circuit is very simple and is de- signed around a CD4011 quad 2-input NAND gate. The reference oscillator uses an inverter (Nl) as the maintaining amplifier and a 470 kHz ceramic filter as the frequency determining element for stability. The variable frequency oscillator (N3) uses an LC resonant circuit with the search coil (LI) as the inductor. This can be a coil of about 70 turns of insu- lated wire and a diameter of approxi- mately 50 mm (2"). The mixer is simply a NAND gate (N2), and the 4th NAND gate in the package (N4) is used as a buffer amplifier behind the variable frequency oscillator. If a crystal earpiece is used, the transis- tor can be omitted — the output of N2 can drive the earpiece. sqhUMwL 124 - riektor j«nu»ry 1976 function generator ic 22 function ic ZZ06 gcnErator Function generating ICs have beenj on the market for several years. Now one can refer to a 'second generation' of these ICs, for technical progress has resulted in ] improved performance at only slightly higher prices. A commonly used function generator IC is the type IC 8038 (ICL). This IC how- ever has several ‘blemishes’, which severely limit its application. In particu- lar the distortion factor of the sine sig- nal, the frequency range, the linearity and maximum frequency sweep of the VCOs are not satisfactory. The newer IC XR 2206 (Exar) offers, apart from substantially better performance, ad- ditional functions also. The advantages of the IC are summarised in table I, while table II lists the most important applications. Description of functions The IC contains four groups of func- tions as shown in figure 1, i.e. a voltage controlled, oscillator (VCO), a function block ‘switchable current sources’, an analogue multiplier with sine convertor, and a buffer amplifier. The central unit of the function generator is the VCO. This is actually a current controlled oscillator (which by the way applies to most VCO circuits)! The frequency of the VCO is determined by a capacitor and a control current. Integrated current switches switch this current to one of the two current outputs (pin 7 or 8) of the IC, depending on the logic level of the selector input (pin 9). A linear re- lationship exists between the control current If, flowing from one of these outputs to earth, and the frequency of the VCO as follows: f.i + * R ^ - Table VI gives information about the ‘quality’ of the square output signal. The analogue output 2 gives an asym- metric triangular waveform (R1 =£ R2), and at very low or high duty cycle (< 10% or > 90%) the waveform be- comes a sawtooth. Frequency shift keying (FSK) The term frequency shift keying means the transmission of digital data (e.g. symbol transmission) by two fixed fre- quencies representing logic ‘0’ and ‘1’. This mode of operation is also possible with the IC 2206. As two interswitch- able current outputs are available, two different frequency determining re- sistors can be inserted, thus producing two different fixed frequencies. The change-over takes place by means of a digital input control (FSK input pin 9). The FSK input is TTL compat- ible. At voltages >2V or open circuit input, the control current flows via R1 , and at voltages < 1 V it flows via R2. To make the relationships clear, a truth table is given in figure 5. The circuitry associated with the signal processing section is analogous to fig- ure 2 and depends on the required shape of the output signal. Summary The examples of application given are intended as a survey of the many possi- bilities resulting from the IC concept. Wherever there is a requirement for the production of signals of differing wave shape, at frequencies of up to several hundred kilohertz, it is worthwhile to consider whether the requirement could be met by the use of such an integrated component. This applies in particular to the hobby motivated electronic enthusi- ast because the combination of rela- tively complex circuit functions in one IC gives greater reliability to the com- plete circuit. Literature: EXAR Data sheets and application reports. Amplitude modulation The amplitude of the sine/triangular output changes linearly with the voltage at AM input pin 1 of the IC. This makes amplitude modulation of the signal poss- ible. If the modulation voltage reaches the value Vb/2, then a phase shift of the output signal takes place, and at the same time the amplitude passes through zero. Thus the IC is also suitable for announce- ment Our offices will be closed on Wednesday, Thursday and Friday 24 - 26 December, and on Newyear's day. The Monday afternoon technical queries service will not be available on Monday 29 December. Front-end for TV sound - this will convert the existing design (Elektor no. 2, p. 236) into an entirely independent receiver for tv sound. Automatic rhythm generators for the minidrum - add-on units that will give several complete rhythms at the flick of TV tennis extensions - additions to the basic game (Elektor 7, p. 1111) giving new games, noises and scoring. Audio preamplifier - a low-cost, high performance preamplifier and control ampli- fier with 'remote control' capability. Digital wrist-watch — using only one Morse code units - a reader, writer and automatic call generator. 128 - elektof january 1976 racing car control The motor of the racing car is included ■ in the collector circuit of T3 and is I driven by the negative pulses of the I monostable which have a constant I width. This is how the ‘engine’ sound is obtained. The frequency of this pulse train and consequently the speed of the motor is determined by the speed of the astable which as already explained can be varied by means of R9 and P 1 . D2 and C4 are fitted to suppress any back e.m.f. generated by the motor of the racing car. Figure 3 shows the board and figure 4 the component layout of the race-track J control. If the case of the existing supply unit is sufficiently large, the complete circuit can probably be built I in. Should this not be possible, a separate box can be used as illustrated I in figure 1 . Figure 5 shows a photograph of a com- 1 pie ted board. Adjustment The voltage supplied via the trafo may I Figure 1. The controller in use, connected be- tween the mains power unit and the race track. Figure 2. The circuit diagram for race-track control. It is recommended to use a preset potentiometer for R9 (see text); PI is the external squeeze control. Figure 3. P.C. board for the race-track con- trol. Figure 4. Component layout of the board shown in figure 3. Figure 5. A photograph of the board com- plete with components. In most cases the current for a racing track is supplied by a mains voltage unit fitted with a three-position switch, with which the maximum voltage, and hence the maximum speed of the car can be adjusted. Although it is likely that in practice only the fastest position will be used, it is in view of the younger racers that the circuit is so designed that (by means of a potentiometer) it can be used with all positions of the switch on the supply unit. Actual ‘acceleration’ is done with an external potentiometer, for which the existing squeeze control can be used, although an ordinary 1 50 carbon po- tentiometer will give better results. A handy tinkerer will undoubtedly find a way of also using an ordinary rotary po- tentiometer with the ‘squeezer’! Fig- ure 1 shows what the circuit described here might look like in practice. The diagram The design of the race-track control comprises a monostable multivibrator which is triggered by an astable multi- vibrator. The motor in the racing car is driven by the negative-going pulses of the monostable. The width of these pulses is constant; the frequency (and hence the average voltage to the car motor) is governed by the setting of the astable. By means of the squeeze-potentiometer the fre- quency of the astable and indirectly the speed of the racing car is controlled. Figure 2 shows a circuit diagram. T1 and T2 are used in the astable. This astable is emitter-coupled, which does slightly decrease temperature stability, but has the advantage that only one capacitor (C2) is needed. The frequency of the multivibrator can be adjusted by R9 and PI. Here potentiometer PI represents the squeeze control. The square wave produced by the astable is differentiated by capacitor C3 and the base-emitter junction of T3. The negative-going pulses are clipped by Dl. The remaining positive pulses arrive at the base of T3 thus triggering the monostable consisting of T3 and T4. range from 8 to 18 volts. The maximum current consumption may be 800 mA. If a three-position mains supply is avail- able, the value of R9 must, of course, be adapted to the various voltages. In the ‘slowest’ position R9 must be about 47 J2, in the centre position about 56 S2, and in the ‘fastest’ position about 82 £2. It would be easy, of course, to use a 1 00 £2 adjustment potentiometer for R9; this possibility has been taken into account in the board layout. With the mains supply set in a particular position the best adjustment procedure is as follows: the squeeze control (PI) is first fully depressed and held in that position. Then R9 is so adjusted that the connected racing car runs at the maximum required speed. When the mains supply unit is set to another switch position, this adjustment must be repeated. it Part* lilt Resistors: R1 = 4k7 R2-1 k R3 « 2k7 R4 = 330 £2 (270 £2) R5.R6 = 680 ft R7 = 270 12 R8 = 68 £2 R9 = see text PI = existing 'squeezer' control 60-100 £2 (or potentiometer 150 SI) Capacitors: Cl = 1 000-2200 Al/25 V C2 = 100 /i/10 V C3 = 2n7 C4.C5 = 10/i/25 V Semiconductors: T1,T2= BC107B T3.T4 = BC140 01 = DUS D2 = 1N4002, BY126 130 — elektor january 1976 mini- MW R2 = 39 k R3 = 6k8 R4 = 2k2 PI - 1 k potentiometer Capacitors: Cl - 500 p (variable) C2 = 100 n C3 = 470 p C4,C5 - 4*17/ 6 V Miscellaneous: T1.T2- BC 549C LI = tuning coil (see text) This receiver is so simple that very little outlay is required for its construction, and since only a small number of components are used it is ideal for minia- turisation, so that it will easily fit in a coat pocket. Nevertheless it gives good reception of local stations without the need for an external aerial or earth. Operation of the receiver is exceedingly simple. Transistor T1 functions as an r.f. amplifier and detector with regen- erative (positive) feedback. The degree of feedback, and hence the sensitivity of the receiver, can be controlled by PI . Although the output to the base of T 1 is taken direct from the ‘top’ of the tuned circuit LI /Cl, rather than via a coupling winding, the impedance pre- sented by T 1 is sufficient to ensure that the resonant circuit is only slightly damped. Since the current gain of T1 reduces towards the high-frequency end of the band, whilst the input impedance increases, the gain of this stage remains fairly constant over the whole band, so that it is generally necessary to adjust PI only once. Detection takes place at the collector of T1 and the output impedance of this stage and C3 filter out the r.f. compo- nent of the rectified signal. T2 provides additional amplification of the a.f. signal to drive a crystal earpiece. Construction A very compact p.c. board layout is shown for the receiver. LI should be mounted as close as possible to the board to avoid instability problems. Those who wish to miniaturise the design still further can experiment by reducing the dimensions of the ferrite rod and increasing the number of turns to achieve the same inductance, though if LI is made very small an external aerial may be necessary, which can be connected to the top end of LI via a 4.7 p capacitor. The recommended dimensions for LI are 65 turns of 0.2 mm (36 S.W.G.) enamelled copper wire on a 10 mm diameter 100 mm long ferrite rod, with the tap 5 turns from the ‘earthy’ end of the coil. Cl can be a miniature (solid dielectric) 500 p variable capacitor, or for recep- tion of a single station only it may be replaced by a fixed capacitor of just less than the required value in parallel with a 4-60 p trimmer. This will enable the size of the receiver to be further reduced. Finally, the current consumption of the receiver is extremely low (approx. 1 mA) so that it will operate for several months on a PP3 battery. • T OO ? ? — 6 SflHtuttQ* battleships elektor january 1976 — 131 R. ter Mijtelen It would seem that fanatical electronic engineers will apply their skills to just about anything — the means justifying the end. This article describes an electronic version of the well known game of 'battleships'. The pencil and paper have been replaced by switches and LED's — under the control of a boxful of TTL. The proposal, as it stands, should provide plenty of fun — as well as a challenge to experienced battleshipsplayers to improve on the details! Figure 1. Example of a 'fleet' positioned in the 10-by-IO square 'sea'. Note that none of the ships touches any other, neither in vertical nor in horizontal direction. The game is played by two participants, each of whom has a control panel. Each player also has a 10-by-10 cross-bar ‘sea’ in which he positions 10 ships by inserting jacks at the desired coordinates. The opponent can ‘shell’ any position by setting up a coordinate on switches before ‘firing’. Any hit is displayed by LEDs. The players fire shells in turn, until one of them has lost all his ships. The original game The original game of ‘battleships’ is played with pencil entries on 10-by-10 sheets of squared paper. Each square is identified by a coordinate-pair, such as A-l. The ships are positioned by out- lining the squares that they occupy. In one version of the game, each player has a ‘fleet’ consisting of: 4 submarines (one square each), 3 cruisers (two squares each), 2 battleships (3 squares in-line) and an aircraftcarrier (4 squares in-line). Ships may be laid out horizontally or vertically, with an unoccupied zone of at least one square all around. (See elektor january 1976 — 133 figure 1). Neither player knows (for obvious reasons!) where his opponent has positioned ships. Suppose now that player 1 opens up by announcing ‘shell on A-l’. The answer is ‘hit’. (If the ship on A-l had been a sub- marine, player 2 would have had to answer ‘hit and sunk’.) Player 1 now only knows that the ship is not a sub- marine - just what it is and how it is laid out he will have to determine during later turns. It is now player 2’s turn to announce a coordinate and receive an answer. Player 1 has to guess the lie of the ship he has already hit. If he is lucky (or, at later stages of the game, clever enough), he will call ‘shell on B-l’ - and the answer will be ‘hit and sunk’. He now knows that the ship was a cruiser and that there is no need to waste ammu- nition on the squares A-2, B-2, C-l or C-2. The unoccupied-zone rule prevents his opponent from using them. The game continues shell-turn by shell- turn until one player has lost his entire fleet, so that his opponent is the winner. The electronic game As already mentioned the ship-pos- itioning in the electronic form of the game is done by inserting jacks at the appropriate points on a 10-by-10 cross- bar. There are several mechanical ap- proaches to this. What in fact happens is that the paired inputs of the logic gates that represent shipping are plugged into the crossed busbars of the ‘sea’. One input goes to one of the vertical busbars A to K (the letter I is omitted), the other input to one of the horizontal busbars 1 to 10. The sea area occupied by each player is scanned by the coor- dinate-switches on his opponent’s playingdesk. The logic circuitry Figure 2 gives the logic circuitry inside the left-hand playingdesk. Note that the ‘sea area’ drawn upper right is that mounted in the right-hand desk. Suppose now that it is the left-hand player’s turn, indicated by the glowing j of LED 22 (‘ready to fire’). The output [• of N3 is ‘O’. The player selects the square he wishes to shell by means of the coordinate switches (in the earlier example A and 1). When he presses the ‘fire’ button, any gate connected to the selected busbars will be pulled down to ‘0’ via C2. The capacitor will prevent an unsporting player from sweeping his opponent’s sea area by rotating the coordinate switches while holding down the ‘fire’ button. When S3 was pushed the input of N1 became ‘1’. The release of this button causes N1 output to go to ‘O’, so that one of the inputs of N3 is momentarily pulled down via C3. The set-reset flip- flop will now change state. The output of N3 is ‘1’, so that a second push on the ‘fire’ button has no effect. A glowing LED on the right-hand playing desk indicates to the other player that it is now his turn. Figure 2. Circuit diagram of one half of the complete game, in this case the part that is installed mainly in the left-hand playing desk. The parts that inform the opponent of successful 'hits’ and the 'ships sunk', the reset button and the ‘sea* cross-bar on which he lays out his fleet, are installed (as given in the figure) in the right-hand playing desk. Figure 3. A possible layout for the controls and indicators on one playing desk, designed to provide a good survey of operations. The 'sea' cross-bar (that could for instance be a jack-field) is not shown. In the example given above the shell on A-l was a ‘hit’. What happened in the circuit when the left-hand player pushed his firing button? It is convenient to trace the ‘hit’ in the circuit of sub- marine 1 , to the upper left of figure 2. The two NOR gates N 1 and N2 together form a set-reset flipflop. The reset input R is connected via S4 (push to reset) to the negative rail, so that it is at ‘0’ level. If the output Q of N1 is at ‘O’, the flip- flop will change state when a ‘1’ arrives at the set-input S. This will occur when- ever both inputs of N3 go to ‘0’ - which is precisely what happens when these inputs are momentarily grounded via the sea-busbars and the opponent’s coordinate switches and firing button. As long as Q is *0’ LED D1 will glow 134 — elaktor january 1976 led fm scale and LED D1 r will be dark. D1 indicates the unsunk member of the home fleet - DIr would indicate to the opponent that he had sunk the submarine. This indication is given when the flipflop N1/N2 changes state, causing DIr to glow and D1 to extinguish. Each player clearly needs four of these circuits to represent his submarines. The other ships are represented by similar circuits, having one SR-flipflop for each square the ship occupies. When all the LED’s associated with any ship have extinguished, the NAND gate that moni- tors the wellbeing of the ship concerned will indicate to the opponent that this target has been sunk. Only then does this player know what type of ship he has sunk; up to then he was only informed by a ‘hit’ indicator that illuminates for a few seconds after each successful push on the firing button. The ‘hit’ indicator consists of a SR- flipflop, transistor T1 and LED 21. The input of N1 is normally at ‘1’, because this input is connected via R2 to the positive rail. Whenever a ‘0’ impulse arrives from a Q output of one of the shipflops (sorry!) the SR-flipflop in the ‘hit’ indicator will switch, causing LED 21 to glow. The output of N1 will go to ‘1’, so that Cl will charge through R5. After about 3 seconds this results in T1 starting to conduct, thereby pulling down the N2 input. This resets the flip- flop, extinguishing LED 21 until the next hit is made. Each player has one ‘hit’ indicator, which is connected to the Q outputs associated with the enemy ships. Before a game can start it is necessary to reset all the shipflops. This is done by pressing the push-to-break button S4. To make it unattractive to a player to accidentally-on-purpose use the reset facility during the actual game, it is arranged that the left-hand player’s fleet is reset from the right-hand playing desk (and vice-versa). A player who presses the reset button on his desk, during the game, puts himself at a great disadvantage - since he cancels the record of all his own successful hits. The display Figure 3 shows a possible layout for either playing desk, intended to provide a good survey of operations during the game. The upper section indicates the damage done to the enemy fleet - which ships have been sunk. The drive to the 1 0 LED’s in this section comes from the opponent’s desk. Figure 3 shows the LED’s D1 l through D10 l, correspond- ing to DIr through DIOR on the circuit diagram of the left-hand desk. The centre section provides full infor- mation on all hits placed on ships of the home fleet. A ship is sunk when all the LED’s associated with its display are glowing. M LED FM scale With home-made FM-tuners, the design and construction of the tuning scale often causes much brain racking. A mechanical solution is excluded from the very beginning because of the con- structional difficulties. In many cases the only option left is a display of the tuning voltage (in the case of varicap tuners) by means of a voltmeter with its scale calibrated in frequency. A Siemens IC type UAA 170, together with a few external components, pro- vides an electronic scale. The table shows the relationship between tuning voltage, frequency, and LED read-out. Only one LED is lit at any time. The maximum available tuning voltage is connected to input A. This voltage must be kept constant as a reference voltage. The variable tuning voltage is fed to input B as control voltage. The t . R6 J R7 resistance ratios — and — determine the voltage difference required for each step of the LED display. The circuit values are chosen such that the voltage difference corresponds to a frequency change of 2 MHz. The preset potentiometer R1 is used for scale adjustment. While R1 is being adjusted, the tuning voltage must be checked with a voltmeter. The adjust- ment is correct if the corresponding LEDs light up at the voltages given in the table. Table Tuning Voltage Range* LED < 4 < 88 D1 4 88 D2 5 90 D3 6 92 D4 7 94 D5 8 96 D6 10 98 D7 12 100 D8 15 102 D9 18 104 D10 H elektor january 1976 — 135 alarm An alarm which gives its alarm signal at certain repetitive times, does not need to know what the actual time is. It is sufficient if it can measure the time between the alarm time points (for instance 24 hours). An electronic alarm which operates according to this principle, is less expensive than a digital clock with added alarm. The circuit described here is an independent unit, but it can be combined with an electronic or electromechanical clock. With a switch, alarm intervals of 6, 1 2 or 24 hours can be set. Thus the apparatus can also be used as an aquarium time switch, among other applications. The switching off of the alarm signal is carried out by hand, or occurs automatically after 10 minutes. In addition to the alarm signal, second, 10 minute, and hour impulses are also available. The circuit contains four CMOS IC’s type MC 14566 (Motorola). These are available in versions suffixed AL, CL and CP. The letters A and C indicate the temperature range and the maximum permissible supply voltage. The L-types have ceramic packages, whereas the P-type is the plastic version. In the 2411- alarm, all types are usable. Figure 1 shows the block diagram of the IC. The circuit contains a 4 10 counter (block A) and a programmable 4 5 or 4 6 counter (block B). Both dividers are proceeded by pulse shapers (blocks C and D). The inputs react to the negative- going edges of the clock pulses. Both dividers can be simultaneously reset by means of the reset input (pin 2). Apart from this the IC contains a monostable which can be triggered positively (at pin 9) or negatively (at pin 7). The monostable is primarily intended as a pulse shaper for the reset- or timing- signal. With pin 1 1 of the IC connected to +Vb, block B functions as a 4 5 counter and with pin 1 1 connected to supply common, one obtains a 4 6 counter. By connecting the two dividers of the IC in cascade, one can therefore choose a division ratio of 1 :50 or 1 :60. A 4 50 counter produces 1 Hz pulses if it is fed with 50 Hz pulses obtained from the mains. This divider can there- fore also be used as a time base for six digit digital clocks. In the 1 :60 division circuit the IC is used as a second or minute counter. The outputs of the two dividers provide a BCD-coded signal. By means of BCD- decoders, displays can be controlled, so that by this means a digital clock can be produced. In the case of the ‘alarm only’ decoder and displays are superfluous. When the alarm is in operation, after a predeter- mined count is reached automatic reset occurs, and at the same time the alarm is restarted. The reset signal thus occurs at regular intervals, and it can therefore be used to trigger the alarm signal. This is initiated by a flipflop which is trig- gered by the reset pulse. The alarm signal then continues, until a manual or automatic reset impulse arrives at the flipflop. Alarm time intervals of 6, 12 or 24 hours can be set with a selector switch. The circuit In figure 2 the complete circuit is given with the exception of the power supply. The alarm contains four IC’s, MC 14566. The first IC (IC 1 ) divides the 50 Hz signal, which is fed to its input via the RC-filter Rl/Cl, down to 1 Hz. At its output there are second pulses. This output is taken to the edge of the printed circuit board, and is easily accessible (connection 1 on the printed circuit board). From this point digital clocks without a time base can be provided with a 1 Hz timing signal. The 1:50 divider is followed by two 1 :60 dividers. Hour pulses are available at the output of the second divider (IC3). This output is brought out, as is also a further output which gives 10-minute pulses. If required the 10-minute output can be used to switch off the alarm note after 10 minutes. For this purpose, this output (connection 2 on the printed circuit board) is connected via a diode to the input of gate N4, (pin 8), the cathode being connected to the divider output. An hourly chime can be connec- ted, for instance, to the hour-output (connection 3 on the printed circuit). The output is almost permanently con- nected to the input of C4. This has div- ision ratios 1:6, 1:12 and 1 :24 which are selected by switch S3. The alarm sounds, therefore, every six, twelve or twenty- elektor january 1976 136 - four hours are starting the alarm, depen- dent on the switch position. At the end of the set period the Qm output (pin 10) of the monostable becomes ‘1’. At this moment resetting of all dividers takes place via two NAND-gates, N1 and N2. Simul- taneously, the flipflop consisting of N3 and N4 is set. Transistor T1 switches on relay Rel, the contact Rel of which switches the supply to the alarm bell. To switch off the alarm note, the flip- flop must be reset. This is done either by hand, by operating S2, or as described automatically by the 10- minute output of IC3. The setting of the alarm : If it is assumed that the alarm call shall take place at 8.35h every morning, then switch S3 is put in position *24’, and the push- button SI should be pressed at 8.35h (on the first morning). By this means all divider stages are given a reset pulse, and Figure 1. Block diagram of the internal I I circuit of the MC 14566. 3 Figure 2. Total circuit of the alarm, excluding power supply. The unit can also be used as time switch, such as for aquaria. Figure 3. In the power supply there is a choice between stabiliser 1C TBA625A, or type L 129. The printed circuit board is designed for both types. Figures 4 and 5. The alarm circuit board, which also contains the power supply. 81 = TBR 1050/BY164 IC6 = L129/TBA625A elektor january 1976 — 137 the first alarm period is started. If one wishes to connect the alarm to a digital clock, then for the alarm time to agree with the clock display it is essential to operate both devices from the same time base. The printed circuit board The printed circuit board (figure 4) contains the complete alarm circuit, including the power supply. From the component lay-out (figure 5) it can readily be seen that the printed circuit board is suitable for two different types of bridge rectifier, or regulator IC’s respectively. When mounting the components it is best to start with the power supply. When this is completed, one can check whether the stabilised voltage of +5 V is present. If this check is satisfactory, then the rest of the circuit can be com- pleted. It should be noted that although the MOS-IC’s are already protected by internal diodes, care should nevertheless be taken in handling these components. Parts list for figures 2 and 3. Resistors: R1 = 100 k R2.R4.R5 = 1 M R3 = 27 k Figure 3 shows a stabilised supply which can be mounted alarm printed circuit board. The power supply uses an int 5 V regulator (IC6), and one can between types TBA625A and L 129. To prevent excessive loading of the connected to the on the Capacitors: Cl = 47 n C2 = 470 /i/25 V C3 = 10/1/10 V (Tantalum) 04= lOOp regulator, the relay unstabilised voltage (+10 V). At the output of the mains supply there is an electrolytic capacitor to suppress any oscillatory tendency. It is best to use a tantalum electrolytic capacitor in this position because of its low self-induct- Miscellaneous: Re = Relay 10 V, min. 100 £2 SI £2 = key 1 x ON S3 = switch single-pole 3 way The printed circuit board is laid out in such a manner, that two alternative bridge rectifiers can be used, the TBR 1050 and the BY 164 138 — elektor january 1976 H capacity relay The capacity relay consists basically of an oscillator, a detector and a relay driver stage. A length of wire is connected to a ‘sen- sitive’ point in the oscillator circuit. Any object in the vicinity of this wire will load and detune the oscillator; the extent to which this occurs depends on the size of the object, how ‘lossy’ it is, how close it is to the wire, and, of course, how stable the oscillator is. A large salt water container, such as the human body, is particularly effective. The preset potentiometer PI is used to Safe 1®V* «5j Resistors: R1,R3 = Ik R2 - 270 R4.R6 = 100k R5 = 47 R7= 1M PI - 4k7 Capacitors: C1,C4,C5= 470p C2 = 4n7 C3.C6 = 270p C7 = 47n . . . 10/i/3V Semiconductors. T1 - E300 T2= BF494 T3,T4 - BC547B D1 - 9.1 V zener (400 mW) D2 . . . D5- 1N4148 so adjust the oscillator stage (T1 ) that it will only just start to oscillate. This adjustment should be made with the ‘aerial’ connected, so it becomes a ques- tion of trial and error: after each re- adjustment one must step back a few paces to see whether the oscillator will start again. The oscillator drives an amplifier and detector stage (T2, D2, D3). As long as the oscillator is running, the base of T3 is driven negative. If a sufficiently large object approaches the aerial, however, the negative drive to T3 disappears. R7 I® Jr I $ hp ~m\ —an— 'i I i elektor january 1976 — 139 Pin the tail on the donkey then supplies sufficient current to turn on the Darlington configuration (T3, T4), so that the relay will attract. The relay current should not be more than 50 mA. C7 determines the speed with which the circuit reacts. When properly adjusted, the circuit should detect a person within three feet of the aerial. The sensitivity in- This is an electronic version of an age- old children’s party game. The game is extremely simple. A large picture of a donkey (less tail) is pinned up on the wall. The contestant is blindfolded and provided with a ‘tail’ which must be pinned in the appropriate location on the donkey’s posterior. The area around the tail location on the donkey is marked off with concentric circles denoting scores; 50 for ‘bull’s-eye’ (or should we say ‘donkey’s . . . ’?!), 25 for first circle and so on. The electronic version provides auto- matic indication of the score. Operation is extremely simple. The ‘target’ is made up of four concentric circles of alu- minium foil glued to the back of the card on which is drawn the donkey. An output lead is taken from each circle to one of the inputs of a decoder made up of 2-input NAND-gates. This decodes the 4 outputs into BCD to drive the 7447 seven segment decoder-drivers. creases if a longer wire is used. The coil consists of 50 turns of 0.2 mir enamelled copper wire (36 SWG) on i high frequency type core. which drive the display. The four codes hardwired into the decoder correspond to scores 50, 25, 10 and 5. Normally, all inputs to the decoder are high and the display is zero. When the tail (an earthed probe) is pinned to the donkey one of the inputs to the decoder is grounded and the appropriate score is displayed. If the tail is outside the outer circle the score remains at zero. If the tail is pinned in the gap between two circles then the contestant takes his turn again. simple mw receiver The alignment of superhet receivers presents problems that may deter some enthusiasts from undertaking their construction. A simple MW superregenerative receiver presents no such difficult- ies, and the results obtained can be quite satisfactory when one has achieved the necessary 'touch' for the reaction control. The circuit described here performs quite favourably compared with a super- het, especially if an external aerial is used. The quest for ‘superhet’ sensitivity and selectivity dates from the time when a valve was an expensive item, and the licence fee depended on the number of valves in the set! The simple construc- tion and lack of alignment of the ‘super- regen’ are of course achieved at the cost of selectivity and stability. The circuit is a fairly classic design, but the performance is much improved due to the use of modem components in a well thought-out circuit. Using a ferrite aerial good reception of local stations is possible, and use of a longer ferrite rod results in an even better performance. For long distance reception an external aerial and earth can be used. The design also provides the basis for a simple short wave receiver by winding the aerial coil to suit the required fre- quency range. The circuit The tuned circuit consists of LI and Cl. No coupling winding is used on this coil, as this can often pick up interference from powerful short wave transmitters. Instead the output is taken direct from the ‘live’ end of the coil, and the use of a (high input impedance) source fol- lower T1 ensures that the tuned circuit is not unduly damped. Positive feedback is taken from the source of T 1 via C2 to a tapping on the coil, and is adjustable by PI. The highest sensitivity occurs just before the feedback is sufficient to cause the onset of oscillation. T3 provides substantial r.f. gain with T2 as its constant current collector load and also functions as detector. Rectifi- cation of the r.f. signal takes place at the collector of T3 rather than the base, as this offers a lower detector threshold. The a.f. amplifier embodies one or two unusual design features. The a.f. ampli- fiers of common commercial receivers often have such a high quiescent current that battery life is severely curtailed. In this circuit the Darlington output stage has zero quiescent current, which, in addition to reducing the power con- sumption of the receiver, also eliminates one adjustment potentiometer. The quiescent current of the whole receiver is only 1 mA, rising to 50 mA at full output. This is not achieved without some sompromise, which is of course the inevitable crossover distortion associated with pure class B output stages. Fortunately most of this distor- tion appears at high audio frequencies and, since the bandwidth of AM trans- missions is limited anyway, it is possible to roll off the h.f. response of the amplifier, reducing the distortion with- out noticeably affecting the frequency range of the signal. This is provided by a filter in the feed- back loop comprising R12-R14 and CIO -Cl 2, which gives a sharp roll-off in the amplifier gain above about 6 kHz. To ensure amplifier stability with varying loads R18 and C 14 are connec- ted across the output. The set can thus be used equally well with a high (or low) impedance earphone instead of the loudspeaker. The maximum output with an 8 n speaker is 250 mW and, provided the speaker is reasonably efficient, this will provide adequate volume for an average room. Construction Figure 2 gives a printed circuit board and component layout for the set, which considerably simplifies the as- sembly. Care should be taken, however, to keep the connections to Cl, LI and PI as short as possible, as otherwise the set may be unduly sensitive to hand capacitance and will be difficult to keep stable. For this reason also a long insu- lated spindle is recommended for PI . The aerial coil on a 10 mm diameter ferrite rod 100 mm long consists of 70 turns close wound enamelled copper wire 0.3 to 0.5 mm diameter (31 to 25 S.W.G.) tapped 20 turns from the earth end. An external aerial can be con- nected to point A via a 4.7 p capacitor C x , or by a 4-20 p trimmer. Pin con- figurations for the transistors used are given in figure 1. It may be possible to use alternative types forTl and T2, and three equivalents are listed for T3. There are numerous alternatives to T4 Parts list. Resistors: R1 = 1 k R2.R14 = 4k7 R3 = 10 M R4 = 3M9 R5 = 22 k R6.R10 = 100 k R7.R19 = 10 k R8 = 1 M R9 = 68 k R1 1 ,R15 = 47 k R12.R13 = 470 £2 R16.R1 7 = 2.2 S2 R18 = 10 PI = 4k7 lin. P2 = 470 k log. Semiconductors: T1.T2-E300 T3 - BF 494/BF 495 (BF194/BF 195) T4 = BC 547B T5 - BC 557 T6- BC 517 T7-BC 516 D1,D2 ■ 1N4148 Capacitors: Cl = 4 ... 365 p or 4 ... 500 p C2= 10 n (ceramic) C3,C7,C8,C14 ■ 100 n C4 - 1 /i/3 V C5 = 820 p (ceramic) C6 = 1 50 p (ceramic) C9.C10 ■ 1 /i/6 V Cl 1 = 3n3 Cl 2 - 220 p C13 = 100 /i/6 V C15 = 1000 /i/10 V C x = see text Misc.: LI = see text 142 — elektor January 1976 and T5, but the types specified for T6 and T7 must be used as there are no alternatives. These Darlingtons offer the advantage of high current gain (typically 30000) in a single can. Test points Four test point voltages are given in figure 1 . The minimum voltages at these points should be: voltage at point 1:1 V voltage at point 2: 0.5 V voltage at point 3: 1.5 V voltage at point 4: 4.5 V Operation of the receiver When tuning the receiver the reaction control PI must be carefully adjusted. It is best to turn up PI until the receiver oscillates. The tuning capacitor may now be adjusted to tune the set, and when a transmitter is being received the level of the oscillation will change. PI can then be backed off until the oscil- lation just ceases. If desired PI can be replaced by a 4k7 preset, in series with a 1 k potentiometer for the fine reaction control. With the 1 k pot. in its central position the preset can be adjusted so that the receiver is on the verge of oscillation. Adjustment of the 1 k will then take it into or out of oscillation. The best long-distance reception is achieved by using an external aerial and earth. Some improvement can also be obtained, whilst still retaining the directional properties of a ferrite aerial, if a larger ferrite rod is used for LI. Alternatively, two small rods can be mounted side by side and sellotaped together, and the coil wound over the combined rods. If either of these methods is used the number of turns on the coil must be reduced to achieve the same inductance. For instance, when using two 10 mm diameter rods 55 to 60 turns was found to be the optimum, with the tapping 15 to 20 turns from the earthy end of the coil. The receiver will also operate on the short-wave bands using air cored coils. On the prototype LI was replaced by a coil of about 80 mm diameter, having 6 turns 1 mm diameter wire ( 1 with the tap 1 turn from the earthy These modifications resulted in reception of several transmitters range 3-13 MHz, and other waveba could be obtained by further i imentation. elektor January 1976 — 143 stereo LED level meter The Texas 1C type SN 16880 N contains all the functions necessary for a stereo LED level meter, which can replace the conventional moving coil instrument in tape recorders or audio mixers. Unlike LED level meters previously described in Elektor the SN 16880 N provides a logarithmic indication of voltage, and hence of sound level. The inputs to the IC (pins 9 and 11) feed into two active rectifiers, with their outputs connected in parallel. This means that the highest level input is automatically displayed. If separate indication for each channel is required then it is necessary to use two IC’s. The rectifier outputs are connected to the inverting inputs of five analogue voltage comparators, the non-inverting inputs of which are connected to various points in a logarithmic potential divider chain. This provides reference voltages for each of the comparators in 5 dB steps. When the rectified input signal exceeds the reference voltage of a particular com- parator then that comparator switches, turning on the output transistor connec- ted to the comparator. The truth table shows the relationship between the input levels in dB and volt- T ruth table: INPUT A1 or A2 < -20 dB (36 mV) >-20dB (36 mV) >-15dB (64 mV) >-10 dB (113 mV) >- 5dB (200 mV) > 0 dB (357 mV) OUTPUTS 01 02 03 04 05 off off off off off on off off off off on on off off off on on on off off on on on on off age, and the output states. The five out- that the red LED just lights with the put stages consist of open-collector maximum required input voltage, transistors, each capable of sinking a The output voltage of the rectifiers maximum current of 50 mA. The out- must obviously be stored for a period puts can be used to switch LED’s di- long enough to enable reading, as other- rectly as shown in figure 2. wise short transients would not be seen It is recommended that four green LED’s by the meter user, though they might should be used for outputs 1 to 4 to overmodulate the tape. This is the indicate the signal level, with a red LED function of Cl in figure 2. With the connected to output 5 to indicate value given the attack time (time taken overmodulation. The greater efficiency for the voltage on Cl to reach almost (and hence brightness) of the red LED’s the full input voltage in response to a will make an overload indication quite step input) is about 10 ms, which is fast apparent. enough to capture transients. The decay The voltages given in the table are for time is about 550 ms, which gives the maximum input sensitivity of the IC reasonable ease of reading. This value (i.e. with the signal fed direct into pin 9 may be altered to suit individual taste, or 1 1). For larger input voltages a poten- Finally it should be noted that, as large tiometer may be inserted in series with current pulses are drawn from the the inputs, which together with the in- supply when the LED’s switch, a well- put impedance of the IC will form an regulated supply is necessary, input attenuator, as shown in figure 2. Using the 100 k potentiometers shown Texas instruments application note the ‘f.s.d. of the meter may be adjusted from about 357 mV to 2.15 V. The M potentiometers may also be used to balance the two inputs. For inputs greater than 2.15 V larger values of potentiometer must be used. 470 k and 1 M will give full-scale read- ings of up to 8.75 and 18.2 V respect- ively. When calibrating the meter the potentiometers should be adjusted so digital master oscillator w The use of frequency dividers in electronic organs has been known for many years. The usual procedure is to use divide-by-two stages to divide down the notes of the highest octave to obtain the lower octaves. Until recently it was normal practice to use twelve independent master oscillators for the twelve notes of the top octave. The disadvantages of this approach are that twelve oscillators have to be adjusted when tuning the organ, a | procedure that requires a skilled ear. Since the oscillators are independent, supply voltage variations, temperature changes and component ageing can all make the organ go out of tune. A digital master oscillator, in which the notes of the top octave are derived from, and are all locked to, a single clock generator, suffers from no such disadvantages. Tuning is accomplished simply by altering the clock frequency, and if the clock frequency does drift this will not be noticed when playing solo, since the relative pitch of the notes will remain the same. 1 CLOCK _ GENERATOR -£EQ—" c «■ Ai, -EED— " 4 " Gis " g “CEIH " * * F -EETH’’ E A'X'X— "• “■ "■ 0 "• Cb ^ CLOCK | ^ | GENERATOR 1 1 T 1 43-pCLH * c npQ- l ezKD-~' 1 elektor january 1976 — 145 ire various digital methods of generation, which all have their advantages and disadvantages, the most interesting of these will be d in the following text, semitone interval in the tempered scale is equal to y2 or 0594631 . . . That is to say the fre- ncy of any note is 1.0594631 times frequency of the note a semitone low it. The most obvious method of eving this frequency ratio would be divide down the output of a clock generator, using a separate divider chain for each of the twelve notes. This is shown in figure 1 . The accu- racy of each note depends on the length of the divider chain used, and with the division ratios shown a three-decade counter is required for each note. The use of long divider chains requires a high clock frequency, and the component cost is high. A second approach to the problem uses the fraction which is a good 1 851 approximation to y2 . The principle of this system is shown in figure 2. The output of the clock gener- ator is fed to a circuit that passes 185 out of every 196 clock pulses and in- hibits the remaining eleven. The output of this circuit is fed to a similar circuit. Thus each output produces 185 output pulses for 196 input pulses. If the average frequency of any output was measured using a frequency meter with a long gate period it is obvious that it would be of the frequency of the preceding output. However, though the long-term average frequency is correct, the output waveform is very irregular due to the fact that there is a gap where the 1 1 pulses are missing. If the outputs A practical realisation of a divider is given in figure 3. Here two 7493 4-bit binary counters are connected as divide- by-1 4 counters and cascaded to make a divide-by-1 96 counter (since 196 con- veniently equals 14 2 ). Initially flip- flop IC3 is reset so clock pulses cannot pass through AND-gate A4. The 7493’s count the clock pulses, and on the 1 1 th clock pulse a pulse from the out- put of A3 clocks the flip-flop. The Q output of the flip-flop goes high, allowing clock pulses through A4. On the 196th clock pulse the output of N1 goes low, resetting the flip-flop, and the cycle repeats. The accuracy of the semitone interval achieved by this method is high, but the long divider chains required to suppress jitter increase the cost. At this point it is worth looking at a commercially available IC that makes Figure 1. Master oscillator system in which each note is divided down individually from a common clock generator. Figure 2. System which makes use of the division ratio as an approximation to by inhibiting 11 out of every 196 pulses. The output dividers (blocks T) reduce jitter. Figure 3. Practical realisation of a ||| divider. Only 185 of every 196 input pulses are allowed through gate A4 to the output. of the — — dividers were used directly 1 96 this would give rise to an audible effect known as ‘jitter’. Fortunately jitter can be reduced by taking the divider out- puts through a series of binary (divide- by-two) stages, when the mark-space ratio of the waveform will tend to unity (a timing diagram will demonstrate this). This is the function of blocks T’ in figure 2. Since the number of divider stages required to reduce jitter to a reasonable level is about 7, this means that the clock frequency must be 2 7 times the highest note. use of this principle. This is the Inter- metall SAH190, an internal block dia- gram of which is given in figure 4. Since jitter becomes worse the more y2 stages are cascaded, the number of subsequent divide-by-two stages required for jitter suppression depends on the jitter at the output of the final stage. Intermetall overcame this difficulty by not using 1 2 cascaded \fl dividers, but by using four cascaded three-semitone or $/2 div- 44 iders (represented by the fraction — ) and a one-semitone (-^2) and two-semi- tone ($/2) divider, represented by the 6 elektor january 1976 — 147 m 185 and 49 respectively, complete master oscillator using three these ICs is shown in figure 5 The IC receives its input direct from the k generator. The second receives its put from the \72 divider of the first and the third receives its input from f/2 divider of the first IC. The first thus produces 4 notes with a three- mitone interval between each note, outputs of the second IC are also semitones apart, but each is a mitone below the corresponding out- t of the first 1C. Similarly the outputs f the third IC are all two semitones low the corresponding output of the t IC. Thus, if say C is obtained from utput fi of the first IC, then B will be 3 the f 3 output of the third IC and so on. In this way the use of 12 cascaded \fi- dividers is avoided, thus simplifying the anti-jitter circuitry, which the IC also contains. The fourth system involves the ex- pression of as a power series of nega- tive powers of two. The equation represents \f2 with an error of only 7 , and gives \fl as 1.059462890625. This seems rather an elegant solution, but unfortunately, powers up to 2“ 10 are required, this means that 1 0 divide-by-two stages required for each divider. In addition the outputs of these dividers must be OR’d together. Furthermore the mark-space ratios of the individual pulse trains must be modified so that no pulses coincide, as all must be counted separately after passing through the OR- fifth and final system to be de- scribed also makes use of combinations f powers of two, but for direct syn- hesis of the required frequencies rather than for obtaining a chosen division ratio. Any frequency can be produced by addition of pulse trains of partial frequencies. The practical aspects are, of rse, more complicated than this simple statement suggests. Frequencies whose ratios correspond to intervals in the tempered tonic scale cannot be syn- thesised precisely, since the semitone interval y2 is an irrational number. They can, however, be approached as sely as required by making the lowest artial frequency element very small ompared to the largest one in any given quency. Since in this case the partial frequencies will be obtained by dividing down a clock frequency in a series of binary (divide-by-two) stages, the achievable accuracy will be one part in 2 n , where n is the number of divider stages. From musical publications it is evident that the maximum permissible fre- quency error that will remain unde- leted is about 0.05% or one part in 2000. The use of 1 1 binary divider stages will give an accuracy of one part the frequency, is decimal 2.000 m2 or 2048. (binary 10.00 . .) and the other notes lie Jitter also occurs when adding partial in between. Thus a particular note may frequencies, and must be removed by be synthesised by taking an input to the divider chains on the output of the synthesiser from a divider stage when synthesiser. 8 binary divider stages are there is a ‘1’ in the corresponding required to produce a sufficiently jitter- column of the binary number. Thus, for free output, so to obtain C s (4186 Hz) example, E is represented by binary the output frequency of the synthesiser 1.0100001010, so inputs are required must be around 2 MHz. from the 2°, 2 -2 , 2 -7 and 2 -9 dividers. To see how the individual notes are syn- However, the frequencies provided by thesised it is necessary to refer to fig- these dividers cannot simply be OR’d ure 6 and table I . Table 1 expresses the together. The reason for this is apparent twelve notes of the octave as frequency in figure 6. If, for instance, the 2° and ratios. Thus if C s is taken as 1 .000 . . 2 -3 outputs were OR’d together, then (binary 1 .0000) then C 6 , which is twice the output of the OR-gate would follow 148 — elektor january 1976 the 2° waveform while the 2 -3 wave- form was low, but immediately it went high the output of the OR gate would go high and the 2° waveform would have no effect. This would result in a frequency lower than 2° but higher than 2 -3 , whereas the desired result was the sum of the two frequencies. To avoid this it is necessary to modify the mark-space ratio of the waveforms so that no two pulses coincide when ap- plied to the OR-gate. This is achieved by AND-ing the lower frequency out- puts with the complement of the higher frequency ones, so that the lower fre- quency outputs can only go high while the higher frequency ones are low, thus ensuring that two high outputs cannot coincide. This is shown in the lower part of figure 6. 2° is ANDed with 2^, so that it may only go high when 2 1 is low. 2~ l is ANDed with 2 5 and 2*, and so on, until finally 2 -10 is ANDed with the complements of all the other outputs. The various pulse trains can thus be interleaved by OR-ing them together without any of the pulses ever co- inciding. Figure 7 shows the block diagram of a master oscillator using the principles outlined above. The partial frequencies are obtained from a clock generator by dividing down using a series of flip- flops. Since the flip-flops have 0 as well as Q outputs the complements of the various outputs are available. As outputs from 2° (half the clock frequency) down to 2~ 10 are required, 1 1 flip-flops are necessary. The outputs are ANDed with the complements of other outputs as described earlier to give 1 1 outputs shown as 2°’ to 2 -10 '. These outputs are then OR’d together as required to give the correct frequency ratios. Fi- nally each output passes through 8 divide-by-two stages to remove jitter, at the outputs of which 1 1 notes of the top octave are available. The two Cs, Cr and C 6 , being an integral negative power of two times the clock fre- quency, do not need to be synthesised but are simply obtained from the appropriate flip-flops of the input div- ider stages (FF1 to FF11). As a refinement, vibrato can be intro- duced into the system simply by modu- lating the frequency of the clock gener- ator. The effect known as ‘octave tremolo’, in which the pitch of the notes jumps up and down by an octave, can also be obtained by interposing an additional flip-flop (FF12) between the clock generator and the input dividers and switching it in and out of circuit by means of an octave tremolo oscillator. A practical circuit and constructional details of this master oscillator will be given in the second part of this article. H Modifications to Additions to Improvements on Corrections in Circuits published in Elektor TV tennis Based on experience gained in our lab- oratories while developing extensions for the tv tennis (elektor 7, p. 1111), and also during non-stop operation at the audio fair last October, we feel that the following points bear further com- ment: — the IC numbers 1C10 and IC11 on the component layout for the main p.c.b. (figure 7) are interchanged. Reading from top to bottom down the left-hand row of ICs, the order should be: IC8, IC10, IC7, IC12.IC9, IC11, IC13. Since both ICs are 7400s, this error will not effect the performance of the design; however, if the mains sync modification of fig- ure 3a is being carried out it can lead to misunderstandings as to which track on the board should be broken. — improved picture definition and sync pulses can be obtained by changing the values of C34 and C38 in the modulator unit : C34 can be increased to 10/1/6.3V (+ to R55, - to point A), whereas C38 can be de- creased to 47 p. — in some cases a minor improvement of the picture can be obtained by adding small resistors ( 1 ... 2.2 £2) in series with the decoupling capaci- tors C4, C8, Cl 1 , C14, C17, C20, C23 and C x . The improvement de- pends on how ‘lossy’ the capacitors were in the first place. — C x was not listed in the parts list. It is 100 n. — it was perhaps not made sufficiently clear in the text that we do not ad- vise using the circuit on 405 lines VHF, as this calls for several modifi- cations to the line sync and horizon- tal bat and ball position circuits. The the missing linfc modulator can easily be tuned to give a good picture at the low-frequency end of the UHF band, on 625 lines, without any circuit modificatioi - a further point which was not speci cally stated in the text is that the power supply should be short-circi protected. The reason for this is that] inadvertently pressing both ‘serve’ buttons simultaneously connec R42 and R38 (10 fl) across supply — the current consumj then becomes more than 1 A. supply which we ‘strongly ommended’ (figure 4) is design! withstand this. • for the extensions to the game w will be published shortly (new ga boundaries, net, sounds and sco various connections will have t made to the existing board, should present no problems, bi simplify matters a new board additional markings will be L duced as soon as stocks of the inal board have run out. Then no circuit modifications require! this, so both boards can be equally well for the extended ver * TCA730/740 The layout for the p.c.b. for TCA730/740 preamplifier contains error: the junction C3/R7 should be connected to the junction C5/R5 pin 5 of 730. The boards suppliei the eps print service (no. 9191) are rect. Furthermore, the latest Philips a cation notes show a minor design n fication: R5 and R5’ are now show 8 k instead of 120 k, and R2 and re now shown as 33 k instead of 1 We have not yet experimented tc what difference this makes. * Selektor Owing to an error in the final stag before going to print, the article ‘Readii between the lines’ was included i Elektor 8, p. 1 207. The art editor offe his apologies High security burglar alarm sensor Low-cost domestic burglar alarms often operate on the loop principle. A number of normally closed microswitches protect points of entry. These are all connected in series, so that opening a door or window will open one of the switches and break the circuit, thus setting off the alarm. Similarly any attempt to cut the wires leading to the switches will set off the alarm. However, this type of circuit is not proof against bridging out a switch with a link, which can easily be done if the wires are not concealed. Concealment of the wires increases the difficulty of installing an alarm, and a surface run of twin core bell flex is a much more attractive pro- position to the home constructor. Fortunately it is a simple matter to construct an alarm operating on the loop resistance principle. The idea is that a resistor is included in series with each microswitch, mounted in the microswitch housing. When the alarm is in operation the loop resistance is monitored. If the wires are cut the loop resistance immediately becomes infinite and the alarm is set off, while any attempt to bridge out a switch will decrease the loop resistance, also setting off the alarm. The alarm system can be defeated (find out how yourself) but it is considerably more difficult. Operation of the circuit is very simple. The loop resistors form a potential div- ider with a 100 k pot. The pot is adjusted until the voltage at point X is between the thresholds of the two comparators. The outputs of both comparators are thus low. Any increase in voltage (due to breaking the loop) will exceed the threshold of IC1, causing the output to swing positive and producing a 1 on the output of the OR gate. Any decrease in voltage due to bridging a switch will cause the output of IC2 to go positive. 150 — elektor january 1976 i pIHc stEPED dECOdEP In response to popular demand we publish this design for an FM stereo decoder using the Motorola MCI 31 OP. Although nothing is claimed for this circuit by way of originality (it must have been published in some form hundreds of times) it is nevertheless a useful design utilising a device that has become virtually an industry standard. Furthermore, a printed circuit board is (of course!) available from the EPS print service. Mode of operation The block diagram (figure 1) will explain the mode of operation. The stereo decoder IC consists of three cir- cuit sections. The channel switch used to recreate the right-left information is at the bottom left of figure 1 . It receives the stereo signal from the input ampli- fier via the usual IF demodulator. The circuit at the top of figure 1 is used to recreate, in the correct phase, the 38 kHz subcarrier suppressed at the transmitter. To prevent the internally generated carrier of the decoder being 1 80 out of phase with the suppressed auxiliary carrier of the transmitter, the carrier generator of the decoder oscillates at 76 kHz. The required subcarrier fre- quency (38 kHz) is then obtained by dividing the generator frequency in the ratio 2 : 1 . A second divider carries out a further division in the same ratio, so that a pilot frequency ( 1 9 kHz) is available at the output of the second divider. This 1 9 kHz frequency is taken to a phase discriminator (second stage in the top section) which supplies the cod trol voltage to the 76 kHz oscillator. The output voltage of the phase col parator is zero only if the phase shi between the transmitted pilot frequent and the internal generator frequency ^ 90°. In all other cases the phase c parator gives an output voltage with J DC component which is filtered out i| a low-pass filter. After adequate ampi fication this DC voltage is used to col trol the 76 kHz oscillator. This contn voltage controls the oscillator so as I establish a phase shift of 90° betwe* the internally generated 1 9 kHz and tl 19 kHz pilot frequency, at which tin the control voltage is zero. The middle section of figure 1 general the drive voltage for the stereo on/oj switch and the stereo indicator, achieve this, another 1 9 kHz signal | generated in a third divider, which ll the same phase as the pilot frequenq Using this signal a DC voltage is gene ated in a second discriminator, d value of which is proportional to d amplitude of the pilot frequency. Sind the amplitude of the pilot frequency is a measure of the ‘stereo goodness’, as well as an indication of the availability of a stereo transmission, the DC voltage can be used as the drive voltage for a Schmitt trigger. The Schmitt trigger operates both the stereo switch and the stereo indicator lamp. The regenerated 38 kHz auxiliary carrier then passes to the channel switch at the I outputs of which the left-right signals are available. The practical circuit The complete circuit of the stereo de- coder using the MCI 31 OP is shown in figure 2. The LF signal arrives via the capacitor Cl to the input (pin 2) of the 1C. The oscillator frequency (76 kHz) is set by the combination of PI, R1 and C2, the frequency drift of the oscillator is compensated within the range -10°C . . . +50°C. C2 is a styroflex type with the tightest possible tolerance ( 1 % . . . 2 %). The low-pass filter for the control volt- age of the 76 kHz oscillator consists of components C3, C4 and R2, and an internal resistance within the IC. The de-emphasis network used to equalise the pre-emphasis of the transmitted stereo signal consists of the output impedance of the amplifier and of both RC networks R3, C8 and R4, Cl. The input impedance of the LF ampli- fier which follows the decoder should be at least 22 k otherwise a marked effect on the de-emphasis is introduced. Because capacitors C3, C4, C7 and C8 are frequency determining components, low temperature coefficient types must be used, preferably polystyrene. The coupling of the phase comparator circuit is done via C5. If this capacitor s 47 nF, the subcarrier waveform generated will lead by 3.5°. This, together with the phase shift introduced within the IC, amounts to a total phase advance of 5.5°. This phase shift is com- pensated by a capacitor (C x ) between pin 3 and +V(j. A capacitor of 820 pF will compensate an advance of 5.5°. 152 — elektor january 1976 Larger values would cause the subcarrier waveform to lag. In this way, possible phase shift which may occur in the IF amplifiers can be compensated for. This possibility can also be used if the channel separation should not be satis- factory. This fault is usually only plainly apparent in the case of stereo test trans- missions or by using a stereo signal gen- erator. The low-pass filter prior to the stereo-switch consists of an internal re- sistance together with C6. It offers the possibility of externally setting the mono/stereo switch to the position ‘mono’, this is done by apply- ing +0.3 V to point 8. This positive bias is taken from the supply voltage via R6, T1 and R5. The supply voltage can be taken to point A in figure 2 via a single pole switch or via a sensor switch. In combined AM/FM receivers, inter- ference due to the oscillator waveform of the IC may arise, particularly during AM reception. In such cases the 76 kHz oscillator can be made inactive in two ways. Either by connecting pin 14 to supply common, or by connecting pin 14 to the positive supply via a 3.3 k resistor. The latter can be combined with the external mono switch-over, connecting point A to pin 14 via a 3.3 k resistor. A 12 V/75 mA type is intended for the indicator lamp. Other types, including an LED, may of course be used with a [ suitable series resistance. With the usual LED the series resistance is calculated for a 20 m A max. current . The IC has an internal resistance which limits the switch-on current of the indicator lamp to 250 mA. Although the IC has a wide supply current range, a 12 V supply is | recommended, the component values ! given in figure 2 are for this supply l voltage. Lower supply voltages would ' necessitate changes in some values. The main characteristics of the MCI 3 1 OP are summarised in table 1 . Table I elektor shorthand A large number of queries at the Audio Fair in London show that many new readers have started buying Elektor from no. 7 on. They have not seen the full ex- planation of the terms TUP' and 'TUN' that we gave in Elektor 1 , p. 9, nor have they read the further explanation of other 'Elektor shorthand' in no. 4, p. 660. For this reason, we are re-printing the latter article in full. We will also regularly reprint the TUP-TUN' page and the pages of IC-pinning for TTL, CMOS and linear ICs as originally published in Elektor no. 5. From various enquiries it has become clear that some of our readers feel that they have been plunged in at the deep end. Elektor’s ‘shorthand’ style of sym- bols and conventions seems to have led to some confusion, in spite of our efforts to the contrary, so some further ex- planation seems to be called for. Resistor and capacitor codes When giving the values of resistors and capacitors, decimal points and large num- bers of zeros are avoided as far as possible. To this end, extensive use is made of the international abbreviations: p (pico-) = 10 -w = one millionth of one millionth; n (nano-) = 10 -9 = one thousandth of one millionth; H (micro-) = 1CT 6 = one millionth; m (milli-) = 10' 3 = one thousandth; E = 10° = unity; k (kilo-) = 10 3 = one thousand times; M (mega-) = 10 6 = one million times; G (giga-) = 10 9 = one thousand million times; T (tera-) = 10 w = one million million times. Furthermore, the symbols S2 (ohm) and F (farad) are usually omitted, since it is MCI 31 OP Data Maximum input voltage V e ff j n (Stereo, distortion factor 0.5%) Maximum input voltage V e ff. j n (Mono, distortion factor 1%) Input impedance Channel separation (50 Hz... 15 kHz) Balance in 'mono' position Pilot tone suppression (19 kHz) Subcarrier suppression (38 kHz) Output voltage for channel V e ff. out Capture range of the oscillator (valid only for the component values given in figure 2) 34 dB 45 dB elektor shorthand normal practice to state resistance valut in ohms and capacitance values in farad: Finally, the decimal point is usually n placed by one of the abbreviations (p, i /i ...) listed above (This has also bee accepted practice for some years). I A few examples may serve to clarify i this: Resistance value 2k7 : this is 2.7 kfZ, < 2700 J2. Resistance value 470: this is 470 1 Resistance value 3M9: this is 3.9 MJ2, < 3,900,000 fi. Capacitance value 4p7 : this is 4.7 pF, » 0.000 000 000 004 7 F ... Capacitance value 1 00 u: this is 100 [A Capacitance value 4700 n : this 4700 nF, and could have been writti as 4m7 - but never is. Capacitance value 10 n: this is lOni and is also sometimes written (bi not in elektor!) as 10,000 pF i 0.01 pF; or even as 10 kpF (10 kill pico-Farad), which is a horrible ca fusion of symbols. In the same wi one sometimes finds fitiF (mia micro-Farad) instead of pF. Semiconductor type numbers Very often, a large number of equivak types for one integrated circuit exist wi different type numbers. On closer ex« ination, a group of digits are often fou to be identical, but they are pre- suffixed with letters and digits whi denote the manufacturer. As an examf a popular op-amp is variously denol as mA 741. LM741, L741, MC17- MIC741 , RM741 , SN72741 or ZLD7f to name a few. To cut through f confusion, this IC is referred to in eleki as a ‘741’ - which means that j couldn’t care less who makes it, provid it meets the specifications... In the same way, ‘7400’ (or sometu even ‘00’) stands for SN7400, SN74H 1 DM7400, MC7400, etc., and the last t figures are used in the same way other ICs in the 7400 series. Finally, transistors are sometimes lis ‘TUP’ or ‘TUN’. This is explained ci where. Transistors can also be listed BC107, for instance; a long list equivalent types for the BC107 serie also given in the TUP/TUN list.